From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from p5492e61e.dip0.t-ipconnect.de ([84.146.230.30] helo=nanos) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fDe2s-0007KF-5g for speck@linutronix.de; Wed, 02 May 2018 00:46:50 +0200 Date: Wed, 2 May 2018 00:46:49 +0200 (CEST) From: Thomas Gleixner Subject: Re: [patch V9 00/16] SSB In-Reply-To: <74da56f9-07c3-3625-7060-de2ceadc6854@linux.intel.com> Message-ID: References: <20180501152420.785133537@linutronix.de> <20180501181244.GA14888@char.us.oracle.com> <74da56f9-07c3-3625-7060-de2ceadc6854@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII To: speck@linutronix.de List-ID: On Tue, 1 May 2018, speck for Tim Chen wrote: > On 05/01/2018 12:28 PM, speck for Tim Chen wrote: > > I checked cpuid and the IBRS feature bit was there. > > I will do some more digging to find out why X86_FEATURE_IBRS is not set > > by kernel on my system. Konrad, you said someone else already reported > > the IBRS issue and was that root caused? > > > > I dug out the other thread that reported the IBRS problem. Turns out > that this commit > > commit d94a155c59c98c19b98ee949eaab6a0312bbd6be > Author: Kirill A. Shutemov > Date: Tue Apr 10 12:27:04 2018 +0300 > > x86/cpu: Prevent cpuinfo_x86::x86_phys_bits adjustment corruption > > was causing the IBRS_FEATURE bit to get unset. > I can see msr 0x48 set properly by x86_setup_ap_spec_ctrl > after I reverted the patch. The cpu online/offline also works okay > now for setting the MSR. So I gave you the proper fix for this in a previous reply for testing... Can you please try that one instead of the revert? Added again just in case. Thanks, tglx 8<--------------- --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -848,6 +848,11 @@ void get_cpu_cap(struct cpuinfo_x86 *c) c->x86_power = edx; } + if (c->extended_cpuid_level >= 0x80000008) { + cpuid(0x80000008, &eax, &ebx, &ecx, &edx); + c->x86_capability[CPUID_8000_0008_EBX] = ebx; + } + if (c->extended_cpuid_level >= 0x8000000a) c->x86_capability[CPUID_8000_000A_EDX] = cpuid_edx(0x8000000a);