From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752272AbeEOUDa (ORCPT ); Tue, 15 May 2018 16:03:30 -0400 Received: from mail-pf0-f196.google.com ([209.85.192.196]:33696 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751664AbeEOUD2 (ORCPT ); Tue, 15 May 2018 16:03:28 -0400 X-Google-Smtp-Source: AB8JxZpeGCNphbnNfxZc+VC1+2L7WtyuL1gFH+Hnk1RiyvMVIDIzqQN8D2paZijl2sAFJutxVxfgGg== Date: Tue, 15 May 2018 13:03:26 -0700 (PDT) From: David Rientjes X-X-Sender: rientjes@chino.kir.corp.google.com To: "Huang, Ying" cc: Andrew Morton , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andrea Arcangeli , "Kirill A. Shutemov" , Andi Kleen , Jan Kara , Michal Hocko , Matthew Wilcox , Hugh Dickins , Minchan Kim , Shaohua Li , Christopher Lameter , "Aneesh Kumar K.V" , Punit Agrawal , Anshuman Khandual Subject: Re: [PATCH -mm] mm, hugetlb: Pass fault address to no page handler In-Reply-To: <20180515005756.28942-1-ying.huang@intel.com> Message-ID: References: <20180515005756.28942-1-ying.huang@intel.com> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 15 May 2018, Huang, Ying wrote: > From: Huang Ying > > This is to take better advantage of huge page clearing > optimization (c79b57e462b5d, "mm: hugetlb: clear target sub-page last > when clearing huge page"). Which will clear to access sub-page last > to avoid the cache lines of to access sub-page to be evicted when > clearing other sub-pages. This needs to get the address of the > sub-page to access, that is, the fault address inside of the huge > page. So the hugetlb no page fault handler is changed to pass that > information. This will benefit workloads which don't access the begin > of the huge page after page fault. > > With this patch, the throughput increases ~28.1% in vm-scalability > anon-w-seq test case with 88 processes on a 2 socket Xeon E5 2699 v4 > system (44 cores, 88 threads). The test case creates 88 processes, > each process mmap a big anonymous memory area and writes to it from > the end to the begin. For each process, other processes could be seen > as other workload which generates heavy cache pressure. At the same > time, the cache miss rate reduced from ~36.3% to ~25.6%, the > IPC (instruction per cycle) increased from 0.3 to 0.37, and the time > spent in user space is reduced ~19.3% > > Signed-off-by: "Huang, Ying" > Cc: Andrea Arcangeli > Cc: "Kirill A. Shutemov" > Cc: Andi Kleen > Cc: Jan Kara > Cc: Michal Hocko > Cc: Matthew Wilcox > Cc: Hugh Dickins > Cc: Minchan Kim > Cc: Shaohua Li > Cc: Christopher Lameter > Cc: "Aneesh Kumar K.V" > Cc: Punit Agrawal > Cc: Anshuman Khandual Acked-by: David Rientjes