From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B619C433EF for ; Sat, 16 Jun 2018 13:28:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5460520891 for ; Sat, 16 Jun 2018 13:28:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5460520891 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=linutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932938AbeFPN2M (ORCPT ); Sat, 16 Jun 2018 09:28:12 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:52755 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932863AbeFPN2K (ORCPT ); Sat, 16 Jun 2018 09:28:10 -0400 Received: from p4fea482e.dip0.t-ipconnect.de ([79.234.72.46] helo=nanos) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fUBFI-0002AO-BX; Sat, 16 Jun 2018 15:28:00 +0200 Date: Sat, 16 Jun 2018 15:27:59 +0200 (CEST) From: Thomas Gleixner To: Ricardo Neri cc: Ingo Molnar , "H. Peter Anvin" , Andi Kleen , Ashok Raj , Borislav Petkov , Tony Luck , "Ravi V. Shankar" , x86@kernel.org, sparclinux@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Jacob Pan , "Rafael J. Wysocki" , Don Zickus , Nicholas Piggin , Michael Ellerman , Frederic Weisbecker , Alexei Starovoitov , Babu Moger , Mathieu Desnoyers , Masami Hiramatsu , Peter Zijlstra , Andrew Morton , Philippe Ombredanne , Colin Ian King , Byungchul Park , "Paul E. McKenney" , "Luis R. Rodriguez" , Waiman Long , Josh Poimboeuf , Randy Dunlap , Davidlohr Bueso , Christoffer Dall , Marc Zyngier , Kai-Heng Feng , Konrad Rzeszutek Wilk , David Rientjes , iommu@lists.linux-foundation.org Subject: Re: [RFC PATCH 20/23] watchdog/hardlockup/hpet: Rotate interrupt among all monitored CPUs In-Reply-To: <20180616004631.GB6659@voyager> Message-ID: References: <1528851463-21140-1-git-send-email-ricardo.neri-calderon@linux.intel.com> <1528851463-21140-21-git-send-email-ricardo.neri-calderon@linux.intel.com> <20180615021629.GD11625@voyager> <20180616004631.GB6659@voyager> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 15 Jun 2018, Ricardo Neri wrote: > On Fri, Jun 15, 2018 at 12:29:06PM +0200, Thomas Gleixner wrote: > > You have to consider two cases: > > > > 1) !remapped mode: > > > > That's reasonably simple because you just have to deal with the HPET > > TIMERn_PROCMSG_ROUT register. But then you need to do this directly and > > not through any of the existing interrupt facilities. > > Indeed, there is no need to use the generic interrupt faciities to set affinity; > I am dealing with an NMI anyways. > > > > 2) remapped mode: > > > > That's way more complex as you _cannot_ ever do anything which touches > > the IOMMU and the related tables. > > > > So you'd need to reserve an IOMMU remapping entry for each CPU upfront, > > store the resulting value for the HPET TIMERn_PROCMSG_ROUT register in > > per cpu storage and just modify that one from NMI. > > > > Though there might be subtle side effects involved, which are related to > > the acknowledge part. You need to talk to the IOMMU wizards first. > > I see. I will look into the code and prototype something that makes sense for > the IOMMU maintainers. I'd recommend to talk to them _before_ you cobble something together. If we cannot reliably switch the affinity by directing the HPET NMI to a different IOMMU remapping entry then the whole scheme does not work at all. Thanks, tglx From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Gleixner Date: Sat, 16 Jun 2018 13:27:59 +0000 Subject: Re: [RFC PATCH 20/23] watchdog/hardlockup/hpet: Rotate interrupt among all monitored CPUs Message-Id: List-Id: References: <1528851463-21140-1-git-send-email-ricardo.neri-calderon@linux.intel.com> <1528851463-21140-21-git-send-email-ricardo.neri-calderon@linux.intel.com> <20180615021629.GD11625@voyager> <20180616004631.GB6659@voyager> In-Reply-To: <20180616004631.GB6659@voyager> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Ricardo Neri Cc: Ingo Molnar , "H. Peter Anvin" , Andi Kleen , Ashok Raj , Borislav Petkov , Tony Luck , "Ravi V. Shankar" , x86@kernel.org, sparclinux@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Jacob Pan , "Rafael J. Wysocki" , Don Zickus , Nicholas Piggin , Michael Ellerman , Frederic Weisbecker , Alexei Starovoitov , Babu Moger , Mathieu Desnoyers , Masami Hiramatsu On Fri, 15 Jun 2018, Ricardo Neri wrote: > On Fri, Jun 15, 2018 at 12:29:06PM +0200, Thomas Gleixner wrote: > > You have to consider two cases: > > > > 1) !remapped mode: > > > > That's reasonably simple because you just have to deal with the HPET > > TIMERn_PROCMSG_ROUT register. But then you need to do this directly and > > not through any of the existing interrupt facilities. > > Indeed, there is no need to use the generic interrupt faciities to set affinity; > I am dealing with an NMI anyways. > > > > 2) remapped mode: > > > > That's way more complex as you _cannot_ ever do anything which touches > > the IOMMU and the related tables. > > > > So you'd need to reserve an IOMMU remapping entry for each CPU upfront, > > store the resulting value for the HPET TIMERn_PROCMSG_ROUT register in > > per cpu storage and just modify that one from NMI. > > > > Though there might be subtle side effects involved, which are related to > > the acknowledge part. You need to talk to the IOMMU wizards first. > > I see. I will look into the code and prototype something that makes sense for > the IOMMU maintainers. I'd recommend to talk to them _before_ you cobble something together. If we cannot reliably switch the affinity by directing the HPET NMI to a different IOMMU remapping entry then the whole scheme does not work at all. Thanks, tglx From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Gleixner Subject: Re: [RFC PATCH 20/23] watchdog/hardlockup/hpet: Rotate interrupt among all monitored CPUs Date: Sat, 16 Jun 2018 15:27:59 +0200 (CEST) Message-ID: References: <1528851463-21140-1-git-send-email-ricardo.neri-calderon@linux.intel.com> <1528851463-21140-21-git-send-email-ricardo.neri-calderon@linux.intel.com> <20180615021629.GD11625@voyager> <20180616004631.GB6659@voyager> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Return-path: In-Reply-To: <20180616004631.GB6659@voyager> Sender: linux-kernel-owner@vger.kernel.org To: Ricardo Neri Cc: Ingo Molnar , "H. Peter Anvin" , Andi Kleen , Ashok Raj , Borislav Petkov , Tony Luck , "Ravi V. Shankar" , x86@kernel.org, sparclinux@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Jacob Pan , "Rafael J. Wysocki" , Don Zickus , Nicholas Piggin , Michael Ellerman , Frederic Weisbecker , Alexei Starovoitov , Babu Moger , Mathieu Desnoyers , Masami Hiramatsu List-Id: iommu@lists.linux-foundation.org On Fri, 15 Jun 2018, Ricardo Neri wrote: > On Fri, Jun 15, 2018 at 12:29:06PM +0200, Thomas Gleixner wrote: > > You have to consider two cases: > > > > 1) !remapped mode: > > > > That's reasonably simple because you just have to deal with the HPET > > TIMERn_PROCMSG_ROUT register. But then you need to do this directly and > > not through any of the existing interrupt facilities. > > Indeed, there is no need to use the generic interrupt faciities to set affinity; > I am dealing with an NMI anyways. > > > > 2) remapped mode: > > > > That's way more complex as you _cannot_ ever do anything which touches > > the IOMMU and the related tables. > > > > So you'd need to reserve an IOMMU remapping entry for each CPU upfront, > > store the resulting value for the HPET TIMERn_PROCMSG_ROUT register in > > per cpu storage and just modify that one from NMI. > > > > Though there might be subtle side effects involved, which are related to > > the acknowledge part. You need to talk to the IOMMU wizards first. > > I see. I will look into the code and prototype something that makes sense for > the IOMMU maintainers. I'd recommend to talk to them _before_ you cobble something together. If we cannot reliably switch the affinity by directing the HPET NMI to a different IOMMU remapping entry then the whole scheme does not work at all. Thanks, tglx