From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A88FFC65C20 for ; Mon, 8 Oct 2018 19:37:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4AE892089D for ; Mon, 8 Oct 2018 19:37:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4AE892089D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=linutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726647AbeJICut (ORCPT ); Mon, 8 Oct 2018 22:50:49 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:41904 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726441AbeJICus (ORCPT ); Mon, 8 Oct 2018 22:50:48 -0400 Received: from p5492fe24.dip0.t-ipconnect.de ([84.146.254.36] helo=nanos) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1g9bLB-0007YQ-NE; Mon, 08 Oct 2018 21:37:18 +0200 Date: Mon, 8 Oct 2018 21:37:13 +0200 (CEST) From: Thomas Gleixner To: Paul Menzel cc: =?ISO-8859-15?Q?J=F6rg_R=F6del?= , Borislav Petkov , linux-mm@kvack.org, x86@kernel.org, lkml , Bjorn Helgaas Subject: Re: x86/mm: Found insecure W+X mapping at address (ptrval)/0xc00a0000 In-Reply-To: <74dededa-3754-058b-2291-a349b9f3673e@molgen.mpg.de> Message-ID: References: <0922cc1b-ed51-06e9-df81-57fd5aa8e7de@molgen.mpg.de> <20181003212255.GB28361@zn.tnic> <20181004080321.GA3630@8bytes.org> <74dededa-3754-058b-2291-a349b9f3673e@molgen.mpg.de> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Paul, On Fri, 5 Oct 2018, Paul Menzel wrote: > On 10/05/18 11:27, Thomas Gleixner wrote: > > If pcibios is enabled and used, need to look at the gory details of that > > first, then the W+X check has to exclude that region. We can't do much > > about that. > > That would also explain, why it only happens with the SeaBIOS payload, > which sets up legacy BIOS calls. Using GRUB directly as payload, no BIOS > calls are set up. > > Reading the Kconfig description of the PCI access mode, the BIOS should > only be used last. Correct. And looking at the dmesg you provided it is initialized: [ 0.441062] PCI: PCI BIOS area is rw and x. Use pci=nobios if you want it NX. [ 0.441062] PCI: PCI BIOS revision 2.10 entry at 0xffa40, last bus=3 Though I assume it's not really required, but this PCI BIOS thing is not really well documented and there are some obsure usage sites involved. Bjorn, do you have any insight or did you flush those memories long ago? Anyway we need to exclude the BIOS area when the kernel sets the W+X on purpose. Warning about that is bogus. I'll send out a patch soon. Thanks, tglx