From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Gleixner Subject: Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Date: Wed, 17 Oct 2018 12:16:29 +0200 (CEST) Message-ID: References: <20181014075208.2715-1-hch@lst.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: whiteheadm-HInyCGIudOg@public.gmane.org Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, Christoph Hellwig , konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org List-Id: iommu@lists.linux-foundation.org On Tue, 16 Oct 2018, tedheadster wrote: > On Sun, Oct 14, 2018 at 3:52 AM Christoph Hellwig wrote: > > > > We already build the swiotlb code for 32b-t kernels with PAE support, > > but the code to actually use swiotlb has only been enabled for 64-bit > > kernel for an unknown reason. > > > > Before Linux 4.18 we papers over this fact because the networking code, > > the scsi layer and some random block drivers implenented their own > > bounce buffering scheme. > > > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers") > > Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma") > > Reported-by: tedheadster > > Tested-by: tedheadster > > --- > > > > Christoph, > this fix has causes performance to decrease dramatically. Kernel > builds that used to take 10-15 minutes are now taking 45-60 minutes on > the same machine. Christoph, can you have a look please? Thanks, tglx