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From: Thomas Gleixner <tglx@linutronix.de>
To: Zhenzhong Duan <zhenzhong.duan@oracle.com>
Cc: linux-kernel@vger.kernel.org, mingo@redhat.com,
	konrad.wilk@oracle.com, x86@kernel.org, srinivas.eeda@oracle.com,
	bp@suse.de, tim.c.chen@linux.intel.com, peterz@infradead.org,
	hpa@zytor.com
Subject: Re: [PATCH] x86/speculation: Update TIF_SPEC_IB before ibpb barrier
Date: Mon, 28 Jan 2019 09:36:51 +0100 (CET)	[thread overview]
Message-ID: <alpine.DEB.2.21.1901280934270.1622@nanos.tec.linutronix.de> (raw)
In-Reply-To: <0aa09e77-1454-9eaf-ef67-b00518e6f2d2@oracle.com>

On Mon, 28 Jan 2019, Zhenzhong Duan wrote:
> On 2019/1/26 2:03, Thomas Gleixner wrote:
> > Bah, nonsense. Brain was clearly still out for lunch and I confused IBPB
> > and STIBP for a moment. cond_ibpb() is the thing issues in switch_mm() and
> > that is not leaving a stale MSR around because we only write to it when we
> > need the barrier. The bit is not stale because the barrier is only issued
> > with the write. The bit has not to be cleared.
> > 
> > So the only 'issue' what happens is that switch_to() either issues a
> > barrier too much or misses one. That's really not a problem.
> 
> Ok, yes, the purpose of this patch is to avoid the one missed barrier.

And that missed barrier is not worth it to do extra work in switch_to/mm
simply because it's a one off event and there is no way to exploit that
reliably.

Thanks,

	tglx

  reply	other threads:[~2019-01-28  8:36 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-18 11:09 [PATCH] x86/speculation: Update TIF_SPEC_IB before ibpb barrier Zhenzhong Duan
2019-01-23 12:45 ` Thomas Gleixner
2019-01-25 15:39   ` Thomas Gleixner
2019-01-25 18:03     ` Thomas Gleixner
2019-01-28  8:28       ` Zhenzhong Duan
2019-01-28  8:36         ` Thomas Gleixner [this message]
2019-01-28  8:42           ` Zhenzhong Duan

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