On Thu, 15 Aug 2019, Andrew Cooper wrote:

> On 14/08/2019 22:17, Lendacky, Thomas wrote:
> > +static void init_hide_rdrand(struct cpuinfo_x86 *c)
> > +{
> > +	/*
> > +	 * The nordrand option can clear X86_FEATURE_RDRAND, so check for
> > +	 * RDRAND support using the CPUID function directly.
> > +	 */
> > +	if (!(cpuid_ecx(1) & BIT(30)) || rdrand_force)
> > +		return;
> > +
> > +	msr_clear_bit(MSR_AMD64_CPUID_FN_00000001, 62);
> > +	clear_cpu_cap(c, X86_FEATURE_RDRAND);
> > +	pr_info_once("hiding RDRAND via CPUID\n");
> 
> If you're virtualised, the write to MSR_AMD64_CPUID_FN_1 almost
> certainly won't take effect, which means userspace will still be able to
> see the bit.
> 
> Best to leave everything untouched if you can't actually clear the bit. 
> All you can do is trust that your hypervisor knows what it is doing.

Well, we can read the CPUID entry again after writing that MSR bit. If it
still says RDRAND is available then we know that the hypervisor did not
allow the write and print something to that effect.

Thanks,

	tglx