From: Stefano Stabellini <stefano.stabellini@xilinx.com>
To: Leo Krueger <leo.krueger@zal.aero>
Cc: Stefano Stabellini <stefano.stabellini@xilinx.com>,
Peng Fan <peng.fan@nxp.com>,
"brucea@xilinx.com" <brucea@xilinx.com>,
"Cornelia Bruelhart" <cornelia.bruelhart@zal.aero>,
<oleksandr_andrushchenko@epam.com>,
<xen-devel@lists.xenproject.org>, <Bertrand.Marquis@arm.com>,
<julien@xen.org>
Subject: Re: AW: AW: AW: AW: Xen data from meta-virtualization layer
Date: Tue, 17 Nov 2020 15:53:13 -0800 [thread overview]
Message-ID: <alpine.DEB.2.21.2011171544380.438@sstabellini-ThinkPad-T480s> (raw)
In-Reply-To: <HE1PR05MB4794569AC67109AF8B6517268BE20@HE1PR05MB4794.eurprd05.prod.outlook.com>
[-- Attachment #1: Type: text/plain, Size: 7792 bytes --]
Adding Bertrand, Oleksandr, Julien, and others -- they have a more
recent experience with GICv3 ITS than me and might be able to help.
I am attaching the device tree Leo sent a few days ago for reference.
Typically when you can set the ethernet link up and no packets are
exchanged it is because of a missing interrupt. In this case a missing
MSI.
Bertrand, I believe you tried the GIC ITS driver with PCI devices
recently. It is expected to work correctly with MSIs in Dom0, right?
On Tue, 17 Nov 2020, Leo Krueger wrote:
> Hi,
>
> I enabled CONFIG_HAS_ITS (what a stupid mistake by me to not set it before...) but then had to add the following node to my device tree
>
> gic_lpi_base: syscon@0x80000000 {
> compatible = "gic-lpi-base";
> reg = <0x0 0x80000000 0x0 0x100000>;
> max-gic-redistributors = <2>;
> };
>
> to somehow change something in regard to the ITS and MSI/MSI-X
>
> (XEN) GICv3 initialization:
> (XEN) gic_dist_addr=0x00000006000000
> (XEN) gic_maintenance_irq=25
> (XEN) gic_rdist_stride=0
> (XEN) gic_rdist_regions=1
> (XEN) redistributor regions:
> (XEN) - region 0: 0x00000006040000 - 0x00000006080000
> (XEN) GICv3: using at most 57344 LPIs on the host.
> (XEN) GICv3: 288 lines, (IID 0001143b).
> (XEN) GICv3: Found ITS @0x6020000
> (XEN) using non-cacheable ITS command queue
> (XEN) GICv3: CPU0: Found redistributor in region 0 @000000004001c000
>
> [ 0.000000] GICv3: Distributor has no Range Selector support
> [ 0.000000] GICv3: no VLPI support, no direct LPI support
> [ 0.000000] ITS [mem 0x06020000-0x0603ffff]
> [ 0.000000] ITS@0x0000000006020000: allocated 65536 Devices @dc880000 (flat, esz 8, psz 64K, shr 1)
> [ 0.000000] ITS@0x0000000006020000: allocated 32768 Interrupt Collections @dc820000 (flat, esz 2, psz 64K, shr 1)
> [ 0.000000] GIC: using LPI property table @0x00000000dc830000
> [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000006040000
> [ 0.000000] CPU0: using LPI pending table @0x00000000dc840000
> ...
> [ 0.040080] Platform MSI: gic-its domain created
> [ 0.040136] PCI/MSI: /interrupt-controller/gic-its domain created
> [ 0.040181] fsl-mc MSI: /interrupt-controller/gic-its domain created
>
>
> Still I am ending up with the " Failed to add - passthrough or MSI/MSI-X might fail!" log messages for some PCI devices, but at least the on-board ethernet ports (fsl_enetc ) are initialized.
> I can set the link up and a link is successfully established.
>
> But (!) I cannot receive or transmit anything (no error message...) and there seem to be no interrupts:
>
> 29: 0 ITS-MSI 1 Edge gbe0-rxtx0
> 32: 0 ITS-MSI 8192 Edge ptp_qoriq
>
> (from /proc/interrupts).
>
> Any idea on this one? I keep digging and checking whether my device tree needs some additional fixes.
>
> Kind regards,
> Leo
>
> --
> Leo Krüger, M.Sc.
> Senior Systems Engineer Distributed Systems
> Intelligent Digital Cabin
>
> ZAL Zentrum für Angewandte Luftfahrtforschung GmbH
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>
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>
> > -----Ursprüngliche Nachricht-----
> > Von: Stefano Stabellini <stefano.stabellini@xilinx.com>
> > Gesendet: Dienstag, 17. November 2020 01:59
> > An: Leo Krueger <leo.krueger@zal.aero>
> > Cc: Peng Fan <peng.fan@nxp.com>; Stefano Stabellini
> > <stefano.stabellini@xilinx.com>; brucea@xilinx.com; Cornelia Bruelhart
> > <cornelia.bruelhart@zal.aero>
> > Betreff: Re: AW: AW: AW: Xen data from meta-virtualization layer
> >
> > Replies inline below
> >
> >
> > On Sun, 15 Nov 2020, Leo Krueger wrote:
> > > Hi Peng, hi Stefano,
> > >
> > >
> > >
> > > sorry for the long silence…
> > >
> > >
> > >
> > > I tried the change suggested (and hope I didn’t do anything wrong
> > > while doing so…) on top of XEN 4.13.2 (before, I always tried with
> > > 4.12 but wanted to give 4.13.2 a try as well) but I do not see any difference,
> > still the same “unhandled context fault” log entries pop up and I cannot
> > access my sdcard.
> > >
> > >
> > >
> > > As it seems to work without respectively disabled iommu, that would be
> > > fine for me for now. What I am worried about a bit more is PCIe or
> > MSI/MSIX to be exact.
> > >
> > >
> > >
> > > Here is the gic-v3 and its node from my device tree:
> > >
> > >
> > >
> > > interrupt-controller@6000000 {
> > >
> > > compatible = "arm,gic-v3";
> > >
> > > #address-cells = <0x2>;
> > >
> > > #size-cells = <0x2>;
> > >
> > > ranges;
> > >
> > > reg = <0x0 0x6000000 0x0 0x10000 0x0 0x6040000 0x0 0x40000>;
> > >
> > > #interrupt-cells = <0x3>;
> > >
> > > interrupt-controller;
> > >
> > > interrupts = <0x1 0x9 0xf08>;
> > >
> > > phandle = <0x1>;
> > >
> > >
> > >
> > > gic-its@6020000 {
> > >
> > > compatible = "arm,gic-v3-its";
> > >
> > > msi-controller;
> > >
> > > reg = <0x0 0x6020000 0x0 0x20000>;
> > >
> > > phandle = <0xd>;
> > >
> > > };
> > >
> > > };
> > >
> > >
> > >
> > > And here are some kernel log excerpts related to GIC when booting
> > without (!) XEN:
> > >
> > >
> > >
> > > [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
> > >
> > > [ 0.000000] GICv3: Distributor has no Range Selector support
> > >
> > > [ 0.000000] GICv3: no VLPI support, no direct LPI support
> > >
> > > [ 0.000000] ITS [mem 0x06020000-0x0603ffff]
> > >
> > > [ 0.000000] ITS@0x0000000006020000: allocated 65536 Devices
> > > @20fb880000 (flat, esz 8, psz 64K, shr 0)
> > >
> > > [ 0.000000] ITS: using cache flushing for cmd queue
> > >
> > > [ 0.000000] GIC: using LPI property table @0x00000020fb830000
> > >
> > > [ 0.000000] GICv3: CPU0: found redistributor 0 region
> > > 0:0x0000000006040000
> > >
> > > [ 0.000000] CPU0: using LPI pending table @0x00000020fb840000
> > >
> > > [ 0.000000] GIC: using cache flushing for LPI property table
> > >
> > >
> > >
> > > However, when booting with XEN, only the following three lines are
> > contained in the kernel log:
> > >
> > >
> > >
> > > [ 0.000000] GICv3: Distributor has no Range Selector support
> > >
> > > [ 0.000000] GICv3: no VLPI support, no direct LPI support
> > >
> > > [ 0.000000] GICv3: CPU0: found redistributor 0 region
> > > 0:0x0000000006040000
> >
> > "no VLPI support" is very suspicious, it looks like Dom0 doesn't find any ITS
> > support.
> >
> > Can you double check that you have the ITS driver in Xen built-in? That would
> > be CONFIG_HAS_ITS. If you do "make menuconfig" and enable "Configure
> > standard Xen features (expert users)" you should get a new option "GICv3
> > ITS MSI controller support" under "Architecture Features".
> > Make sure to enable it.
> >
> > Let me know if that works!
>
[-- Attachment #2: Type: text/plain, Size: 66249 bytes --]
/ {
compatible = "kontron,sl28", "fsl,ls1028a";
interrupt-parent = <0x00000001>;
#address-cells = <0x00000002>;
#size-cells = <0x00000002>;
model = "Kontron SMARC-sAL28";
chosen {
xen,dom0-bootargs = "root=/dev/mmcblk1p2 console=hvc0 earlycon=xen earlyprintk=xen clk_ignore_unused rootwait ";
xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=512M dom0_max_vcpus=1 bootscrub=0 vwfi=native sched=null ";
#size-cells = <0x00000002>;
#address-cells = <0x00000002>;
dom0 {
reg = <0x00000000 0x81200000 0x00000000 0x01517008>;
compatible = "xen,linux-zimage", "xen,multiboot-module";
};
};
aliases {
rtc1 = "/soc/timer@2800000";
crypto = "/soc/crypto@8000000";
serial0 = "/soc/serial@21c0500";
serial1 = "/soc/serial@21c0600";
};
cpus {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x00000000>;
enable-method = "psci";
clocks = <0x00000002 0x00000001 0x00000000>;
next-level-cache = <0x00000003>;
cpu-idle-states = <0x00000004>;
#cooling-cells = <0x00000002>;
phandle = <0x00000013>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x00000001>;
enable-method = "psci";
clocks = <0x00000002 0x00000001 0x00000000>;
next-level-cache = <0x00000003>;
cpu-idle-states = <0x00000004>;
#cooling-cells = <0x00000002>;
phandle = <0x00000014>;
};
l2-cache {
compatible = "cache";
phandle = <0x00000003>;
};
};
idle-states {
entry-method = "arm,psci";
cpu-pw20 {
compatible = "arm,idle-state";
idle-state-name = "PW20";
arm,psci-suspend-param = <0x00000000>;
entry-latency-us = <0x000007d0>;
exit-latency-us = <0x000007d0>;
min-residency-us = <0x00001770>;
phandle = <0x00000004>;
};
};
clock-sysclk {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x05f5e100>;
clock-output-names = "sysclk";
phandle = <0x00000007>;
};
clock-osc-27m {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x019bfcc0>;
clock-output-names = "phy_27m";
phandle = <0x00000005>;
};
clock-display@f1f0000 {
compatible = "fsl,ls1028a-plldig";
reg = <0x00000000 0x0f1f0000 0x00000000 0x0000ffff>;
#clock-cells = <0x00000000>;
clocks = <0x00000005>;
phandle = <0x00000017>;
};
clock-axi {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x26be3680>;
clock-output-names = "aclk";
phandle = <0x00000018>;
};
clock-apb {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x26be3680>;
clock-output-names = "pclk";
phandle = <0x00000019>;
};
clock-hdpcore {
compatible = "fixed-clock";
#clock-cells = <0x00000000>;
clock-frequency = <0x09af8da0>;
clock-output-names = "hdpclk";
phandle = <0x0000001b>;
};
reboot {
compatible = "syscon-reboot";
regmap = <0x00000006>;
offset = <0x00000000>;
mask = <0x00000002>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <0x00000001 0x0000000d 0x00000308 0x00000001 0x0000000e 0x00000308 0x00000001 0x0000000b 0x00000308 0x00000001 0x0000000a 0x00000308>;
};
interrupt-controller@6000000 {
compatible = "arm,gic-v3";
#address-cells = <0x00000002>;
#size-cells = <0x00000002>;
ranges;
reg = <0x00000000 0x06000000 0x00000000 0x00010000 0x00000000 0x06040000 0x00000000 0x00040000>;
#interrupt-cells = <0x00000003>;
interrupt-controller;
interrupts = <0x00000001 0x00000009 0x00000f08>;
phandle = <0x00000001>;
gic-its@6020000 {
compatible = "arm,gic-v3-its";
msi-controller;
reg = <0x00000000 0x06020000 0x00000000 0x00020000>;
phandle = <0x0000000d>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <0x00000002>;
#size-cells = <0x00000002>;
ranges;
phandle = <0x0000001f>;
memory-controller@1080000 {
compatible = "fsl,qoriq-memory-controller";
reg = <0x00000000 0x01080000 0x00000000 0x00001000>;
interrupts = <0x00000000 0x00000090 0x00000004>;
big-endian;
phandle = <0x00000020>;
};
syscon@1e00000 {
compatible = "fsl,ls1028a-dcfg", "syscon";
reg = <0x00000000 0x01e00000 0x00000000 0x00010000>;
big-endian;
phandle = <0x00000021>;
};
syscon@1e60000 {
compatible = "fsl,ls1028a-rst", "syscon";
reg = <0x00000000 0x01e60000 0x00000000 0x00010000>;
little-endian;
phandle = <0x00000006>;
};
syscon@1fc0000 {
compatible = "fsl,ls1028a-scfg", "syscon";
reg = <0x00000000 0x01fc0000 0x00000000 0x00010000>;
big-endian;
phandle = <0x00000022>;
};
clock-controller@1300000 {
compatible = "fsl,ls1028a-clockgen";
reg = <0x00000000 0x01300000 0x00000000 0x000a0000>;
#clock-cells = <0x00000002>;
clocks = <0x00000007>;
phandle = <0x00000002>;
};
usb@3100000 {
xen,passthrough;
compatible = "snps,dwc3";
reg = <0x00000000 0x03100000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000050 0x00000004>;
dr_mode = "host";
snps,dis_rxdet_inp3_quirk;
snps,quirk-frame-length-adjustment = <0x00000020>;
snps,incr-burst-type-adjustment = <0x00000001 0x00000004 0x00000008 0x00000010>;
phandle = <0x00000023>;
};
usb@3110000 {
xen,passthrough;
compatible = "snps,dwc3";
reg = <0x00000000 0x03110000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000051 0x00000004>;
dr_mode = "host";
snps,dis_rxdet_inp3_quirk;
snps,quirk-frame-length-adjustment = <0x00000020>;
snps,incr-burst-type-adjustment = <0x00000001 0x00000004 0x00000008 0x00000010>;
phandle = <0x00000024>;
};
spi@20c0000 {
compatible = "nxp,lx2160a-fspi";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x020c0000 0x00000000 0x00010000 0x00000000 0x20000000 0x00000000 0x10000000>;
reg-names = "fspi_base", "fspi_mmap";
interrupts = <0x00000000 0x00000019 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000003 0x00000002 0x00000004 0x00000003>;
clock-names = "fspi_en", "fspi";
status = "okay";
nxp,fspi-has-second-chip;
phandle = <0x00000025>;
w25q32jw@0 {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
compatible = "w25q32jw", "jedec,spi-nor";
m25p,fast-read;
spi-max-frequency = <0x07ed6b40>;
reg = <0x00000000>;
spi-rx-bus-width = <0x00000002>;
spi-tx-bus-width = <0x00000001>;
partition@0 {
reg = <0x00000000 0x00010000>;
label = "rcw";
read-only;
};
partition@10000 {
reg = <0x00010000 0x000f0000>;
label = "failsafe bootloader";
read-only;
};
partition@100000 {
reg = <0x00100000 0x00040000>;
label = "failsafe DP firmware";
read-only;
};
partition@140000 {
reg = <0x00140000 0x000a0000>;
label = "failsafe trusted firmware";
read-only;
};
partition@1e0000 {
reg = <0x001e0000 0x00020000>;
label = "reserved";
read-only;
};
partition@200000 {
reg = <0x00200000 0x00010000>;
label = "configuration store";
};
partition@210000 {
reg = <0x00210000 0x000f0000>;
label = "bootloader";
};
partition@300000 {
reg = <0x00300000 0x00040000>;
label = "DP firmware";
};
partition@340000 {
reg = <0x00340000 0x000a0000>;
label = "trusted firmware";
};
partition@3e0000 {
reg = <0x003e0000 0x00020000>;
label = "bootloader environment";
};
};
};
i2c@2000000 {
compatible = "fsl,vf610-i2c";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02000000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000022 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
dma-names;
dmas = <0x00000008 0x00000001 0x00000027 0x00000008 0x00000001 0x00000026>;
status = "okay";
phandle = <0x00000026>;
rtc@32 {
compatible = "microcrystal,rv8803";
reg = <0x00000032>;
interrupt-parent = <0x00000009>;
interrupts = <0x00000000 0x00000000>;
wakeup-source;
};
sl28cpld@4a {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "kontron,sl28cpld";
reg = <0x0000004a>;
interrupt-parent = <0x0000000a>;
interrupts = <0x00000006 0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
phandle = <0x00000009>;
watchdog@4 {
compatible = "kontron,sl28cpld-wdt";
reg = <0x00000004>;
};
fan@b {
compatible = "kontron,sl28cpld-fan";
reg = <0x0000000b>;
};
pwm0@c {
#pwm-cells = <0x00000002>;
compatible = "kontron,sl28cpld-pwm";
reg = <0x0000000c>;
phandle = <0x00000027>;
};
pwm1@e {
#pwm-cells = <0x00000002>;
compatible = "kontron,sl28cpld-pwm";
reg = <0x0000000e>;
phandle = <0x00000028>;
};
gpio0@10 {
compatible = "kontron,sl28cpld-gpio";
reg = <0x00000010>;
interrupt-parent = <0x0000000a>;
interrupts = <0x00000006 0x00000002>;
gpio-controller;
#gpio-cells = <0x00000002>;
gpio-line-names = "GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N", "GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N", "GPIO4_HDA_RST_N", "GPIO5_PWM_OUT", "GPIO6_TACHIN", "GPIO7";
interrupt-controller;
#interrupt-cells = <0x00000002>;
phandle = <0x00000029>;
};
gpio1@15 {
compatible = "kontron,sl28cpld-gpio";
reg = <0x00000015>;
interrupt-parent = <0x0000000a>;
interrupts = <0x00000006 0x00000002>;
gpio-controller;
#gpio-cells = <0x00000002>;
gpio-line-names = [47 50 49 4f 38 00 47 50 49 4f 39 00 47 50 49 4f 31 30 00 47 50 49 4f 31 31 00 00 00 00 00];
interrupt-controller;
#interrupt-cells = <0x00000002>;
phandle = <0x0000002a>;
};
gpo0@1a {
compatible = "kontron,sl28cpld-gpo";
reg = <0x0000001a>;
gpio-controller;
#gpio-cells = <0x00000002>;
gpio-line-names = * 0x0000000082801988 [0x00000072];
phandle = <0x0000001d>;
};
gpi0@1b {
compatible = "kontron,sl28cpld-gpi";
reg = <0x0000001b>;
gpio-controller;
#gpio-cells = <0x00000002>;
gpio-line-names = * 0x0000000082801a78 [0x00000052];
phandle = <0x0000001e>;
};
};
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x00000050>;
pagesize = <0x00000020>;
};
};
i2c@2010000 {
compatible = "fsl,vf610-i2c";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02010000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000022 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x00000025 0x00000008 0x00000001 0x00000024>;
status = "disabled";
phandle = <0x0000002b>;
};
i2c@2020000 {
compatible = "fsl,vf610-i2c";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02020000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000023 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x00000023 0x00000008 0x00000001 0x00000022>;
status = "disabled";
phandle = <0x0000002c>;
};
i2c@2030000 {
compatible = "fsl,vf610-i2c";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02030000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000023 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
dma-names;
dmas = <0x00000008 0x00000001 0x00000029 0x00000008 0x00000001 0x00000028>;
status = "okay";
phandle = <0x0000002d>;
};
i2c@2040000 {
compatible = "fsl,vf610-i2c";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02040000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x0000004a 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
dma-names;
dmas = <0x00000008 0x00000001 0x0000002b 0x00000008 0x00000001 0x0000002a>;
status = "okay";
phandle = <0x0000002e>;
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x00000050>;
pagesize = <0x00000020>;
};
};
i2c@2050000 {
compatible = "fsl,vf610-i2c";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02050000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x0000004a 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x0000002d 0x00000008 0x00000001 0x0000002c>;
status = "disabled";
phandle = <0x0000002f>;
};
i2c@2060000 {
compatible = "fsl,vf610-i2c";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02060000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x0000004b 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x0000002f 0x00000008 0x00000001 0x0000002e>;
status = "disabled";
phandle = <0x00000030>;
};
i2c@2070000 {
compatible = "fsl,vf610-i2c";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02070000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x0000004b 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x00000011 0x00000008 0x00000001 0x00000010>;
status = "disabled";
phandle = <0x00000031>;
};
spi@2100000 {
compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02100000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x0000001a 0x00000004>;
clock-names = "dspi";
clocks = <0x00000002 0x00000004 0x00000001>;
spi-num-chipselects = <0x00000005>;
little-endian;
status = "disabled";
phandle = <0x00000032>;
};
spi@2110000 {
compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02110000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x0000001a 0x00000004>;
clock-names = "dspi";
clocks = <0x00000002 0x00000004 0x00000001>;
spi-num-chipselects = <0x00000005>;
little-endian;
status = "disabled";
phandle = <0x00000033>;
};
spi@2120000 {
compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000000 0x02120000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x0000001a 0x00000004>;
clock-names = "dspi";
clocks = <0x00000002 0x00000004 0x00000001>;
spi-num-chipselects = <0x00000005>;
little-endian;
status = "disabled";
phandle = <0x00000034>;
};
can@2180000 {
xen,passthrough;
compatible = "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan";
reg = <0x00000000 0x02180000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000015 0x00000004>;
clocks = <0x00000007 0x00000002 0x00000004 0x00000001>;
clock-names = "ipg", "per";
status = "okay";
phandle = <0x00000035>;
};
can@2190000 {
xen,passthrough;
compatible = "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan";
reg = <0x00000000 0x02190000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000016 0x00000004>;
clocks = <0x00000007 0x00000002 0x00000004 0x00000001>;
clock-names = "ipg", "per";
status = "disabled";
phandle = <0x00000036>;
};
serial@21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x00000000 0x021c0500 0x00000000 0x00000100>;
interrupts = <0x00000000 0x00000020 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
status = "okay";
phandle = <0x00000037>;
};
serial@21c0600 {
xen,passthrough;
compatible = "fsl,ns16550", "ns16550a";
reg = <0x00000000 0x021c0600 0x00000000 0x00000100>;
interrupts = <0x00000000 0x00000020 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
status = "okay";
phandle = <0x00000038>;
};
serial@2260000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x00000000 0x02260000 0x00000000 0x00001000>;
interrupts = <0x00000000 0x000000e8 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
clock-names = "ipg";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x00000021 0x00000008 0x00000001 0x00000020>;
little-endian;
status = "disabled";
phandle = <0x00000039>;
};
serial@2270000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x00000000 0x02270000 0x00000000 0x00001000>;
interrupts = <0x00000000 0x000000e9 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
clock-names = "ipg";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x0000001f 0x00000008 0x00000001 0x0000001e>;
little-endian;
status = "okay";
phandle = <0x0000003a>;
};
serial@2280000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x00000000 0x02280000 0x00000000 0x00001000>;
interrupts = <0x00000000 0x000000ea 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
clock-names = "ipg";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x0000001d 0x00000008 0x00000001 0x0000001c>;
little-endian;
status = "disabled";
phandle = <0x0000003b>;
};
serial@2290000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x00000000 0x02290000 0x00000000 0x00001000>;
interrupts = <0x00000000 0x000000eb 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
clock-names = "ipg";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x0000001b 0x00000008 0x00000001 0x0000001a>;
little-endian;
status = "disabled";
phandle = <0x0000003c>;
};
serial@22a0000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x00000000 0x022a0000 0x00000000 0x00001000>;
interrupts = <0x00000000 0x000000ec 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
clock-names = "ipg";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x00000019 0x00000008 0x00000001 0x00000018>;
little-endian;
status = "disabled";
phandle = <0x0000003d>;
};
serial@22b0000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x00000000 0x022b0000 0x00000000 0x00001000>;
interrupts = <0x00000000 0x000000ed 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
clock-names = "ipg";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x00000017 0x00000008 0x00000001 0x00000016>;
little-endian;
status = "disabled";
phandle = <0x0000003e>;
};
dma-controller@22c0000 {
#stream-id-cells = <0x00000001>;
#dma-cells = <0x00000002>;
compatible = "fsl,vf610-edma";
reg = <0x00000000 0x022c0000 0x00000000 0x00010000 0x00000000 0x022d0000 0x00000000 0x00010000 0x00000000 0x022e0000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000038 0x00000004 0x00000000 0x00000038 0x00000004>;
interrupt-names = "edma-tx", "edma-err";
dma-channels = <0x00000020>;
clock-names = "dmamux0", "dmamux1";
clocks = <0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001>;
phandle = <0x00000008>;
};
gpio@2300000 {
compatible = "fsl,ls1028a-gpio", "fsl,qoriq-gpio";
reg = <0x00000000 0x02300000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000024 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
little-endian;
gpio-line-names = [00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 54 44 4f 00 54 43 4b 00 00 00 00 00 00 00 00 00];
phandle = <0x0000003f>;
};
gpio@2310000 {
compatible = "fsl,ls1028a-gpio", "fsl,qoriq-gpio";
reg = <0x00000000 0x02310000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000024 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
little-endian;
gpio-line-names = [00 00 00 00 00 00 54 4d 53 00 54 44 49 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00];
phandle = <0x0000000a>;
};
gpio@2320000 {
compatible = "fsl,ls1028a-gpio", "fsl,qoriq-gpio";
reg = <0x00000000 0x02320000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000025 0x00000004>;
gpio-controller;
#gpio-cells = <0x00000002>;
interrupt-controller;
#interrupt-cells = <0x00000002>;
little-endian;
phandle = <0x00000040>;
};
crypto@8000000 {
xen,passthrough;
compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
fsl,sec-era = <0x0000000a>;
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
ranges = <0x00000000 0x00000000 0x08000000 0x00100000>;
reg = <0x00000000 0x08000000 0x00000000 0x00100000>;
interrupts = <0x00000000 0x0000008b 0x00000004>;
dma-coherent;
phandle = <0x00000041>;
jr@10000 {
compatible = "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
reg = <0x00010000 0x00010000>;
interrupts = <0x00000000 0x0000008c 0x00000004>;
phandle = <0x00000042>;
};
jr@20000 {
compatible = "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
reg = <0x00020000 0x00010000>;
interrupts = <0x00000000 0x0000008d 0x00000004>;
phandle = <0x00000043>;
};
jr@30000 {
compatible = "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
reg = <0x00030000 0x00010000>;
interrupts = <0x00000000 0x0000008e 0x00000004>;
phandle = <0x00000044>;
};
jr@40000 {
compatible = "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
reg = <0x00040000 0x00010000>;
interrupts = <0x00000000 0x0000008f 0x00000004>;
phandle = <0x00000045>;
};
};
wdt@c000000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x00000000 0x0c000000 0x00000000 0x00001000>;
clocks = <0x00000002 0x00000004 0x0000000f 0x00000002 0x00000004 0x0000000f>;
clock-names = "apb_pclk", "wdog_clk";
phandle = <0x00000046>;
};
wdt@c010000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x00000000 0x0c010000 0x00000000 0x00001000>;
clocks = <0x00000002 0x00000004 0x0000000f 0x00000002 0x00000004 0x0000000f>;
clock-names = "apb_pclk", "wdog_clk";
phandle = <0x00000047>;
};
mmc@2140000 {
#stream-id-cells = <0x00000001>;
compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
reg = <0x00000000 0x02140000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x0000001c 0x00000004>;
clock-frequency = <0x00000000>;
clocks = <0x00000002 0x00000002 0x00000001>;
voltage-ranges = <0x00000708 0x00000708 0x00000ce4 0x00000ce4>;
sdhci,auto-cmd12;
little-endian;
bus-width = <0x00000004>;
status = "okay";
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
phandle = <0x00000048>;
};
mmc@2150000 {
#stream-id-cells = <0x00000001>;
compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
reg = <0x00000000 0x02150000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x0000003f 0x00000004>;
clock-frequency = <0x00000000>;
clocks = <0x00000002 0x00000002 0x00000001>;
voltage-ranges = <0x00000708 0x00000708 0x00000ce4 0x00000ce4>;
sdhci,auto-cmd12;
broken-cd;
little-endian;
bus-width = <0x00000008>;
status = "okay";
mmc-hs200-1_8v;
mmc-pwrseq = <0x0000000b>;
phandle = <0x00000049>;
};
sata@3200000 {
compatible = "fsl,ls1028a-ahci";
reg = <0x00000000 0x03200000 0x00000000 0x00010000 0x00000007 0x00100520 0x00000000 0x00000004>;
reg-names = "ahci", "sata-ecc";
interrupts = <0x00000000 0x00000085 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001>;
status = "disabled";
phandle = <0x0000004a>;
};
pcie@3400000 {
compatible = "fsl,ls1028a-pcie";
reg = <0x00000000 0x03400000 0x00000000 0x00100000 0x00000080 0x00000000 0x00000000 0x00002000>;
reg-names = "regs", "config";
interrupts = <0x00000000 0x0000006c 0x00000004 0x00000000 0x0000006d 0x00000004>;
interrupt-names = "pme", "aer";
#address-cells = <0x00000003>;
#size-cells = <0x00000002>;
device_type = "pci";
dma-coherent;
iommu-map = <0x00000000 0x0000000c 0x00000000 0x00000001>;
bus-range = <0x00000000 0x000000ff>;
ranges = <0x81000000 0x00000000 0x00000000 0x00000080 0x00010000 0x00000000 0x00010000 0x82000000 0x00000000 0x40000000 0x00000080 0x40000000 0x00000000 0x40000000>;
msi-parent = <0x0000000d>;
#interrupt-cells = <0x00000001>;
interrupt-map-mask = <0x00000000 0x00000000 0x00000000 0x00000007>;
interrupt-map = * 0x0000000082803bec [0x000000a0];
status = "disabled";
};
pcie@3500000 {
compatible = "fsl,ls1028a-pcie";
reg = <0x00000000 0x03500000 0x00000000 0x00100000 0x00000088 0x00000000 0x00000000 0x00002000>;
reg-names = "regs", "config";
interrupts = <0x00000000 0x00000071 0x00000004 0x00000000 0x00000072 0x00000004>;
interrupt-names = "pme", "aer";
#address-cells = <0x00000003>;
#size-cells = <0x00000002>;
device_type = "pci";
dma-coherent;
iommu-map = <0x00000000 0x0000000c 0x00000000 0x00000001>;
bus-range = <0x00000000 0x000000ff>;
ranges = <0x81000000 0x00000000 0x00000000 0x00000088 0x00010000 0x00000000 0x00010000 0x82000000 0x00000000 0x40000000 0x00000088 0x40000000 0x00000000 0x40000000>;
msi-parent = <0x0000000d>;
#interrupt-cells = <0x00000001>;
interrupt-map-mask = <0x00000000 0x00000000 0x00000000 0x00000007>;
interrupt-map = * 0x0000000082803e50 [0x000000a0];
status = "disabled";
};
pcie@1f0000000 {
compatible = "pci-host-ecam-generic";
reg = <0x00000001 0xf0000000 0x00000000 0x00100000>;
#address-cells = <0x00000003>;
#size-cells = <0x00000002>;
msi-parent = <0x0000000d>;
device_type = "pci";
bus-range = <0x00000000 0x00000000>;
dma-coherent;
msi-map = <0x00000000 0x0000000d 0x00000017 0x0000000e>;
iommu-map = <0x00000000 0x0000000c 0x00000017 0x0000000e>;
ranges = * 0x0000000082804004 [0x000000c4];
ethernet@0,0 {
#stream-id-cells = <0x00000001>;
compatible = "fsl,enetc";
reg = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>;
phy-handle = <0x0000000e>;
phy-connection-type = "sgmii";
status = "okay";
phandle = <0x0000004b>;
};
ethernet@0,1 {
#stream-id-cells = <0x00000001>;
compatible = "fsl,enetc";
reg = <0x00000100 0x00000000 0x00000000 0x00000000 0x00000000>;
phy-handle = <0x0000000f>;
phy-connection-type = "rgmii";
status = "okay";
phandle = <0x0000004c>;
};
ethernet@0,2 {
compatible = "fsl,enetc";
reg = <0x00000200 0x00000000 0x00000000 0x00000000 0x00000000>;
status = "disabled";
phandle = <0x0000004d>;
fixed-link {
speed = <0x000003e8>;
full-duplex;
};
};
mdio@0,3 {
compatible = "fsl,enetc-mdio";
reg = <0x00000300 0x00000000 0x00000000 0x00000000 0x00000000>;
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
phandle = <0x0000004e>;
ethernet-phy@5 {
reg = <0x00000005>;
phandle = <0x0000000e>;
};
ethernet-phy@4 {
reg = <0x00000004>;
status = "okay";
phandle = <0x0000000f>;
};
};
ethernet@0,4 {
compatible = "fsl,enetc-ptp";
reg = <0x00000400 0x00000000 0x00000000 0x00000000 0x00000000>;
clocks = <0x00000002 0x00000004 0x00000000>;
little-endian;
};
switch@0,5 {
compatible = "mscc,felix-switch";
reg = <0x00000500 0x00000000 0x00000000 0x00000000 0x00000000>;
interrupts = <0x00000000 0x0000005f 0x00000004>;
ports {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
port@0 {
reg = <0x00000000>;
status = "disabled";
phandle = <0x0000004f>;
};
port@1 {
reg = <0x00000001>;
status = "disabled";
phandle = <0x00000050>;
};
port@2 {
reg = <0x00000002>;
status = "disabled";
phandle = <0x00000051>;
};
port@3 {
reg = <0x00000003>;
status = "disabled";
phandle = <0x00000052>;
};
port@4 {
reg = <0x00000004>;
status = "disabled";
phandle = <0x00000053>;
fixed-link {
speed = <0x000003e8>;
full-duplex;
};
};
port@5 {
reg = <0x00000005>;
ethernet = <0x00000010>;
status = "disabled";
phandle = <0x00000054>;
fixed-link {
speed = <0x000003e8>;
full-duplex;
};
};
};
};
ethernet@0,6 {
compatible = "fsl,enetc";
reg = <0x00000600 0x00000000 0x00000000 0x00000000 0x00000000>;
status = "disabled";
phandle = <0x00000010>;
fixed-link {
speed = <0x000003e8>;
full-duplex;
};
};
};
iommu@5000000 {
mmu-masters = <0x00000049 0x00000800 0x00000057 0x00000012 0x0000004b 0x00000417 0x0000004c 0x00000418 0x00000008 0x00000020>;
compatible = "arm,mmu-500";
reg = <0x00000000 0x05000000 0x00000000 0x00800000>;
#global-interrupts = <0x00000008>;
#iommu-cells = <0x00000000>;
stream-match-mask = <0x00007c00>;
interrupts = * 0x0000000082804864 [0x00000360];
phandle = <0x0000000c>;
};
dma-controller@8380000 {
#stream-id-cells = <0x00000001>;
compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
reg = <0x00000000 0x08380000 0x00000000 0x00001000 0x00000000 0x08390000 0x00000000 0x00010000 0x00000000 0x083a0000 0x00000000 0x00040000>;
interrupts = <0x00000000 0x0000002b 0x00000004 0x00000000 0x000000fb 0x00000004 0x00000000 0x000000fc 0x00000004 0x00000000 0x000000fd 0x00000004 0x00000000 0x000000fe 0x00000004>;
interrupt-names = "qdma-error", "qdma-queue0", "qdma-queue1", "qdma-queue2", "qdma-queue3";
channels = <0x00000008>;
block-number = <0x00000001>;
block-offset = <0x00010000>;
queues = <0x00000002>;
status-sizes = <0x00000040>;
queue-sizes = <0x00000040 0x00000040>;
phandle = <0x00000057>;
};
gpu@f0c0000 {
xen,passthrough;
compatible = "fsl,ls1028a-gpu";
reg = <0x00000000 0x0f0c0000 0x00000000 0x00010000 0x00000000 0x80000000 0x00000000 0x80000000 0x00000000 0x00000000 0x00000000 0x03000000>;
reg-names = "base", "phys_baseaddr", "contiguous_mem";
interrupts = <0x00000000 0x000000dc 0x00000004>;
};
audio-controller@f100000 {
#sound-dai-cells = <0x00000000>;
compatible = "fsl,vf610-sai";
reg = <0x00000000 0x0f100000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000052 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x00000004 0x00000008 0x00000001 0x00000003>;
status = "disabled";
phandle = <0x00000058>;
};
audio-controller@f110000 {
#sound-dai-cells = <0x00000000>;
compatible = "fsl,vf610-sai";
reg = <0x00000000 0x0f110000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000052 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x00000006 0x00000008 0x00000001 0x00000005>;
status = "disabled";
phandle = <0x00000059>;
};
audio-controller@f120000 {
#sound-dai-cells = <0x00000000>;
compatible = "fsl,vf610-sai";
reg = <0x00000000 0x0f120000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000053 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x00000008 0x00000008 0x00000001 0x00000007>;
status = "disabled";
phandle = <0x0000005a>;
};
audio-controller@f130000 {
#sound-dai-cells = <0x00000000>;
compatible = "fsl,vf610-sai";
reg = <0x00000000 0x0f130000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000053 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x0000000a 0x00000008 0x00000001 0x00000009>;
status = "disabled";
phandle = <0x0000005b>;
};
audio-controller@f140000 {
#sound-dai-cells = <0x00000000>;
compatible = "fsl,vf610-sai";
reg = <0x00000000 0x0f140000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000054 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x0000000c 0x00000008 0x00000001 0x0000000b>;
status = "disabled";
phandle = <0x0000005c>;
};
audio-controller@f150000 {
#sound-dai-cells = <0x00000000>;
compatible = "fsl,vf610-sai";
reg = <0x00000000 0x0f150000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x00000054 0x00000004>;
clocks = <0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001 0x00000002 0x00000004 0x00000001>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";
dmas = <0x00000008 0x00000001 0x0000000e 0x00000008 0x00000001 0x0000000d>;
status = "disabled";
phandle = <0x0000005d>;
};
rcpm@1e34040 {
compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x00000000 0x01e34040 0x00000000 0x0000001c>;
#fsl,rcpm-wakeup-cells = <0x00000007>;
little-endian;
phandle = <0x00000016>;
};
timer@2800000 {
compatible = "fsl,ls1028a-ftm-alarm";
reg = <0x00000000 0x02800000 0x00000000 0x00010000>;
fsl,rcpm-wakeup = <0x00000016 0x00000000 0x00000000 0x00000000 0x00000000 0x00004000 0x00000000 0x00000000>;
interrupts = <0x00000000 0x0000002c 0x00000004>;
phandle = <0x0000005e>;
};
};
malidp@f080000 {
xen,passthrough;
compatible = "arm,mali-dp500";
reg = <0x00000000 0x0f080000 0x00000000 0x00010000>;
interrupts = <0x00000000 0x000000de 0x00000004 0x00000000 0x000000df 0x00000004>;
interrupt-names = "DE", "SE";
clocks = <0x00000017 0x00000018 0x00000018 0x00000019>;
clock-names = "pxlclk", "mclk", "aclk", "pclk";
arm,malidp-output-port-lines = [08 08 08];
phandle = <0x0000005f>;
port {
endpoint {
remote-endpoint = <0x0000001a>;
phandle = <0x0000001c>;
};
};
};
hdp@f200000 {
xen,passthrough;
compatible = "fsl,ls1028a-dp";
reg = <0x00000000 0x0f200000 0x00000000 0x000fffff>;
interrupts = <0x00000000 0x000000dd 0x00000004>;
clocks = <0x00000007 0x00000002 0x00000002 0x00000002 0x0000001b 0x0000001b 0x0000001b 0x0000001b 0x0000001b>;
clock-names = "clk_ipg", "clk_core", "clk_pxl", "clk_pxl_mux", "clk_pxl_link", "clk_apb", "clk_vif";
fsl,no_edid;
resolution = "3840x2160@60", "1920x1080@60", "1280x720@60", "720x480@60";
lane_mapping = <0x0000004e>;
edp_link_rate = <0x00000006>;
edp_num_lanes = <0x00000004>;
status = "okay";
phandle = <0x00000060>;
port {
endpoint {
remote-endpoint = <0x0000001c>;
phandle = <0x0000001a>;
};
};
};
emmc-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <0x0000001d 0x00000002 0x00000000>;
phandle = <0x0000000b>;
};
buttons0 {
compatible = "gpio-keys";
power-button {
interrupt-parent = <0x00000009>;
interrupts = <0x00000004 0x00000000>;
linux,code = <0x00000074>;
label = "Power";
wakeup-source;
};
sleep-button {
interrupt-parent = <0x00000009>;
interrupts = <0x00000005 0x00000000>;
linux,code = <0x0000008e>;
label = "Sleep";
wakeup-source;
};
};
buttons1 {
compatible = "gpio-keys-polled";
poll-interval = <0x000000c8>;
lid_switch {
linux,input-type = <0x00000005>;
linux,code = <0x00000000>;
gpios = <0x0000001e 0x00000004 0x00000001>;
label = "Lid";
phandle = <0x00000061>;
};
};
charger {
compatible = "gpio-charger";
charger-type = "battery";
gpios = <0x0000001e 0x00000006 0x00000001>;
charging-gpio = <0x0000001e 0x00000005 0x00000001>;
bat-low-gpio = <0x0000001e 0x00000003 0x00000001>;
};
__symbols__ {
cpu0 = "/cpus/cpu@0";
cpu1 = "/cpus/cpu@1";
l2 = "/cpus/l2-cache";
CPU_PW20 = "/idle-states/cpu-pw20";
sysclk = "/clock-sysclk";
osc_27m = "/clock-osc-27m";
dpclk = "/clock-display@f1f0000";
aclk = "/clock-axi";
pclk = "/clock-apb";
hdpclk = "/clock-hdpcore";
gic = "/interrupt-controller@6000000";
its = "/interrupt-controller@6000000/gic-its@6020000";
soc = "/soc";
ddr = "/soc/memory-controller@1080000";
dcfg = "/soc/syscon@1e00000";
rst = "/soc/syscon@1e60000";
scfg = "/soc/syscon@1fc0000";
clockgen = "/soc/clock-controller@1300000";
usb0 = "/soc/usb@3100000";
usb1 = "/soc/usb@3110000";
fspi = "/soc/spi@20c0000";
i2c0 = "/soc/i2c@2000000";
sl28cpld = "/soc/i2c@2000000/sl28cpld@4a";
pwm0 = "/soc/i2c@2000000/sl28cpld@4a/pwm0@c";
pwm1 = "/soc/i2c@2000000/sl28cpld@4a/pwm1@e";
cpld_gpio0 = "/soc/i2c@2000000/sl28cpld@4a/gpio0@10";
cpld_gpio1 = "/soc/i2c@2000000/sl28cpld@4a/gpio1@15";
cpld_gpo0 = "/soc/i2c@2000000/sl28cpld@4a/gpo0@1a";
cpld_gpi0 = "/soc/i2c@2000000/sl28cpld@4a/gpi0@1b";
i2c1 = "/soc/i2c@2010000";
i2c2 = "/soc/i2c@2020000";
i2c3 = "/soc/i2c@2030000";
i2c4 = "/soc/i2c@2040000";
i2c5 = "/soc/i2c@2050000";
i2c6 = "/soc/i2c@2060000";
i2c7 = "/soc/i2c@2070000";
dspi0 = "/soc/spi@2100000";
dspi1 = "/soc/spi@2110000";
dspi2 = "/soc/spi@2120000";
can0 = "/soc/can@2180000";
can1 = "/soc/can@2190000";
duart0 = "/soc/serial@21c0500";
duart1 = "/soc/serial@21c0600";
lpuart0 = "/soc/serial@2260000";
lpuart1 = "/soc/serial@2270000";
lpuart2 = "/soc/serial@2280000";
lpuart3 = "/soc/serial@2290000";
lpuart4 = "/soc/serial@22a0000";
lpuart5 = "/soc/serial@22b0000";
edma0 = "/soc/dma-controller@22c0000";
gpio1 = "/soc/gpio@2300000";
gpio2 = "/soc/gpio@2310000";
gpio3 = "/soc/gpio@2320000";
crypto = "/soc/crypto@8000000";
sec_jr0 = "/soc/crypto@8000000/jr@10000";
sec_jr1 = "/soc/crypto@8000000/jr@20000";
sec_jr2 = "/soc/crypto@8000000/jr@30000";
sec_jr3 = "/soc/crypto@8000000/jr@40000";
cluster1_core0_watchdog = "/soc/wdt@c000000";
cluster1_core1_watchdog = "/soc/wdt@c010000";
esdhc = "/soc/mmc@2140000";
esdhc1 = "/soc/mmc@2150000";
sata = "/soc/sata@3200000";
enetc_port0 = "/soc/pcie@1f0000000/ethernet@0,0";
enetc_port1 = "/soc/pcie@1f0000000/ethernet@0,1";
enetc_port2 = "/soc/pcie@1f0000000/ethernet@0,2";
enetc_mdio_pf3 = "/soc/pcie@1f0000000/mdio@0,3";
phy0 = "/soc/pcie@1f0000000/mdio@0,3/ethernet-phy@5";
phy1 = "/soc/pcie@1f0000000/mdio@0,3/ethernet-phy@4";
switch_port0 = "/soc/pcie@1f0000000/switch@0,5/ports/port@0";
switch_port1 = "/soc/pcie@1f0000000/switch@0,5/ports/port@1";
switch_port2 = "/soc/pcie@1f0000000/switch@0,5/ports/port@2";
switch_port3 = "/soc/pcie@1f0000000/switch@0,5/ports/port@3";
switch_port4 = "/soc/pcie@1f0000000/switch@0,5/ports/port@4";
switch_port5 = "/soc/pcie@1f0000000/switch@0,5/ports/port@5";
enetc_port3 = "/soc/pcie@1f0000000/ethernet@0,6";
tmu = "/soc/tmu@1f00000";
core_cluster_alert = "/soc/thermal-zones/core-cluster/trips/core-cluster-alert";
core_cluster_crit = "/soc/thermal-zones/core-cluster/trips/core-cluster-crit";
ddr_controller_alert = "/soc/thermal-zones/ddr-controller/trips/ddr-controller-alert";
ddr_controller_crit = "/soc/thermal-zones/ddr-controller/trips/ddr-controller-crit";
smmu = "/soc/iommu@5000000";
qdma = "/soc/dma-controller@8380000";
sai1 = "/soc/audio-controller@f100000";
sai2 = "/soc/audio-controller@f110000";
sai3 = "/soc/audio-controller@f120000";
sai4 = "/soc/audio-controller@f130000";
sai5 = "/soc/audio-controller@f140000";
sai6 = "/soc/audio-controller@f150000";
rcpm = "/soc/rcpm@1e34040";
ftm_alarm0 = "/soc/timer@2800000";
display0 = "/malidp@f080000";
dp0_out = "/malidp@f080000/port/endpoint";
display1 = "/hdp@f200000";
dp1_out = "/hdp@f200000/port/endpoint";
emmc_pwrseq = "/emmc-pwrseq";
lid_sw = "/buttons1/lid_switch";
};
};
next parent reply other threads:[~2020-11-17 23:54 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <AM4PR0501MB2227089FDDF0209EF6E215D9E6100@AM4PR0501MB2227.eurprd05.prod.outlook.com>
[not found] ` <AM4PR0501MB22274E52A5A3BE912D477D8CE6EA0@AM4PR0501MB2227.eurprd05.prod.outlook.com>
[not found] ` <HE1PR05MB47941E23CE053CE72F18867C8BEA0@HE1PR05MB4794.eurprd05.prod.outlook.com>
[not found] ` <alpine.DEB.2.21.2011091858010.21307@sstabellini-ThinkPad-T480s>
[not found] ` <HE1PR05MB4794B5C57A54A29A48EE8EAE8BE90@HE1PR05MB4794.eurprd05.prod.outlook.com>
[not found] ` <alpine.DEB.2.21.2011101842500.21307@sstabellini-ThinkPad-T480s>
[not found] ` <DB6PR0402MB27608A03EC717053E392A92988E80@DB6PR0402MB2760.eurprd04.prod.outlook.com>
[not found] ` <HE1PR05MB47940ED4E5FDC0BADC54C8E78BE80@HE1PR05MB4794.eurprd05.prod.outlook.com>
[not found] ` <DB6PR0402MB2760CEEABA9F52CDEB27C1DB88E80@DB6PR0402MB2760.eurprd04.prod.outlook.com>
[not found] ` <HE1PR05MB47944761ED6A26D3E2CE15868BE40@HE1PR05MB4794.eurprd05.prod.outlook.com>
[not found] ` <alpine.DEB.2.21.2011161656080.20906@sstabellini-ThinkPad-T480s>
[not found] ` <HE1PR05MB4794569AC67109AF8B6517268BE20@HE1PR05MB4794.eurprd05.prod.outlook.com>
2020-11-17 23:53 ` Stefano Stabellini [this message]
2020-11-18 12:03 ` Xen data from meta-virtualization layer Rahul Singh
2020-11-18 12:23 ` AW: AW: AW: AW: " Julien Grall
2020-11-22 22:55 ` AW: " Leo Krueger
2020-11-23 11:41 ` Rahul Singh
2020-11-23 18:41 ` Julien Grall
2020-11-23 22:31 ` AW: " Leo Krueger
2020-11-23 18:27 ` AW: AW: AW: AW: " Julien Grall
2020-11-24 23:11 ` AW: " Leo Krueger
2020-11-25 2:14 ` Stefano Stabellini
2022-02-04 13:58 ` Michael Walle
2022-02-04 21:11 ` Stefano Stabellini
2022-02-04 22:42 ` Michael Walle
2022-02-04 23:29 ` Julien Grall
2022-02-04 23:59 ` Michael Walle
2022-02-05 12:41 ` Julien Grall
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