Hi Rahul,

Unfortunately, after bisecting, I discovered a few more breakages due to
your smmuv1 series (commits e889809b .. 3e6047ddf) on Xilinx ZynqMP. I
attached the DTB as reference. Please note that I made sure to
cherry-pick "xen/arm: smmuv1: Revert associating the group pointer with
the S2CR" during bisection. So the errors are present also on staging.

The first breakage is an error at boot time in smmu.c#find_smmu_master,
see log1. I think it is due to the lack of ability to parse the new smmu
bindings in the old smmu driver.

After removing all the "smmus" and "#stream-id-cells" properties in
device tree, I get past the previous error, everything seems to be OK at
early boot, but I actually get SMMU errors as soon as dom0 starting
using devices:

(XEN) smmu: /smmu@fd800000: Unexpected global fault, this could be serious
(XEN) smmu: /smmu@fd800000:     GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00000877, GFSYNR2 0x00000000
[   10.419681] macb ff0e0000.ethernet eth0: DMA bus error: HRESP not OK
[   10.426452] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

Do you think you'll be able to help fix them?


You should be able to reproduce the two issues using Xilinx QEMU (but to
be honest I haven't tested it on QEMU yet, I was testing on real
hardware):
- clone and compile xilinx QEMU https://github.com/Xilinx/qemu.git
  ./configure  --target-list=aarch64-softmmu
  make
- clone and build git://github.com/Xilinx/qemu-devicetrees.git
- use the attached script to run it
    - kernel can be upstream defconfig 5.10

Cheers,

Stefano