From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Bjorn Helgaas <bhelgaas@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>
Cc: Arnd Bergmann <arnd@kernel.org>,
Nikolai Zhubr <zhubr.2@gmail.com>,
Michal Necasek <mnecasek@yahoo.com>,
Dmitry Osipenko <dmitry.osipenko@collabora.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
x86@kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v4 4/5] x86/PCI: Fix ALi M1487 (IBC) PIRQ router link value interpretation
Date: Thu, 31 Mar 2022 08:11:10 +0100 (BST) [thread overview]
Message-ID: <alpine.DEB.2.21.2203310013270.44113@angie.orcam.me.uk> (raw)
In-Reply-To: <alpine.DEB.2.21.2203301619340.22465@angie.orcam.me.uk>
Fix an issue with commit 1ce849c75534 ("x86/PCI: Add support for the ALi
M1487 (IBC) PIRQ router") and correct ALi M1487 (IBC) PIRQ router link
value (`pirq' cookie) interpretation according to findings in the BIOS.
Credit to Nikolai Zhubr for the detective work as to the bit layout.
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Cc: Nikolai Zhubr <zhubr.2@gmail.com>
Fixes: 1ce849c75534 ("x86/PCI: Add support for the ALi M1487 (IBC) PIRQ router")
Cc: stable@vger.kernel.org # v5.15+
---
No change from v3.
New change in v3.
---
arch/x86/pci/irq.c | 19 ++++++++++++++++---
1 file changed, 16 insertions(+), 3 deletions(-)
linux-x86-pirq-router-finali-link.diff
Index: linux-macro/arch/x86/pci/irq.c
===================================================================
--- linux-macro.orig/arch/x86/pci/irq.c
+++ linux-macro/arch/x86/pci/irq.c
@@ -337,6 +337,15 @@ static void write_pc_conf_nybble(u8 base
pc_conf_set(reg, x);
}
+/*
+ * FinALi pirq rules are as follows:
+ *
+ * - bit 0 selects between INTx Routing Table Mapping Registers,
+ *
+ * - bit 3 selects the nibble within the INTx Routing Table Mapping Register,
+ *
+ * - bits 7:4 map to bits 3:0 of the PCI INTx Sensitivity Register.
+ */
static int pirq_finali_get(struct pci_dev *router, struct pci_dev *dev,
int pirq)
{
@@ -344,11 +353,13 @@ static int pirq_finali_get(struct pci_de
0, 9, 3, 10, 4, 5, 7, 6, 0, 11, 0, 12, 0, 14, 0, 15
};
unsigned long flags;
+ u8 index;
u8 x;
+ index = (pirq & 1) << 1 | (pirq & 8) >> 3;
raw_spin_lock_irqsave(&pc_conf_lock, flags);
pc_conf_set(PC_CONF_FINALI_LOCK, PC_CONF_FINALI_LOCK_KEY);
- x = irqmap[read_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, pirq - 1)];
+ x = irqmap[read_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, index)];
pc_conf_set(PC_CONF_FINALI_LOCK, 0);
raw_spin_unlock_irqrestore(&pc_conf_lock, flags);
return x;
@@ -362,13 +373,15 @@ static int pirq_finali_set(struct pci_de
};
u8 val = irqmap[irq];
unsigned long flags;
+ u8 index;
if (!val)
return 0;
+ index = (pirq & 1) << 1 | (pirq & 8) >> 3;
raw_spin_lock_irqsave(&pc_conf_lock, flags);
pc_conf_set(PC_CONF_FINALI_LOCK, PC_CONF_FINALI_LOCK_KEY);
- write_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, pirq - 1, val);
+ write_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, index, val);
pc_conf_set(PC_CONF_FINALI_LOCK, 0);
raw_spin_unlock_irqrestore(&pc_conf_lock, flags);
return 1;
@@ -377,7 +390,7 @@ static int pirq_finali_set(struct pci_de
static int pirq_finali_lvl(struct pci_dev *router, struct pci_dev *dev,
int pirq, int irq)
{
- u8 mask = ~(1u << (pirq - 1));
+ u8 mask = ~((pirq & 0xf0u) >> 4);
unsigned long flags;
u8 trig;
next prev parent reply other threads:[~2022-03-31 7:12 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-31 7:10 [PATCH v4 0/5] x86/PCI: Improve $PIR and add $IRT PIRQ routing support Maciej W. Rozycki
2022-03-31 7:10 ` [PATCH v4 1/5] x86/PCI: Add PIRQ routing table range checks Maciej W. Rozycki
2022-04-10 10:54 ` [tip: x86/irq] " tip-bot2 for Maciej W. Rozycki
2022-03-31 7:11 ` [PATCH v4 2/5] x86/PCI: Handle PIRQ routing tables with no router device given Maciej W. Rozycki
2022-04-10 10:54 ` [tip: x86/irq] " tip-bot2 for Maciej W. Rozycki
2022-03-31 7:11 ` [PATCH v4 3/5] x86/PCI: Add $IRT PIRQ routing table support Maciej W. Rozycki
2022-03-31 20:57 ` Dmitry Osipenko
2022-04-10 10:54 ` [tip: x86/irq] " tip-bot2 for Maciej W. Rozycki
2022-03-31 7:11 ` Maciej W. Rozycki [this message]
2022-04-10 10:54 ` [tip: x86/irq] x86/PCI: Fix ALi M1487 (IBC) PIRQ router link value interpretation tip-bot2 for Maciej W. Rozycki
2022-03-31 7:11 ` [PATCH v4 5/5] x86/PCI: Fix coding style in PIRQ table verification Maciej W. Rozycki
2022-04-10 10:54 ` [tip: x86/irq] " tip-bot2 for Maciej W. Rozycki
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