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From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>,
	linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v5 2/5] serial: 8250: Correct the clock for EndRun PTP/1588 PCIe device
Date: Mon, 18 Apr 2022 16:27:16 +0100 (BST)	[thread overview]
Message-ID: <alpine.DEB.2.21.2204181515270.9383@angie.orcam.me.uk> (raw)
In-Reply-To: <alpine.DEB.2.21.2204181506000.9383@angie.orcam.me.uk>

The EndRun PTP/1588 dual serial port device is based on the Oxford 
Semiconductor OXPCIe952 UART device with the PCI vendor:device ID set 
for EndRun Technologies and is therefore driven by a fixed 62.5MHz clock 
input derived from the 100MHz PCI Express clock.  The clock rate is 
divided by the oversampling rate of 16 as it is supplied to the baud 
rate generator, yielding the baud base of 3906250.

Replace the incorrect baud base of 4000000 with the right value of 
3906250 then, complementing commit 6cbe45d8ac93 ("serial: 8250: Correct 
the clock for OxSemi PCIe devices").

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Fixes: 1bc8cde46a159 ("8250_pci: Added driver for Endrun Technologies PTP PCIe card.")
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
---
Changes from v4:

- Reorder as 2/5 (from 1/5).

New change in v4, factored out from 2/5.
---
 drivers/tty/serial/8250/8250_pci.c |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

linux-serial-8250-endrun-pcie-clock.diff
Index: linux-macro/drivers/tty/serial/8250/8250_pci.c
===================================================================
--- linux-macro.orig/drivers/tty/serial/8250/8250_pci.c
+++ linux-macro/drivers/tty/serial/8250/8250_pci.c
@@ -2667,7 +2667,7 @@ enum pci_board_num_t {
 	pbn_panacom2,
 	pbn_panacom4,
 	pbn_plx_romulus,
-	pbn_endrun_2_4000000,
+	pbn_endrun_2_3906250,
 	pbn_oxsemi,
 	pbn_oxsemi_1_3906250,
 	pbn_oxsemi_2_3906250,
@@ -3195,10 +3195,10 @@ static struct pciserial_board pci_boards
 	* signal now many ports are available
 	* 2 port 952 Uart support
 	*/
-	[pbn_endrun_2_4000000] = {
+	[pbn_endrun_2_3906250] = {
 		.flags		= FL_BASE0,
 		.num_ports	= 2,
-		.base_baud	= 4000000,
+		.base_baud	= 3906250,
 		.uart_offset	= 0x200,
 		.first_offset	= 0x1000,
 	},
@@ -4128,7 +4128,7 @@ static const struct pci_device_id serial
 	*/
 	{	PCI_VENDOR_ID_ENDRUN, PCI_DEVICE_ID_ENDRUN_1588,
 		PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-		pbn_endrun_2_4000000 },
+		pbn_endrun_2_3906250 },
 	/*
 	 * Quatech cards. These actually have configurable clocks but for
 	 * now we just use the default.

  parent reply	other threads:[~2022-04-18 15:47 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-18 15:27 [PATCH v5 0/5] serial: 8250: Fixes for Oxford Semiconductor 950 UARTs Maciej W. Rozycki
2022-04-18 15:27 ` [PATCH v5 1/5] serial: 8250: Also set sticky MCR bits in console restoration Maciej W. Rozycki
2022-04-18 15:27 ` Maciej W. Rozycki [this message]
2022-04-18 15:27 ` [PATCH v5 3/5] serial: 8250: Fold EndRun device support into OxSemi Tornado code Maciej W. Rozycki
2022-04-18 15:27 ` [PATCH v5 4/5] serial: 8250: Export ICR access helpers for internal use Maciej W. Rozycki
2022-04-18 15:27 ` [PATCH v5 5/5] serial: 8250: Add proper clock handling for OxSemi PCIe devices Maciej W. Rozycki

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