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From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Rob Landley <rob@landley.net>,
	John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,
	Sergey Shtylyov <s.shtylyov@omp.ru>,
	Rich Felker <dalias@libc.org>,
	Linux-sh list <linux-sh@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Yoshinori Sato <ysato@users.sourceforge.jp>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Subject: Re: [PATCH v3] sh: avoid using IRQ0 on SH3/4
Date: Tue, 3 May 2022 20:46:45 +0100 (BST)	[thread overview]
Message-ID: <alpine.DEB.2.21.2205032045220.14935@angie.orcam.me.uk> (raw)
In-Reply-To: <CAMuHMdUZ-fTKPk1kXodjg1yi5vm3RZJ=wO9o5afA81yNvt0KYA@mail.gmail.com>

On Tue, 3 May 2022, Geert Uytterhoeven wrote:

> > Sounds like it's now outside of the IRQ range allocation, but I can't find where
> > that's requested when registering the controller? (What is a "swizzle" anyway?)
> 
> PCI slots have 4 interrupts (#A, #B, #C, #D). In machines with
> multiple slots, the interrupts lines are "swizzled", to avoid that all cards
> using a single interrupt are mapped to the same host interrupt.

 Especially as single-function devices are required to use INTA.

  Maciej

  reply	other threads:[~2022-05-03 19:46 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-27 18:46 Sergey Shtylyov
2022-04-27 19:24 ` Sergey Shtylyov
2022-04-29 14:24 ` John Paul Adrian Glaubitz
2022-04-29 14:39   ` Greg Kroah-Hartman
2022-04-29 17:16   ` Rich Felker
2022-05-01 17:58     ` Sergey Shtylyov
2022-05-01 18:09       ` Sergey Shtylyov
2022-04-30 10:30   ` Rob Landley
2022-05-01 10:19     ` John Paul Adrian Glaubitz
2022-05-02  8:37     ` Geert Uytterhoeven
2022-05-02 20:07       ` Rob Landley
2022-05-03  7:02         ` Geert Uytterhoeven
2022-05-03 19:46           ` Maciej W. Rozycki [this message]
2022-05-02 20:56       ` Sergey Shtylyov
2022-05-03  6:58         ` Geert Uytterhoeven
2022-05-03 19:33         ` Sergey Shtylyov

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