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From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Stefan Roese <sr@denx.de>, Jim Wilson <wilson@tuliptree.org>,
	David Abdurachmanov <david.abdurachmanov@gmail.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v5 1/5] PCI: Consistently report presence of PCIe link registers
Date: Sat, 17 Sep 2022 13:03:09 +0100 (BST)	[thread overview]
Message-ID: <alpine.DEB.2.21.2209100057070.2275@angie.orcam.me.uk> (raw)
In-Reply-To: <alpine.DEB.2.21.2209061238050.2275@angie.orcam.me.uk>

Consistently with commit c8b303d0206b ("PCI: Remove PCIe Capability 
version checks") only consider the PCI Express capability's Link Control 
2, etc. registers present if the Link Control register is.

Before said commit with PCI Express capability versions higher than one 
all link registers used to be considered present, however starting from 
said commit Link Control, etc. original registers are only considered 
present in devices with links, but Link Control 2, etc. registers 
continue being considered always present even though likewise they are 
only present in devices with links.

Fix the inconsistency then.

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
---
New change in v5.
---
 drivers/pci/access.c |    8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

linux-pcie-cap-has-lnkctl2.diff
Index: linux-macro/drivers/pci/access.c
===================================================================
--- linux-macro.orig/drivers/pci/access.c
+++ linux-macro/drivers/pci/access.c
@@ -350,6 +350,11 @@ bool pcie_cap_has_lnkctl(const struct pc
 	       type == PCI_EXP_TYPE_PCIE_BRIDGE;
 }
 
+static inline bool pcie_cap_has_lnkctl2(const struct pci_dev *dev)
+{
+	return pcie_cap_has_lnkctl(dev) && pcie_cap_version(dev) > 1;
+}
+
 static inline bool pcie_cap_has_sltctl(const struct pci_dev *dev)
 {
 	return pcie_downstream_port(dev) &&
@@ -390,10 +395,11 @@ static bool pcie_capability_reg_implemen
 		return pcie_cap_has_rtctl(dev);
 	case PCI_EXP_DEVCAP2:
 	case PCI_EXP_DEVCTL2:
+		return pcie_cap_version(dev) > 1;
 	case PCI_EXP_LNKCAP2:
 	case PCI_EXP_LNKCTL2:
 	case PCI_EXP_LNKSTA2:
-		return pcie_cap_version(dev) > 1;
+		return pcie_cap_has_lnkctl2(dev);
 	default:
 		return false;
 	}

  reply	other threads:[~2022-09-17 12:03 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-17 12:03 [PATCH v5 0/5] pci: Work around ASMedia ASM2824 PCIe link training failures Maciej W. Rozycki
2022-09-17 12:03 ` Maciej W. Rozycki [this message]
2022-11-07 21:27   ` [PATCH v5 1/5] PCI: Consistently report presence of PCIe link registers Bjorn Helgaas
2022-09-17 12:03 ` [PATCH v5 2/5] PCI: Export `pcie_cap_has_lnkctl2' Maciej W. Rozycki
2022-09-17 12:03 ` [PATCH v5 3/5] PCI: Export PCI link retrain timeout Maciej W. Rozycki
2022-09-17 12:03 ` [PATCH v5 4/5] PCI: Execute `quirk_enable_clear_retrain_link' earlier Maciej W. Rozycki
2022-09-17 12:03 ` [PATCH v5 5/5] PCI: Work around PCIe link training failures Maciej W. Rozycki
2022-11-03 23:13   ` Bjorn Helgaas
2022-11-03 23:41     ` Pali Rohár
2022-11-04  0:01       ` Bjorn Helgaas
2022-11-09  2:57         ` Maciej W. Rozycki
2022-11-09  5:04           ` Bjorn Helgaas
2022-11-09 20:16             ` Alex Williamson
2022-11-29  9:57               ` Maciej W. Rozycki
2022-11-29  9:57             ` Maciej W. Rozycki
2022-10-09 14:14 ` [PATCH v5 0/5] pci: Work around ASMedia ASM2824 " Pali Rohár
2022-11-01 23:07   ` Pali Rohár

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