Changing SiFive Unleashed core clock rate on 5.x kernel

Changing SiFive Unleashed core clock rate on 5.x kernel

[Carlos Eduardo de Paula]

Back in 4.x kernel, we could set the board clock rate by echoing like:

echo 1450000000 > /sys/devices/platform/soc/10000000.prci/rate

Now with Kernel 5.x and with the board DTB, what's the correct way to
set this clock rate? I tried changing RTCCLK_FREQ from 1000000 to
1450000 but I got some clock skew during use.

Is there anywhere else this need to be set?

Thanks


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Re: Changing SiFive Unleashed core clock rate on 5.x kernel

[Paul Walmsley]

On Mon, 12 Aug 2019, Carlos Eduardo de Paula wrote:

> Back in 4.x kernel, we could set the board clock rate by echoing like:
> 
> echo 1450000000 > /sys/devices/platform/soc/10000000.prci/rate
> 
> Now with Kernel 5.x and with the board DTB, what's the correct way to
> set this clock rate? I tried changing RTCCLK_FREQ from 1000000 to
> 1450000 but I got some clock skew during use.

RTCCLK is used for timekeeping, so changing it won't help.

> Is there anywhere else this need to be set?

There are some experimental patches here:

https://github.com/sifive/riscv-linux/tree/dev/paulw/cpufreq-dt-aloe-v5.3-rc4

Only the userspace governor is enabled - for one-off, manual frequency 
changes, like the one you mentioned above.  During frequency change stress 
tests, or when a CPUFreq governor is enabled that causes more frequent 
rate changes, either the board or the serial console will hang.  So more 
debugging work is needed before this can go upstream.


- Paul

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Re: Changing SiFive Unleashed core clock rate on 5.x kernel

[Paul Walmsley]

On Tue, 13 Aug 2019, Paul Walmsley wrote:

> On Mon, 12 Aug 2019, Carlos Eduardo de Paula wrote:
> 
> > Now with Kernel 5.x and with the board DTB, what's the correct way to
> > set this clock rate?
> 
> There are some experimental patches here:
> 
> https://github.com/sifive/riscv-linux/tree/dev/paulw/cpufreq-dt-aloe-v5.3-rc4
> 
> Only the userspace governor is enabled - for one-off, manual frequency 
> changes, like the one you mentioned above.

By the way, the command lines to change this would be the usual CPUFreq 
sysfs changes.  Something like this:

echo userspace > /sys/devices/system/cpu/cpufreq/policy0/scaling_governor
echo 1400000 > /sys/devices/system/cpu/cpufreq/policy0/scaling_setspeed


- Paul

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Re: Changing SiFive Unleashed core clock rate on 5.x kernel

[Carlos Eduardo de Paula]

Got it, just to be clear, the sysfs changes only work on this 5.3 tree
and patches right? Not on my current 5.2-rc7.

Thanks!

On Tue, Aug 13, 2019 at 11:09 PM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
> On Tue, 13 Aug 2019, Paul Walmsley wrote:
>
> > On Mon, 12 Aug 2019, Carlos Eduardo de Paula wrote:
> >
> > > Now with Kernel 5.x and with the board DTB, what's the correct way to
> > > set this clock rate?
> >
> > There are some experimental patches here:
> >
> > https://github.com/sifive/riscv-linux/tree/dev/paulw/cpufreq-dt-aloe-v5.3-rc4
> >
> > Only the userspace governor is enabled - for one-off, manual frequency
> > changes, like the one you mentioned above.
>
> By the way, the command lines to change this would be the usual CPUFreq
> sysfs changes.  Something like this:
>
> echo userspace > /sys/devices/system/cpu/cpufreq/policy0/scaling_governor
> echo 1400000 > /sys/devices/system/cpu/cpufreq/policy0/scaling_setspeed
>
>
> - Paul



-- 
________________________________________
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Re: Changing SiFive Unleashed core clock rate on 5.x kernel

[Paul Walmsley]

On Fri, 16 Aug 2019, Carlos Eduardo de Paula wrote:

> Got it, just to be clear, the sysfs changes only work on this 5.3 tree
> and patches right? Not on my current 5.2-rc7.

Those three patches in the branch that I sent you seem to work about as 
well on v5.2 as they do on v5.3-rc4.

v5.2-rc7 by itself won't do anything in this regard.  Those patches (or 
ones like them) are necessary.


- Paul

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Re: Changing SiFive Unleashed core clock rate on 5.x kernel

[Carlos Eduardo de Paula]

Hi Paul, I've built that 5.3 kernel and also used the DTs on my 5.2
Kernel but on both cases the network interface didn't come up.

I used both defconfig and my own .config, after this I've built latest
OpenSBI with the DT with command:

make CROSS_COMPILE=riscv64-unknown-linux-gnu- \
    PLATFORM=sifive/fu540 \
    FW_PAYLOAD_PATH=../linux/arch/riscv/boot/Image \
    FW_PAYLOAD_FDT_PATH=../linux/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb


Any adjustment I need?

On Fri, Aug 16, 2019 at 4:50 PM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
> On Fri, 16 Aug 2019, Carlos Eduardo de Paula wrote:
>
> > Got it, just to be clear, the sysfs changes only work on this 5.3 tree
> > and patches right? Not on my current 5.2-rc7.
>
> Those three patches in the branch that I sent you seem to work about as
> well on v5.2 as they do on v5.3-rc4.
>
> v5.2-rc7 by itself won't do anything in this regard.  Those patches (or
> ones like them) are necessary.
>
>
> - Paul



-- 
________________________________________
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me@carlosedp.com
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http://twitter.com/carlosedp
Linkedin
________________________________________

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Re: Changing SiFive Unleashed core clock rate on 5.x kernel

[Paul Walmsley]

On Fri, 16 Aug 2019, Carlos Eduardo de Paula wrote:

> Hi Paul

Hi.  Just as an aside, kernel list etiquette usually disapproves of
top-posting.  Better to find out sooner rather than later, I guess...

> I've built that 5.3 kernel and also used the DTs on my 5.2 Kernel but on 
> both cases the network interface didn't come up.
> 
> I used both defconfig and my own .config, after this I've built latest
> OpenSBI with the DT with command:
> 
> make CROSS_COMPILE=riscv64-unknown-linux-gnu- \
>     PLATFORM=sifive/fu540 \
>     FW_PAYLOAD_PATH=../linux/arch/riscv/boot/Image \
>     FW_PAYLOAD_FDT_PATH=../linux/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb
> 
> 
> Any adjustment I need?

For v5.3-rc4, you'll probably need this patch:

https://lore.kernel.org/linux-riscv/1563534631-15897-2-git-send-email-yash.shah@sifive.com/

and you'll also need something like this for v5.2:

https://lore.kernel.org/linux-riscv/1563534631-15897-3-git-send-email-yash.shah@sifive.com/


- Paul

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Re: Changing SiFive Unleashed core clock rate on 5.x kernel

[Carlos Eduardo de Paula]

On Fri, Aug 16, 2019 at 5:57 PM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
> On Fri, 16 Aug 2019, Carlos Eduardo de Paula wrote:
>
> > Hi Paul
>
> Hi.  Just as an aside, kernel list etiquette usually disapproves of
> top-posting.  Better to find out sooner rather than later, I guess...
>
> > I've built that 5.3 kernel and also used the DTs on my 5.2 Kernel but on
> > both cases the network interface didn't come up.
> >
> > I used both defconfig and my own .config, after this I've built latest
> > OpenSBI with the DT with command:
> >
> > make CROSS_COMPILE=riscv64-unknown-linux-gnu- \
> >     PLATFORM=sifive/fu540 \
> >     FW_PAYLOAD_PATH=../linux/arch/riscv/boot/Image \
> >     FW_PAYLOAD_FDT_PATH=../linux/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb
> >
> >
> > Any adjustment I need?
>
> For v5.3-rc4, you'll probably need this patch:
>
> https://lore.kernel.org/linux-riscv/1563534631-15897-2-git-send-email-yash.shah@sifive.com/
>
> and you'll also need something like this for v5.2:
>
> https://lore.kernel.org/linux-riscv/1563534631-15897-3-git-send-email-yash.shah@sifive.com/
>
>
> - Paul

Thanks for the tip Paul and for being very helpful!

I've applied the 5.3 patch you pointed and it worked!

Thanks again!

-- 
________________________________________
Carlos Eduardo de Paula
me@carlosedp.com
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http://twitter.com/carlosedp
Linkedin
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Re: Changing SiFive Unleashed core clock rate on 5.x kernel

[Carlos Eduardo de Paula]

On Fri, Aug 16, 2019 at 6:17 PM Carlos Eduardo de Paula
<me@carlosedp.com> wrote:
>
> On Fri, Aug 16, 2019 at 5:57 PM Paul Walmsley <paul.walmsley@sifive.com> wrote:
> >
> > On Fri, 16 Aug 2019, Carlos Eduardo de Paula wrote:
> >
> > > Hi Paul
> >
> > Hi.  Just as an aside, kernel list etiquette usually disapproves of
> > top-posting.  Better to find out sooner rather than later, I guess...
> >
> > > I've built that 5.3 kernel and also used the DTs on my 5.2 Kernel but on
> > > both cases the network interface didn't come up.
> > >
> > > I used both defconfig and my own .config, after this I've built latest
> > > OpenSBI with the DT with command:
> > >
> > > make CROSS_COMPILE=riscv64-unknown-linux-gnu- \
> > >     PLATFORM=sifive/fu540 \
> > >     FW_PAYLOAD_PATH=../linux/arch/riscv/boot/Image \
> > >     FW_PAYLOAD_FDT_PATH=../linux/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb
> > >
> > >
> > > Any adjustment I need?
> >
> > For v5.3-rc4, you'll probably need this patch:
> >
> > https://lore.kernel.org/linux-riscv/1563534631-15897-2-git-send-email-yash.shah@sifive.com/
> >
> > and you'll also need something like this for v5.2:
> >
> > https://lore.kernel.org/linux-riscv/1563534631-15897-3-git-send-email-yash.shah@sifive.com/
> >
> >
> > - Paul
>
> Thanks for the tip Paul and for being very helpful!
>
> I've applied the 5.3 patch you pointed and it worked!
>
> Thanks again!
>
> --
> ________________________________________
> Carlos Eduardo de Paula
> me@carlosedp.com
> http://carlosedp.com
> http://twitter.com/carlosedp
> Linkedin
> ________________________________________

BTW, here are some results with 1Ghz and 1.4Ghz using 7zip benchmark:

## With 1Ghz clock

7-Zip 16.02 : Copyright (c) 1999-2016 Igor Pavlov : 2016-05-21
p7zip Version 16.02 (locale=en_US.UTF-8,Utf16=on,HugeFiles=on,64 bits,4 CPUs LE)

LE
CPU Freq: 32000000 64000000 64000000 64000000 128000000 256000000
512000000 1024000000 2048000000

RAM size:    7973 MB,  # CPU hardware threads:   4
RAM usage:    882 MB,  # Benchmark threads:      4

                       Compressing  |                  Decompressing
Dict     Speed Usage    R/U Rating  |      Speed Usage    R/U Rating
         KiB/s     %   MIPS   MIPS  |      KiB/s     %   MIPS   MIPS

22:       1333   297    437   1298  |      27862   398    597   2377
23:       1322   303    445   1347  |      27705   400    600   2397
24:       1301   306    457   1400  |      27273   399    601   2394
25:       1300   314    473   1484  |      26903   399    600   2394
----------------------------------  | ------------------------------
Avr:             305    453   1382  |              399    599   2391
Tot:             352    526   1886

## With 1.4Ghz Clock

7-Zip 16.02 : Copyright (c) 1999-2016 Igor Pavlov : 2016-05-21
p7zip Version 16.02 (locale=en_US.UTF-8,Utf16=on,HugeFiles=on,64 bits,4 CPUs LE)

LE
CPU Freq: 64000000 - 64000000 - 128000000 256000000 512000000
1024000000 2048000000

RAM size:    7973 MB,  # CPU hardware threads:   4
RAM usage:    882 MB,  # Benchmark threads:      4

                       Compressing  |                  Decompressing
Dict     Speed Usage    R/U Rating  |      Speed Usage    R/U Rating
         KiB/s     %   MIPS   MIPS  |      KiB/s     %   MIPS   MIPS

22:       1805   307    573   1757  |      38545   399    823   3289
23:       1785   313    581   1819  |      37999   399    824   3288
24:       1583   288    592   1703  |      37377   399    823   3281
25:       1733   324    611   1979  |      36908   399    822   3285
----------------------------------  | ------------------------------
Avr:             308    589   1814  |              399    823   3286
Tot:             354    706   2550

Thanks!

-- 
________________________________________
Carlos Eduardo de Paula
me@carlosedp.com
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http://twitter.com/carlosedp
Linkedin
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