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Subject: Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific
 three-operand MADD and MADDU
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To: Aleksandar Markovic <amarkovic@wavecomp.com>
Cc: Richard Henderson <richard.henderson@linaro.org>, Fredrik Noring <noring@nocrew.org>, =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= <f4bug@amsat.org>, Aurelien Jarno <aurelien@aurel32.net>, "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>, =?UTF-8?Q?J=C3=BCrgen_Urban?= <JuergenUrban@gmx.de>

On Sun, 28 Oct 2018, Aleksandar Markovic wrote:

> I truly need your help here. As you can conclude from the discussion, 
> R5900 folks (anybody correct me if I am wrong) have some problems using 
> any ABI other than O32.

 The maximum the R5900 can support is the n32 ABI, owing to 32-bit virtual 
addressing.  And that ABI is even more troublesome due to this processor's 
peculiarities, requiring extra effort in addition to what has to be done 
to support o32 only.  The lack of sign-extension of the link address that 
becomes visible with 64-bit register accesses is just one issue to name.  
Hence the staged approach chosen.  We'll get n32 support eventually as 
well, once o32 has been sorted, but there'll be no n64 support ever.

  Maciej