Re: arch/powerpc/math-emu/mtfsf.c - incorrect mask?

[James Yang <James.Yang@freescale.com>]

On Sun, 9 Feb 2014, Stephen N Chivers wrote:

> James Yang <James.Yang@freescale.com> wrote on 02/08/2014 07:49:40 AM:
> 
> > From: James Yang <James.Yang@freescale.com>
> > To: Gabriel Paubert <paubert@iram.es>
> > Cc: Stephen N Chivers <schivers@csc.com.au>, Chris Proctor 
> > <cproctor@csc.com.au>, <linuxppc-dev@lists.ozlabs.org>
> > Date: 02/08/2014 07:49 AM
> > Subject: Re: arch/powerpc/math-emu/mtfsf.c - incorrect mask?
> > 
> > On Fri, 7 Feb 2014, Gabriel Paubert wrote:
> > 
> > >    Hi Stephen,
> > > 
> > > On Fri, Feb 07, 2014 at 11:27:57AM +1000, Stephen N Chivers wrote:
> > > > Gabriel Paubert <paubert@iram.es> wrote on 02/06/2014 07:26:37 PM:
> > > > 
> > > > > From: Gabriel Paubert <paubert@iram.es>
> > > > > To: Stephen N Chivers <schivers@csc.com.au>
> > > > > Cc: linuxppc-dev@lists.ozlabs.org, Chris Proctor 
> <cproctor@csc.com.au>
> > > > > Date: 02/06/2014 07:26 PM
> > > > > Subject: Re: arch/powerpc/math-emu/mtfsf.c - incorrect mask?
> > > > > 
> > > > > On Thu, Feb 06, 2014 at 12:09:00PM +1000, Stephen N Chivers wrote:
> > > > > > With the above mask computation I get consistent results for 
> > > > > > both the MPC8548 and MPC7410 boards.
> > > > > > 
> > > > > > Am I missing something subtle?
> > > > > 
> > > > > No I think you are correct. This said, this code may probably be 
> > > > optimized 
> > > > > to eliminate a lot of the conditional branches. I think that:
> > 
> > 
> > If the compiler is enabled to generate isel instructions, it would not 
> > use a conditional branch for this code. (ignore the andi's values, 
> > this is an old compile)
> > 
> From limited research, the 440GP is a processor
> that doesn't implement the isel instruction and it does
> not implement floating point.
> 
> The kernel emulates isel and so using that instruction
> for the 440GP would have a double trap penalty.

Are you writing about something outside the scope of this thread?  OP 
was using MPC8548 not a 440GP.  The compiler should not be using or 
targeting 8548 for a 440GP so having to emulate isel shouldn't be an 
issue because there wouldn't be any.  (The assembly listing I posted 
was generated by gcc targeting 8548.)  Anyway, I had measured the 
non-isel routines to be faster and that works without illop traps.

 
> Correct me if I am wrong, the isel instruction first appears
> in PowerPC ISA v2.04 around mid 2007. 


isel appeared in 2003 in the e500 (v1) core that is in the MPC8540.  
The instruction is Power ISA 2.03 (9/2006).