From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3239EC00449 for ; Sun, 7 Oct 2018 15:53:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E4CFD2087D for ; Sun, 7 Oct 2018 15:53:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E4CFD2087D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728155AbeJGXBN (ORCPT ); Sun, 7 Oct 2018 19:01:13 -0400 Received: from mx2.suse.de ([195.135.220.15]:42554 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726448AbeJGXBN (ORCPT ); Sun, 7 Oct 2018 19:01:13 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 150A8AF87; Sun, 7 Oct 2018 15:53:28 +0000 (UTC) Date: Sun, 7 Oct 2018 15:53:26 +0000 (UTC) From: Michael Matz To: Segher Boessenkool cc: Borislav Petkov , gcc@gcc.gnu.org, Richard Biener , Nadav Amit , Ingo Molnar , linux-kernel@vger.kernel.org, x86@kernel.org, Masahiro Yamada , Sam Ravnborg , Alok Kataria , Christopher Li , Greg Kroah-Hartman , "H. Peter Anvin" , Jan Beulich , Josh Poimboeuf , Juergen Gross , Kate Stewart , Kees Cook , linux-sparse@vger.kernel.org, Peter Zijlstra , Philippe Ombredanne , Thomas Gleixner , virtualization@lists.linux-foundation.org, Linus Torvalds , Chris Zankel , Max Filippov , linux-xtensa@linux-xtensa.org Subject: Re: PROPOSAL: Extend inline asm syntax with size spec In-Reply-To: <20181007132228.GJ29268@gate.crashing.org> Message-ID: References: <20181003213100.189959-1-namit@vmware.com> <20181007091805.GA30687@zn.tnic> <20181007132228.GJ29268@gate.crashing.org> User-Agent: Alpine 2.21 (LSU 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Segher, On Sun, 7 Oct 2018, Segher Boessenkool wrote: > On Sun, Oct 07, 2018 at 11:18:06AM +0200, Borislav Petkov wrote: > > this is an attempt to see whether gcc's inline asm heuristic when > > estimating inline asm statements' cost for better inlining can be > > improved. > > GCC already estimates the *size* of inline asm, and this is required > *for correctness*. So any workaround that works against this will only > end in tears. You're right and wrong. GCC can't even estimate the size of mildly complicated inline asms right now, so your claim of it being necessary for correctness can't be true in this absolute form. I know what you try to say, but still, consider inline asms like this: insn1 .section bla insn2 .previous or invoke_asm_macro foo,bar in both cases GCCs size estimate will be wrong however you want to count it. This is actually the motivating example for the kernel guys, the games they play within their inline asms make the estimates be wildly wrong to a point it interacts with the inliner. > So I guess the real issue is that the inline asm size estimate for x86 > isn't very good (since it has to be pessimistic, and x86 insns can be > huge)? No, see above, even if we were to improve the size estimates (e.g. based on some average instruction size) the kernel examples would still be off because they switch sections back and forth, use asm macros and computed .fill directives and maybe further stuff. GCC will never be able to accurately calculate these sizes (without an built-in assembler which hopefully noone proposes). So, there is a case for extending the inline-asm facility to say "size is complicated here, assume this for inline decisions". > > Now, Richard suggested doing something like: > > > > 1) inline asm ("...") > > What would the semantics of this be? The size of the inline asm wouldn't be counted towards the inliner size limits (or be counted as "1"). > I don't like 2) either. But 1) looks interesting, depends what its > semantics would be? "Don't count this insn's size for inlining decisions", > maybe? TBH, I like the inline asm (...) suggestion most currently, but what if we want to add more attributes to asms? We could add further special keywords to the clobber list: asm ("...." : : : "cc,memory,inline"); sure, it might seem strange to "clobber" inline, but if we reinterpret the clobber list as arbitrary set of attributes for this asm, it'd be fine. > Another option is to just force inlining for those few functions where > GCC currently makes an inlining decision you don't like. Or are there > more than a few? I think the examples I saw from Boris were all indirect inlines: static inline void foo() { asm("large-looking-but-small-asm"); } static void bar1() { ... foo() ... } static void bar2() { ... foo() ... } void goo (void) { bar1(); } // bar1 should have been inlined So, while the immediate asm user was marked as always inline that in turn caused users of it to become non-inlined. I'm assuming the kernel guys did proper measurements that they _really_ get some non-trivial speed benefit by inlining bar1/bar2, but for some reasons (I didn't inquire) didn't want to mark them all as inline as well. Ciao, Michael. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michael Matz Subject: Re: PROPOSAL: Extend inline asm syntax with size spec Date: Sun, 7 Oct 2018 15:53:26 +0000 (UTC) Message-ID: References: <20181003213100.189959-1-namit@vmware.com> <20181007091805.GA30687@zn.tnic> <20181007132228.GJ29268@gate.crashing.org> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Return-path: In-Reply-To: <20181007132228.GJ29268@gate.crashing.org> Sender: linux-kernel-owner@vger.kernel.org To: Segher Boessenkool Cc: Borislav Petkov , gcc@gcc.gnu.org, Richard Biener , Nadav Amit , Ingo Molnar , linux-kernel@vger.kernel.org, x86@kernel.org, Masahiro Yamada , Sam Ravnborg , Alok Kataria , Christopher Li , Greg Kroah-Hartman , "H. Peter Anvin" , Jan Beulich , Josh Poimboeuf , Juergen Gross , Kate Stewart , Kees Cook , linux-sparse@vger.kernel.org, Peter Zijlstra , Philippe Ombredanne , Thomas Gleixner List-Id: linux-sparse@vger.kernel.org Hi Segher, On Sun, 7 Oct 2018, Segher Boessenkool wrote: > On Sun, Oct 07, 2018 at 11:18:06AM +0200, Borislav Petkov wrote: > > this is an attempt to see whether gcc's inline asm heuristic when > > estimating inline asm statements' cost for better inlining can be > > improved. > > GCC already estimates the *size* of inline asm, and this is required > *for correctness*. So any workaround that works against this will only > end in tears. You're right and wrong. GCC can't even estimate the size of mildly complicated inline asms right now, so your claim of it being necessary for correctness can't be true in this absolute form. I know what you try to say, but still, consider inline asms like this: insn1 .section bla insn2 .previous or invoke_asm_macro foo,bar in both cases GCCs size estimate will be wrong however you want to count it. This is actually the motivating example for the kernel guys, the games they play within their inline asms make the estimates be wildly wrong to a point it interacts with the inliner. > So I guess the real issue is that the inline asm size estimate for x86 > isn't very good (since it has to be pessimistic, and x86 insns can be > huge)? No, see above, even if we were to improve the size estimates (e.g. based on some average instruction size) the kernel examples would still be off because they switch sections back and forth, use asm macros and computed .fill directives and maybe further stuff. GCC will never be able to accurately calculate these sizes (without an built-in assembler which hopefully noone proposes). So, there is a case for extending the inline-asm facility to say "size is complicated here, assume this for inline decisions". > > Now, Richard suggested doing something like: > > > > 1) inline asm ("...") > > What would the semantics of this be? The size of the inline asm wouldn't be counted towards the inliner size limits (or be counted as "1"). > I don't like 2) either. But 1) looks interesting, depends what its > semantics would be? "Don't count this insn's size for inlining decisions", > maybe? TBH, I like the inline asm (...) suggestion most currently, but what if we want to add more attributes to asms? We could add further special keywords to the clobber list: asm ("...." : : : "cc,memory,inline"); sure, it might seem strange to "clobber" inline, but if we reinterpret the clobber list as arbitrary set of attributes for this asm, it'd be fine. > Another option is to just force inlining for those few functions where > GCC currently makes an inlining decision you don't like. Or are there > more than a few? I think the examples I saw from Boris were all indirect inlines: static inline void foo() { asm("large-looking-but-small-asm"); } static void bar1() { ... foo() ... } static void bar2() { ... foo() ... } void goo (void) { bar1(); } // bar1 should have been inlined So, while the immediate asm user was marked as always inline that in turn caused users of it to become non-inlined. I'm assuming the kernel guys did proper measurements that they _really_ get some non-trivial speed benefit by inlining bar1/bar2, but for some reasons (I didn't inquire) didn't want to mark them all as inline as well. Ciao, Michael.