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[24.9.64.241]) by smtp.gmail.com with ESMTPSA id c10sm1501659ilq.77.2021.09.09.15.16.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 09 Sep 2021 15:16:51 -0700 (PDT) Subject: Re: [PATCH 14/19] cpupower: initial AMD P-state capability To: Huang Rui , "Rafael J . Wysocki" , Viresh Kumar , Borislav Petkov , Ingo Molnar , linux-pm@vger.kernel.org Cc: Deepak Sharma , Alex Deucher , Mario Limonciello , Nathan Fontenot , Jinzhou Su , Xiaojian Du , linux-kernel@vger.kernel.org, x86@kernel.org, Shuah Khan References: <20210908150001.3702552-1-ray.huang@amd.com> <20210908150001.3702552-15-ray.huang@amd.com> From: Shuah Khan Message-ID: Date: Thu, 9 Sep 2021 16:16:50 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210908150001.3702552-15-ray.huang@amd.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 9/8/21 8:59 AM, Huang Rui wrote: > If kernel enables AMD P-state, cpupower won't need to respond ACPI > hardware P-states function anymore. > This commit log doesn't seem to match the code change. I see it calling cpupower_amd_pstate_enabled() and setting flags. > Signed-off-by: Huang Rui > --- > tools/power/cpupower/utils/helpers/cpuid.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/tools/power/cpupower/utils/helpers/cpuid.c b/tools/power/cpupower/utils/helpers/cpuid.c > index 72eb43593180..78218c54acca 100644 > --- a/tools/power/cpupower/utils/helpers/cpuid.c > +++ b/tools/power/cpupower/utils/helpers/cpuid.c > @@ -149,6 +149,19 @@ int get_cpu_info(struct cpupower_cpu_info *cpu_info) > if (ext_cpuid_level >= 0x80000008 && > cpuid_ebx(0x80000008) & (1 << 4)) > cpu_info->caps |= CPUPOWER_CAP_AMD_RDPRU; > + > + if (cpupower_amd_pstate_enabled(0)) { What is the reason for calling this function with cpu id = 0? > + cpu_info->caps |= CPUPOWER_CAP_AMD_PSTATE; > + > + /* > + * If AMD P-state is enabled, the firmware will treat > + * AMD P-state function as high priority. > + */ > + cpu_info->caps &= ~CPUPOWER_CAP_AMD_CPB; > + cpu_info->caps &= ~CPUPOWER_CAP_AMD_CPB_MSR; > + cpu_info->caps &= ~CPUPOWER_CAP_AMD_HW_PSTATE; > + cpu_info->caps &= ~CPUPOWER_CAP_AMD_PSTATEDEF; > + } > } > > if (cpu_info->vendor == X86_VENDOR_INTEL) { > thanks, -- Shuah