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[88.10.102.251]) by smtp.gmail.com with ESMTPSA id e15sm14282248wrj.74.2019.08.21.06.23.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Aug 2019 06:23:42 -0700 (PDT) To: Richard Henderson , qemu-devel@nongnu.org References: <20190819213755.26175-1-richard.henderson@linaro.org> <20190819213755.26175-38-richard.henderson@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Openpgp: id=89C1E78F601EE86C867495CBA2A3FD6EDEADC0DE; url=http://pgp.mit.edu/pks/lookup?op=get&search=0xA2A3FD6EDEADC0DE Message-ID: Date: Wed, 21 Aug 2019 15:23:42 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20190819213755.26175-38-richard.henderson@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: Re: [Qemu-devel] [PATCH v2 37/68] target/arm: Convert PLI, PLD, PLDW X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/19/19 11:37 PM, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > target/arm/translate.c | 37 +++++++++++++++++++----------------- > target/arm/a32-uncond.decode | 10 ++++++++++ > 2 files changed, 30 insertions(+), 17 deletions(-) >=20 > diff --git a/target/arm/translate.c b/target/arm/translate.c > index 46e88d1d17..a30a9bb4e0 100644 > --- a/target/arm/translate.c > +++ b/target/arm/translate.c > @@ -10136,6 +10136,26 @@ static bool trans_SETEND(DisasContext *s, arg_= SETEND *a) > return true; > } > =20 > +/* > + * Preload instructions > + * All are nops, contingent on the appropriate arch level. > + */ > + > +static bool trans_PLD(DisasContext *s, arg_PLD *a) > +{ > + return ENABLE_ARCH_5TE; Excellent :) Reviewed-by: Philippe Mathieu-Daud=C3=A9 > +} > + > +static bool trans_PLDW(DisasContext *s, arg_PLD *a) > +{ > + return arm_dc_feature(s, ARM_FEATURE_V7MP); > +} > + > +static bool trans_PLI(DisasContext *s, arg_PLD *a) > +{ > + return ENABLE_ARCH_7; > +} > + > /* > * Legacy decoder. > */ > @@ -10196,23 +10216,6 @@ static void disas_arm_insn(DisasContext *s, un= signed int insn) > } > return; > } > - if (((insn & 0x0f30f000) =3D=3D 0x0510f000) || > - ((insn & 0x0f30f010) =3D=3D 0x0710f000)) { > - if ((insn & (1 << 22)) =3D=3D 0) { > - /* PLDW; v7MP */ > - if (!arm_dc_feature(s, ARM_FEATURE_V7MP)) { > - goto illegal_op; > - } > - } > - /* Otherwise PLD; v5TE+ */ > - ARCH(5TE); > - return; > - } > - if (((insn & 0x0f70f000) =3D=3D 0x0450f000) || > - ((insn & 0x0f70f010) =3D=3D 0x0650f000)) { > - ARCH(7); > - return; /* PLI; V7 */ > - } > if (((insn & 0x0f700000) =3D=3D 0x04100000) || > ((insn & 0x0f700010) =3D=3D 0x06100000)) { > if (!arm_dc_feature(s, ARM_FEATURE_V7MP)) { > diff --git a/target/arm/a32-uncond.decode b/target/arm/a32-uncond.decod= e > index d5ed48f0fd..aed381cb8e 100644 > --- a/target/arm/a32-uncond.decode > +++ b/target/arm/a32-uncond.decode > @@ -54,3 +54,13 @@ SB 1111 0101 0111 1111 1111 0000 0111 = 0000 > =20 > # Set Endianness > SETEND 1111 0001 0000 0001 0000 00 E:1 0 0000 0000 &setend > + > +# Preload instructions > + > +PLD 1111 0101 -101 ---- 1111 ---- ---- ---- # (imm, li= t) 5te > +PLDW 1111 0101 -001 ---- 1111 ---- ---- ---- # (imm, li= t) 7mp > +PLI 1111 0100 -101 ---- 1111 ---- ---- ---- # (imm, li= t) 7 > + > +PLD 1111 0111 -101 ---- 1111 ----- -- 0 ---- # (registe= r) 5te > +PLDW 1111 0111 -001 ---- 1111 ----- -- 0 ---- # (registe= r) 7mp > +PLI 1111 0110 -101 ---- 1111 ----- -- 0 ---- # (registe= r) 7 >=20