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From: Randy Dunlap <rdunlap@infradead.org>
To: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>,
	tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org,
	s-anna@ti.com
Cc: robh+dt@kernel.org, lee.jones@linaro.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	david@lechnology.com, praneeth@ti.com,
	"Andrew F . Davis" <afd@ti.com>, Roger Quadros <rogerq@ti.com>
Subject: Re: [RESEND PATCH v5 2/5] irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts
Date: Mon, 31 Aug 2020 08:42:10 -0700	[thread overview]
Message-ID: <b1dc6334-2f71-6142-561d-2966ed43f907@infradead.org> (raw)
In-Reply-To: <1598886558-16546-3-git-send-email-grzegorz.jaszczyk@linaro.org>

On 8/31/20 8:09 AM, Grzegorz Jaszczyk wrote:
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index bb70b71..a112a76 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -493,6 +493,16 @@ config TI_SCI_INTA_IRQCHIP
>  	  If you wish to use interrupt aggregator irq resources managed by the
>  	  TI System Controller, say Y here. Otherwise, say N.
>  
> +config TI_PRUSS_INTC
> +	tristate "TI PRU-ICSS Interrupt Controller"
> +	depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE
> +	select IRQ_DOMAIN
> +	help
> +	   This enables support for the PRU-ICSS Local Interrupt Controller
> +	   present within a PRU-ICSS subsystem present on various TI SoCs.
> +	   The PRUSS INTC enables various interrupts to be routed to multiple
> +	   different processors within the SoC.
> +

Hi,
If you make any changes around here, please fix the help text indentation above
to use one tab + 2 spaces (not 3 spaces) as documented in
Documentation/process/coding-style.rst.

>  config RISCV_INTC
>  	bool "RISC-V Local Interrupt Controller"
>  	depends on RISCV

thanks.
-- 
~Randy


WARNING: multiple messages have this Message-ID
From: Randy Dunlap <rdunlap@infradead.org>
To: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>,
	tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org,
	s-anna@ti.com
Cc: devicetree@vger.kernel.org, david@lechnology.com,
	praneeth@ti.com, linux-kernel@vger.kernel.org,
	"Andrew F . Davis" <afd@ti.com>,
	robh+dt@kernel.org, linux-omap@vger.kernel.org,
	lee.jones@linaro.org, linux-arm-kernel@lists.infradead.org,
	Roger Quadros <rogerq@ti.com>
Subject: Re: [RESEND PATCH v5 2/5] irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts
Date: Mon, 31 Aug 2020 08:42:10 -0700	[thread overview]
Message-ID: <b1dc6334-2f71-6142-561d-2966ed43f907@infradead.org> (raw)
In-Reply-To: <1598886558-16546-3-git-send-email-grzegorz.jaszczyk@linaro.org>

On 8/31/20 8:09 AM, Grzegorz Jaszczyk wrote:
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index bb70b71..a112a76 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -493,6 +493,16 @@ config TI_SCI_INTA_IRQCHIP
>  	  If you wish to use interrupt aggregator irq resources managed by the
>  	  TI System Controller, say Y here. Otherwise, say N.
>  
> +config TI_PRUSS_INTC
> +	tristate "TI PRU-ICSS Interrupt Controller"
> +	depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE
> +	select IRQ_DOMAIN
> +	help
> +	   This enables support for the PRU-ICSS Local Interrupt Controller
> +	   present within a PRU-ICSS subsystem present on various TI SoCs.
> +	   The PRUSS INTC enables various interrupts to be routed to multiple
> +	   different processors within the SoC.
> +

Hi,
If you make any changes around here, please fix the help text indentation above
to use one tab + 2 spaces (not 3 spaces) as documented in
Documentation/process/coding-style.rst.

>  config RISCV_INTC
>  	bool "RISC-V Local Interrupt Controller"
>  	depends on RISCV

thanks.
-- 
~Randy


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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-08-31 15:42 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-31 15:09 [RESEND PATCH v5 0/5] Add TI PRUSS Local Interrupt Controller IRQChip driver Grzegorz Jaszczyk
2020-08-31 15:09 ` Grzegorz Jaszczyk
2020-08-31 15:09 ` [RESEND PATCH v5 1/5] dt-bindings: irqchip: Add PRU-ICSS interrupt controller bindings Grzegorz Jaszczyk
2020-08-31 15:09   ` Grzegorz Jaszczyk
2020-08-31 15:09 ` [RESEND PATCH v5 2/5] irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts Grzegorz Jaszczyk
2020-08-31 15:09   ` Grzegorz Jaszczyk
2020-08-31 15:42   ` Randy Dunlap [this message]
2020-08-31 15:42     ` Randy Dunlap
2020-09-12  9:44   ` Marc Zyngier
2020-09-12  9:44     ` Marc Zyngier
2020-09-14 14:57     ` Grzegorz Jaszczyk
2020-09-14 14:57       ` Grzegorz Jaszczyk
2020-09-14 15:20       ` Marc Zyngier
2020-09-14 15:20         ` Marc Zyngier
2020-08-31 15:09 ` [RESEND PATCH v5 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts Grzegorz Jaszczyk
2020-08-31 15:09   ` Grzegorz Jaszczyk
2020-08-31 15:09 ` [RESEND PATCH v5 4/5] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Grzegorz Jaszczyk
2020-08-31 15:09   ` [RESEND PATCH v5 4/5] irqchip/irq-pruss-intc: Implement irq_{get, set}_irqchip_state ops Grzegorz Jaszczyk
2020-09-12  9:49   ` [RESEND PATCH v5 4/5] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Marc Zyngier
2020-09-12  9:49     ` [RESEND PATCH v5 4/5] irqchip/irq-pruss-intc: Implement irq_{get, set}_irqchip_state ops Marc Zyngier
2020-09-14 14:59     ` [RESEND PATCH v5 4/5] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Grzegorz Jaszczyk
2020-09-14 14:59       ` Grzegorz Jaszczyk
2020-08-31 15:09 ` [RESEND PATCH v5 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs Grzegorz Jaszczyk
2020-08-31 15:09   ` Grzegorz Jaszczyk

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