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[2603:800c:3202:ffa7:c4c7:6719:c57e:8ffe]) by smtp.gmail.com with ESMTPSA id g3sm4259931pfi.197.2021.07.29.11.06.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 29 Jul 2021 11:06:03 -0700 (PDT) Subject: Re: [PATCH for-6.2 07/43] target/ppc: Set fault address in ppc_cpu_do_unaligned_access To: Peter Maydell References: <20210729004647.282017-1-richard.henderson@linaro.org> <20210729004647.282017-8-richard.henderson@linaro.org> From: Richard Henderson Message-ID: Date: Thu, 29 Jul 2021 08:05:58 -1000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.125, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc , QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 7/29/21 3:44 AM, Peter Maydell wrote: > On Thu, 29 Jul 2021 at 01:51, Richard Henderson > wrote: >> >> We ought to have been recording the virtual address for reporting >> to the guest trap handler. >> >> Cc: qemu-ppc@nongnu.org >> Signed-off-by: Richard Henderson >> --- >> target/ppc/excp_helper.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c >> index a79a0ed465..0b2c6de442 100644 >> --- a/target/ppc/excp_helper.c >> +++ b/target/ppc/excp_helper.c >> @@ -1503,6 +1503,8 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, >> CPUPPCState *env = cs->env_ptr; >> uint32_t insn; >> >> + env->spr[SPR_DAR] = vaddr; >> + > > Is this the right SPR for all PPC variants? For instance the > kernel's code in arch/powerpc/kernel/exceptions-64e.S looks > in SPRN_DEAR, which is our SPR_BOOKE_DEAR or SPR_40x_DEAR. I have no idea. I glanced through a handful of the mmu's, and looked at the current BookS docs, but that's certainly not all. I'll note that if we do need to set different regs for different mmus, we'll probably want to standardize on this one for user-only, like we did for the user-only copy of ppc_cpu_tlb_fill. r~