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([2a02:908:1252:fb60:b48f:ff97:fb4c:5b1d]) by smtp.gmail.com with ESMTPSA id gu16sm3015116ejb.88.2021.05.21.01.35.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 May 2021 01:35:38 -0700 (PDT) Subject: Re: [Intel-gfx] [Mesa-dev] [RFC 2/2] drm/doc/rfc: i915 new parallel submission uAPI plan To: Jason Ekstrand , Matthew Brost References: <20210518235830.133834-1-matthew.brost@intel.com> <20210518235830.133834-3-matthew.brost@intel.com> <5b8ab744-4906-945d-cbca-1ce4c40f2fcb@gmail.com> <20210519165121.GA2585@sdutt-i7> <521a34ba-52d4-a9c2-97bb-48873174fc49@amd.com> <20210520153931.GA7971@sdutt-i7> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: Date: Fri, 21 May 2021 10:35:37 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel GFX , Maling list - DRI developers , Jason Ekstrand , ML mesa-dev , Daniel Vetter , karl@freedesktop.org, =?UTF-8?Q?Christian_K=c3=b6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Am 20.05.21 um 23:38 schrieb Jason Ekstrand: > On Thu, May 20, 2021 at 10:46 AM Matthew Brost wrote: >> On Thu, May 20, 2021 at 01:11:59PM +0200, Christian König wrote: >>> Am 19.05.21 um 18:51 schrieb Matthew Brost: >>>> On Wed, May 19, 2021 at 01:45:39PM +0200, Christian König wrote: >>>>> Oh, yeah we call that gang submit on the AMD side. >>>>> >>>>> Had already some internal discussions how to implement this, but so far >>>>> couldn't figure out how to cleanly introduce that into the DRM scheduler. >>>>> >>>>> Can you briefly describe in a few words how that is supposed to work on the >>>>> Intel side? > On Intel, we actually have two cases which don't fit the current > drm/scheduler model well: balanced and bonded. > > In the balanced model, we want to submit a batch which can go to any > one of some set of engines and we don't care which. It's up to the > kernel to pick an engine. Imagine you had 64 identical HW compute > queues, for instance. This could be done by making all the identical > engines share a single drm_gpu_scheduler and round-robin around the HW > queues or something. I don't know that we strictly need drm/scheduler > to be aware of it but it might be nice if it grew support for this > mode so we could maintain a 1:1 relationship between HW queues and > drm_gpu_schedulers. That said, I'm not sure how this would play with > GuC queues so maybe it doesn't help? Oh, we do have support for load balancing like that. When you call drm_sched_entity_init() you can give a list of drm_gpu_scheduler object to use round robing for scheduling. New jobs are then scheduler to the drm_gpu_scheduler instance which is idle or rather the least busy one. > The bonded model is like your ganged, I think. We want to submit N > batches to run in parallel. And they actually have to be executing on > the GPU simultaneously and not just sort-of at similar times. We need > this for video. There are also potential use-cases in Vulkan or even > GL that might be able to use this. One difference with the balanced > mode is that bonds don't, strictly speaking, need to be on the same > type of engine. Imagine, for instance, a 3D batch with a parallel > compute batch doing vertex pre-processing. > > I'm pretty sure the bonded case is something that the mobile drivers > (panfrost, etc.) would like as well for doing Vulkan on tilers where > you often have to have two command buffers running in parallel. > They're currently doing it by submitting a giant pile of batches where > they split the batch and add sync primitives every time some GL call > requires them to sync between fragment and vertex pipes. Yeah, we have exactly the same problem as well. But so far every model we discussed has some drawbacks and it is rather hard for the scheduler to guarantee that stuff runs at the same time. So if you got any ideas how to cleanly implement that then they would be rather welcomed. Regards, Christian. > > So, to sum up, I think there's likely some good collaboration to be > had here for everyone. :-) > > --Jason > >>>> Sure, I've done a quick PoC internally and have been able to hook this >>>> into the DRM scheduler. >>>> >>>> Basically each BB still maps to a single job as each job is somewhat >>>> unique (e.g. each job has its own ring, lrc, seqno, etc...). However all >>>> the jobs configured to run in parallel map to a single sched_entity >>>> which maintains the order each job was generated from the execbuf IOCTL >>>> (1 - N). When the backend receives jobs 1 to N - 1 it basically just >>>> updates some internal state. When the backend sees job N (last job) it >>>> actually does the submit for jobs 1 - N which with GuC submission is a >>>> simple command moving the LRC tail of the N jobs. >>>> >>>> Daniel has suggested that we create a single job for the NN BBs but that >>>> would be huge rework to the internals of the i915 and likely won't >>>> happen by the time this code first lands. >>>> >>>> Also worth noting one way a job isn't really a treated individually is >>>> the excl slot with dma-resv. In that case we create a composite fence of >>>> all jobs (dma_fence_array). >>> Yeah, that's something we have discussed as well. >>> >>> How do you prevent the scheduler from over committing to a single ring >>> buffer in this scenario? >>> >> Each job has its own ring, the execbuf IOCTL throttles itself for each >> job if there isn't space in the ring. This is exactly the same as >> non-parallel submits. >> >> I think this is what you were asking? If not, maybe try explaining the >> question a bit more. >> >> Matt >> >>> Christian. >>> >>>> Matt >>>> >>>>> Thanks, >>>>> Christian. >>>>> >>>>> Am 19.05.21 um 01:58 schrieb Matthew Brost: >>>>>> Add entry fpr i915 new parallel submission uAPI plan. >>>>>> >>>>>> v2: >>>>>> (Daniel Vetter): >>>>>> - Expand logical order explaination >>>>>> - Add dummy header >>>>>> - Only allow N BBs in execbuf IOCTL >>>>>> - Configure parallel submission per slot not per gem context >>>>>> >>>>>> Cc: Tvrtko Ursulin >>>>>> Cc: Tony Ye >>>>>> CC: Carl Zhang >>>>>> Cc: Daniel Vetter >>>>>> Cc: Jason Ekstrand >>>>>> Signed-off-by: Matthew Brost >>>>>> --- >>>>>> Documentation/gpu/rfc/i915_parallel_execbuf.h | 144 ++++++++++++++++++ >>>>>> Documentation/gpu/rfc/i915_scheduler.rst | 53 ++++++- >>>>>> 2 files changed, 196 insertions(+), 1 deletion(-) >>>>>> create mode 100644 Documentation/gpu/rfc/i915_parallel_execbuf.h >>>>>> >>>>>> diff --git a/Documentation/gpu/rfc/i915_parallel_execbuf.h b/Documentation/gpu/rfc/i915_parallel_execbuf.h >>>>>> new file mode 100644 >>>>>> index 000000000000..8c64b983ccad >>>>>> --- /dev/null >>>>>> +++ b/Documentation/gpu/rfc/i915_parallel_execbuf.h >>>>>> @@ -0,0 +1,144 @@ >>>>>> +#define I915_CONTEXT_ENGINES_EXT_PARALLEL_SUBMIT 2 /* see i915_context_engines_parallel_submit */ >>>>>> + >>>>>> +/* >>>>>> + * i915_context_engines_parallel_submit: >>>>>> + * >>>>>> + * Setup a slot to allow multiple BBs to be submitted in a single execbuf IOCTL. >>>>>> + * Those BBs will then be scheduled to run on the GPU in parallel. Multiple >>>>>> + * hardware contexts are created internally in the i915 run these BBs. Once a >>>>>> + * slot is configured for N BBs only N BBs can be submitted in each execbuf >>>>>> + * IOCTL and this is implict behavior (e.g. the user doesn't tell the execbuf >>>>>> + * IOCTL there are N BBs, the execbuf IOCTL know how many BBs there are based on >>>>>> + * the slots configuration). >>>>>> + * >>>>>> + * Their are two currently defined ways to control the placement of the >>>>>> + * hardware contexts on physical engines: default behavior (no flags) and >>>>>> + * I915_PARALLEL_IMPLICT_BONDS (a flag). More flags may be added the in the >>>>>> + * future as new hardware / use cases arise. Details of how to use this >>>>>> + * interface below above the flags. >>>>>> + * >>>>>> + * Returns -EINVAL if hardware context placement configuration invalid or if the >>>>>> + * placement configuration isn't supported on the platform / submission >>>>>> + * interface. >>>>>> + * Returns -ENODEV if extension isn't supported on the platform / submission >>>>>> + * inteface. >>>>>> + */ >>>>>> +struct i915_context_engines_parallel_submit { >>>>>> + struct i915_user_extension base; >>>>>> + >>>>>> + __u16 engine_index; /* slot for parallel engine */ >>>>>> + __u16 width; /* number of contexts per parallel engine */ >>>>>> + __u16 num_siblings; /* number of siblings per context */ >>>>>> + __u16 mbz16; >>>>>> +/* >>>>>> + * Default placement behvavior (currently unsupported): >>>>>> + * >>>>>> + * Rather than restricting parallel submission to a single class with a >>>>>> + * logically contiguous placement (I915_PARALLEL_IMPLICT_BONDS), add a mode that >>>>>> + * enables parallel submission across multiple engine classes. In this case each >>>>>> + * context's logical engine mask indicates where that context can placed. It is >>>>>> + * implied in this mode that all contexts have mutual exclusive placement (e.g. >>>>>> + * if one context is running CS0 no other contexts can run on CS0). >>>>>> + * >>>>>> + * Example 1 pseudo code: >>>>>> + * CSX[Y] = engine class X, logical instance Y >>>>>> + * INVALID = I915_ENGINE_CLASS_INVALID, I915_ENGINE_CLASS_INVALID_NONE >>>>>> + * set_engines(INVALID) >>>>>> + * set_parallel(engine_index=0, width=2, num_siblings=2, >>>>>> + * engines=CS0[0],CS0[1],CS1[0],CS1[1]) >>>>>> + * >>>>>> + * Results in the following valid placements: >>>>>> + * CS0[0], CS1[0] >>>>>> + * CS0[0], CS1[1] >>>>>> + * CS0[1], CS1[0] >>>>>> + * CS0[1], CS1[1] >>>>>> + * >>>>>> + * This can also be though of as 2 virtual engines: >>>>>> + * VE[0] = CS0[0], CS0[1] >>>>>> + * VE[1] = CS1[0], CS1[1] >>>>>> + * >>>>>> + * Example 2 pseudo code: >>>>>> + * CS[X] = generic engine of same class, logical instance X >>>>>> + * INVALID = I915_ENGINE_CLASS_INVALID, I915_ENGINE_CLASS_INVALID_NONE >>>>>> + * set_engines(INVALID) >>>>>> + * set_parallel(engine_index=0, width=2, num_siblings=3, >>>>>> + * engines=CS[0],CS[1],CS[2],CS[0],CS[1],CS[2]) >>>>>> + * >>>>>> + * Results in the following valid placements: >>>>>> + * CS[0], CS[1] >>>>>> + * CS[0], CS[2] >>>>>> + * CS[1], CS[0] >>>>>> + * CS[1], CS[2] >>>>>> + * CS[2], CS[0] >>>>>> + * CS[2], CS[1] >>>>>> + * >>>>>> + * >>>>>> + * This can also be though of as 2 virtual engines: >>>>>> + * VE[0] = CS[0], CS[1], CS[2] >>>>>> + * VE[1] = CS[0], CS[1], CS[2] >>>>>> + >>>>>> + * This enables a use case where all engines are created equally, we don't care >>>>>> + * where they are scheduled, we just want a certain number of resources, for >>>>>> + * those resources to be scheduled in parallel, and possibly across multiple >>>>>> + * engine classes. >>>>>> + */ >>>>>> + >>>>>> +/* >>>>>> + * I915_PARALLEL_IMPLICT_BONDS - Create implict bonds between each context. >>>>>> + * Each context must have the same number sibling and bonds are implictly create >>>>>> + * of the siblings. >>>>>> + * >>>>>> + * All of the below examples are in logical space. >>>>>> + * >>>>>> + * Example 1 pseudo code: >>>>>> + * CS[X] = generic engine of same class, logical instance X >>>>>> + * INVALID = I915_ENGINE_CLASS_INVALID, I915_ENGINE_CLASS_INVALID_NONE >>>>>> + * set_engines(INVALID) >>>>>> + * set_parallel(engine_index=0, width=2, num_siblings=1, >>>>>> + * engines=CS[0],CS[1], flags=I915_PARALLEL_IMPLICT_BONDS) >>>>>> + * >>>>>> + * Results in the following valid placements: >>>>>> + * CS[0], CS[1] >>>>>> + * >>>>>> + * Example 2 pseudo code: >>>>>> + * CS[X] = generic engine of same class, logical instance X >>>>>> + * INVALID = I915_ENGINE_CLASS_INVALID, I915_ENGINE_CLASS_INVALID_NONE >>>>>> + * set_engines(INVALID) >>>>>> + * set_parallel(engine_index=0, width=2, num_siblings=2, >>>>>> + * engines=CS[0],CS[2],CS[1],CS[3], flags=I915_PARALLEL_IMPLICT_BONDS) >>>>>> + * >>>>>> + * Results in the following valid placements: >>>>>> + * CS[0], CS[1] >>>>>> + * CS[2], CS[3] >>>>>> + * >>>>>> + * This can also be though of as 2 virtual engines: >>>>>> + * VE[0] = CS[0], CS[2] >>>>>> + * VE[1] = CS[1], CS[3] >>>>>> + * >>>>>> + * This enables a use case where all engines are not equal and certain placement >>>>>> + * rules are required (i.e. split-frame requires all contexts to be placed in a >>>>>> + * logically contiguous order on the VCS engines on gen11+ platforms). This use >>>>>> + * case (logically contiguous placement, within a single engine class) is >>>>>> + * supported when using GuC submission. Execlist mode could support all possible >>>>>> + * bonding configurations but currently doesn't support this extension. >>>>>> + */ >>>>>> +#define I915_PARALLEL_IMPLICT_BONDS (1<<0) >>>>>> +/* >>>>>> + * Do not allow BBs to be preempted mid BB rather insert coordinated preemption >>>>>> + * points on all hardware contexts between each set of BBs. An example use case >>>>>> + * of this feature is split-frame on gen11+ hardware. When using this feature a >>>>>> + * BB must be submitted on each hardware context in the parallel gem context. >>>>>> + * The execbuf2 IOCTL enforces the user adheres to policy. >>>>>> + */ >>>>>> +#define I915_PARALLEL_NO_PREEMPT_MID_BATCH (1<<1) >>>>>> +#define __I915_PARALLEL_UNKNOWN_FLAGS (-(I915_PARALLEL_NO_PREEMPT_MID_BATCH << 1)) >>>>>> + __u64 flags; /* all undefined flags must be zero */ >>>>>> + __u64 mbz64[3]; /* reserved for future use; must be zero */ >>>>>> + >>>>>> + /* >>>>>> + * width (i) * num_siblings (j) in length >>>>>> + * index = j + i * num_siblings >>>>>> + */ >>>>>> + struct i915_engine_class_instance engines[0]; >>>>>> +} __attribute__ ((packed)); >>>>>> + >>>>>> diff --git a/Documentation/gpu/rfc/i915_scheduler.rst b/Documentation/gpu/rfc/i915_scheduler.rst >>>>>> index 7faa46cde088..64c539486ee4 100644 >>>>>> --- a/Documentation/gpu/rfc/i915_scheduler.rst >>>>>> +++ b/Documentation/gpu/rfc/i915_scheduler.rst >>>>>> @@ -82,4 +82,55 @@ https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fspec.oneapi.com%2Flevel-zero%2Flatest%2Fcore%2Fapi.html%23ze-command-queue-priorit&data=04%7C01%7Cchristian.koenig%40amd.com%7C49a7557f4e494090755608d91ae758a6%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637570403202969375%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=dn3PVdxYQpkpWIru5eAXHgbfuLDkppAA5daV5sHQF7s%3D&reserved=0 >>>>>> New parallel submission uAPI >>>>>> ============================ >>>>>> -Details to come in a following patch. >>>>>> +The existing bonding uAPI is completely broken with GuC submission because >>>>>> +whether a submission is a single context submit or parallel submit isn't known >>>>>> +until execbuf time activated via the I915_SUBMIT_FENCE. To submit multiple >>>>>> +contexts in parallel with the GuC the context must be explictly registered with >>>>>> +N contexts and all N contexts must be submitted in a single command to the GuC. >>>>>> +These interfaces doesn't support dynamically changing between N contexts as the >>>>>> +bonding uAPI does. Hence the need for a new parallel submission interface. Also >>>>>> +the legacy bonding uAPI is quite confusing and not intuitive at all. >>>>>> + >>>>>> +The new parallel submission uAPI consists of 3 parts: >>>>>> + >>>>>> +* Export engines logical mapping >>>>>> +* A 'set_parallel' extension to configure contexts for parallel >>>>>> + submission >>>>>> +* Extend execbuf2 IOCTL to support submitting N BBs in a single IOCTL >>>>>> + >>>>>> +Export engines logical mapping >>>>>> +------------------------------ >>>>>> +Certain use cases require BBs to be placed on engine instances in logical order >>>>>> +(e.g. split-frame on gen11+). The logical mapping of engine instances can change >>>>>> +based on fusing. Rather than making UMDs be aware of fusing, simply expose the >>>>>> +logical mapping with the existing query engine info IOCTL. Also the GuC >>>>>> +submission interface currently only supports submitting multiple contexts to >>>>>> +engines in logical order which is a new requirement compared to execlists. >>>>>> +Lastly, all current platforms have at most 2 instances and the logical order is >>>>>> +the same a uABI order. This will change on platforms with more than 2 instances. >>>>>> + >>>>>> +A single bit will be added to drm_i915_engine_info.flags indicating that the >>>>>> +logical instance has been returned and a new field, >>>>>> +drm_i915_engine_info.logical_instance, returns the logical instance. >>>>>> + >>>>>> +A 'set_parallel' extension to configure contexts for parallel submission >>>>>> +------------------------------------------------------------------------ >>>>>> +The 'set_parallel' extension configures a slot for parallel submission of N BBs. >>>>>> +It is setup step that should be called before using any of the contexts. See >>>>>> +I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE or I915_CONTEXT_ENGINES_EXT_BOND for >>>>>> +similar existing examples. Once a slot is configured for parallel submission the >>>>>> +execbuf2 IOCTL can be called submiting N BBs in a single IOCTL. Initially only >>>>>> +support GuC submission. Execlist support can be added later if needed. >>>>>> + >>>>>> +Add I915_CONTEXT_ENGINES_EXT_PARALLEL_SUBMIT and >>>>>> +i915_context_engines_parallel_submit to the uAPI to implement this extension. >>>>>> + >>>>>> +Extend execbuf2 IOCTL to support submitting N BBs in a single IOCTL >>>>>> +------------------------------------------------------------------- >>>>>> +Contexts that have been configured with the 'set_parallel' extension are allowed >>>>>> +to submit N BBs in a single execbuf2 IOCTL. The BBs are either the last N >>>>>> +objects in the drm_i915_gem_exec_object2 list or the first N if >>>>>> +I915_EXEC_BATCH_FIRST is set. The number of BBs is implict based on the slot >>>>>> +submitted and how it has been configured by 'set_parallel' or other extensions. >>>>>> +No uAPI changes in the execbuf IOCTL but worth mentioning the new behavior of >>>>>> +the IOCTL. >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.0 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB343C433B4 for ; Fri, 21 May 2021 11:55:21 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 924BB6100C for ; Fri, 21 May 2021 11:55:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 924BB6100C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 80B286E1B4; Fri, 21 May 2021 11:55:09 +0000 (UTC) Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by gabe.freedesktop.org (Postfix) with ESMTPS id 073706F5D6; Fri, 21 May 2021 08:35:40 +0000 (UTC) Received: by mail-ed1-x52a.google.com with SMTP id b17so22451365ede.0; Fri, 21 May 2021 01:35:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-transfer-encoding:content-language; bh=BuD6PmtaWjv+VKhgrTTzBqd6JlBb3RTFMSuOSVMipzQ=; b=cIFL/tYq02MAWk9vXIM5r+GfEWdInkj9OamIBzB0nTmJOc7Z1aFulOksWqHzJk5L1M gyOxLukh8YroM6UmVlwYpx6s09W2h7hktMsl0DoMKvQxxb800L9IvKmoGzDh3C2Nc5sZ oxnJGGmhDJgPA4jhY9Wm8OlFcA4ITMQjzK+AZd1U25+9l9Z9rEFjBKmmFq3iwc8l70j7 vGPIyzItidhzS0enfCzxLVW+KmXZ/DCOthXsS5PbntG/fURjzoN+6BX73bZTbz9muydq WGCN4Ir8fXApekE0AVEcA4e85f3gj/OrLf6i+U0GBeGvN3dgTHSoIfIdir6JIpJwWsJU i+yA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding :content-language; bh=BuD6PmtaWjv+VKhgrTTzBqd6JlBb3RTFMSuOSVMipzQ=; b=DA1tYo7QT5IQ1Qdp16ViiAbS7aJC+//rc+/mw3jI7PqeGIEH1nsUopQVRFjNAGZHIA zuzbtuh7s9KRMtsMCAAUj4ltSn0lhE5AT2rX0Jrv3I6bXT505sXaaW6wFtBpLTj5coxR geg+uvirQr51W+yxMrWkiZnjzm1B7Bc7FP10lmb/tauqTIy+7BsCpDvIhWQrRs+Er2aO 1ro/dwfTeSqRDNV8k8aW6GREBZD5Mvqk9CN4goDCvQNFST4/HqTeQE+qAeRtvLHt6Gja z2LpOQcsCVd8xb484uqp168GGjTAGRkscNd1Yqq/g3dYdgrx/5wvf3gx0cC/g9FXR244 0ynQ== X-Gm-Message-State: AOAM5321BxkuYj/Y144VC3huk687x4a6SnSeFCFrFtLe97eMJtnbsJUP cngcXLGM8QLTBmdS+6ULNHU= X-Google-Smtp-Source: ABdhPJwt6Gg5xvANtF8bVkYcZdNI1+072/aQ3mJlYRsH/OZjvNZd4xgMKEWzH5EcThKKDbQ51O4GEA== X-Received: by 2002:aa7:c718:: with SMTP id i24mr9809328edq.43.1621586139474; Fri, 21 May 2021 01:35:39 -0700 (PDT) Received: from ?IPv6:2a02:908:1252:fb60:b48f:ff97:fb4c:5b1d? ([2a02:908:1252:fb60:b48f:ff97:fb4c:5b1d]) by smtp.gmail.com with ESMTPSA id gu16sm3015116ejb.88.2021.05.21.01.35.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 May 2021 01:35:38 -0700 (PDT) To: Jason Ekstrand , Matthew Brost References: <20210518235830.133834-1-matthew.brost@intel.com> <20210518235830.133834-3-matthew.brost@intel.com> <5b8ab744-4906-945d-cbca-1ce4c40f2fcb@gmail.com> <20210519165121.GA2585@sdutt-i7> <521a34ba-52d4-a9c2-97bb-48873174fc49@amd.com> <20210520153931.GA7971@sdutt-i7> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: Date: Fri, 21 May 2021 10:35:37 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-Mailman-Approved-At: Fri, 21 May 2021 11:55:08 +0000 Subject: Re: [Intel-gfx] [Mesa-dev] [RFC 2/2] drm/doc/rfc: i915 new parallel submission uAPI plan X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel GFX , Maling list - DRI developers , Jason Ekstrand , ML mesa-dev , Daniel Vetter , karl@freedesktop.org, =?UTF-8?Q?Christian_K=c3=b6nig?= Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" QW0gMjAuMDUuMjEgdW0gMjM6Mzggc2NocmllYiBKYXNvbiBFa3N0cmFuZDoKPiBPbiBUaHUsIE1h eSAyMCwgMjAyMSBhdCAxMDo0NiBBTSBNYXR0aGV3IEJyb3N0IDxtYXR0aGV3LmJyb3N0QGludGVs LmNvbT4gd3JvdGU6Cj4+IE9uIFRodSwgTWF5IDIwLCAyMDIxIGF0IDAxOjExOjU5UE0gKzAyMDAs IENocmlzdGlhbiBLw7ZuaWcgd3JvdGU6Cj4+PiBBbSAxOS4wNS4yMSB1bSAxODo1MSBzY2hyaWVi IE1hdHRoZXcgQnJvc3Q6Cj4+Pj4gT24gV2VkLCBNYXkgMTksIDIwMjEgYXQgMDE6NDU6MzlQTSAr MDIwMCwgQ2hyaXN0aWFuIEvDtm5pZyB3cm90ZToKPj4+Pj4gT2gsIHllYWggd2UgY2FsbCB0aGF0 IGdhbmcgc3VibWl0IG9uIHRoZSBBTUQgc2lkZS4KPj4+Pj4KPj4+Pj4gSGFkIGFscmVhZHkgc29t ZSBpbnRlcm5hbCBkaXNjdXNzaW9ucyBob3cgdG8gaW1wbGVtZW50IHRoaXMsIGJ1dCBzbyBmYXIK Pj4+Pj4gY291bGRuJ3QgZmlndXJlIG91dCBob3cgdG8gY2xlYW5seSBpbnRyb2R1Y2UgdGhhdCBp bnRvIHRoZSBEUk0gc2NoZWR1bGVyLgo+Pj4+Pgo+Pj4+PiBDYW4geW91IGJyaWVmbHkgZGVzY3Jp YmUgaW4gYSBmZXcgd29yZHMgaG93IHRoYXQgaXMgc3VwcG9zZWQgdG8gd29yayBvbiB0aGUKPj4+ Pj4gSW50ZWwgc2lkZT8KPiBPbiBJbnRlbCwgd2UgYWN0dWFsbHkgaGF2ZSB0d28gY2FzZXMgd2hp Y2ggZG9uJ3QgZml0IHRoZSBjdXJyZW50Cj4gZHJtL3NjaGVkdWxlciBtb2RlbCB3ZWxsOiBiYWxh bmNlZCBhbmQgYm9uZGVkLgo+Cj4gSW4gdGhlIGJhbGFuY2VkIG1vZGVsLCB3ZSB3YW50IHRvIHN1 Ym1pdCBhIGJhdGNoIHdoaWNoIGNhbiBnbyB0byBhbnkKPiBvbmUgb2Ygc29tZSBzZXQgb2YgZW5n aW5lcyBhbmQgd2UgZG9uJ3QgY2FyZSB3aGljaC4gIEl0J3MgdXAgdG8gdGhlCj4ga2VybmVsIHRv IHBpY2sgYW4gZW5naW5lLiAgSW1hZ2luZSB5b3UgaGFkIDY0IGlkZW50aWNhbCBIVyBjb21wdXRl Cj4gcXVldWVzLCBmb3IgaW5zdGFuY2UuICBUaGlzIGNvdWxkIGJlIGRvbmUgYnkgbWFraW5nIGFs bCB0aGUgaWRlbnRpY2FsCj4gZW5naW5lcyBzaGFyZSBhIHNpbmdsZSBkcm1fZ3B1X3NjaGVkdWxl ciBhbmQgcm91bmQtcm9iaW4gYXJvdW5kIHRoZSBIVwo+IHF1ZXVlcyBvciBzb21ldGhpbmcuICBJ IGRvbid0IGtub3cgdGhhdCB3ZSBzdHJpY3RseSBuZWVkIGRybS9zY2hlZHVsZXIKPiB0byBiZSBh d2FyZSBvZiBpdCBidXQgaXQgbWlnaHQgYmUgbmljZSBpZiBpdCBncmV3IHN1cHBvcnQgZm9yIHRo aXMKPiBtb2RlIHNvIHdlIGNvdWxkIG1haW50YWluIGEgMToxIHJlbGF0aW9uc2hpcCBiZXR3ZWVu IEhXIHF1ZXVlcyBhbmQKPiBkcm1fZ3B1X3NjaGVkdWxlcnMuICBUaGF0IHNhaWQsIEknbSBub3Qg c3VyZSBob3cgdGhpcyB3b3VsZCBwbGF5IHdpdGgKPiBHdUMgcXVldWVzIHNvIG1heWJlIGl0IGRv ZXNuJ3QgaGVscD8KCk9oLCB3ZSBkbyBoYXZlIHN1cHBvcnQgZm9yIGxvYWQgYmFsYW5jaW5nIGxp a2UgdGhhdC4KCldoZW4geW91IGNhbGwgZHJtX3NjaGVkX2VudGl0eV9pbml0KCkgeW91IGNhbiBn aXZlIGEgbGlzdCBvZiAKZHJtX2dwdV9zY2hlZHVsZXIgb2JqZWN0IHRvIHVzZSByb3VuZCByb2Jp bmcgZm9yIHNjaGVkdWxpbmcuCgpOZXcgam9icyBhcmUgdGhlbiBzY2hlZHVsZXIgdG8gdGhlIGRy bV9ncHVfc2NoZWR1bGVyIGluc3RhbmNlIHdoaWNoIGlzIAppZGxlIG9yIHJhdGhlciB0aGUgbGVh c3QgYnVzeSBvbmUuCgo+IFRoZSBib25kZWQgbW9kZWwgaXMgbGlrZSB5b3VyIGdhbmdlZCwgSSB0 aGluay4gIFdlIHdhbnQgdG8gc3VibWl0IE4KPiBiYXRjaGVzIHRvIHJ1biBpbiBwYXJhbGxlbC4g IEFuZCB0aGV5IGFjdHVhbGx5IGhhdmUgdG8gYmUgZXhlY3V0aW5nIG9uCj4gdGhlIEdQVSBzaW11 bHRhbmVvdXNseSBhbmQgbm90IGp1c3Qgc29ydC1vZiBhdCBzaW1pbGFyIHRpbWVzLiAgV2UgbmVl ZAo+IHRoaXMgZm9yIHZpZGVvLiAgVGhlcmUgYXJlIGFsc28gcG90ZW50aWFsIHVzZS1jYXNlcyBp biBWdWxrYW4gb3IgZXZlbgo+IEdMIHRoYXQgbWlnaHQgYmUgYWJsZSB0byB1c2UgdGhpcy4gIE9u ZSBkaWZmZXJlbmNlIHdpdGggdGhlIGJhbGFuY2VkCj4gbW9kZSBpcyB0aGF0IGJvbmRzIGRvbid0 LCBzdHJpY3RseSBzcGVha2luZywgbmVlZCB0byBiZSBvbiB0aGUgc2FtZQo+IHR5cGUgb2YgZW5n aW5lLiAgSW1hZ2luZSwgZm9yIGluc3RhbmNlLCBhIDNEIGJhdGNoIHdpdGggYSBwYXJhbGxlbAo+ IGNvbXB1dGUgYmF0Y2ggZG9pbmcgdmVydGV4IHByZS1wcm9jZXNzaW5nLgo+Cj4gSSdtIHByZXR0 eSBzdXJlIHRoZSBib25kZWQgY2FzZSBpcyBzb21ldGhpbmcgdGhhdCB0aGUgbW9iaWxlIGRyaXZl cnMKPiAocGFuZnJvc3QsIGV0Yy4pIHdvdWxkIGxpa2UgYXMgd2VsbCBmb3IgZG9pbmcgVnVsa2Fu IG9uIHRpbGVycyB3aGVyZQo+IHlvdSBvZnRlbiBoYXZlIHRvIGhhdmUgdHdvIGNvbW1hbmQgYnVm ZmVycyBydW5uaW5nIGluIHBhcmFsbGVsLgo+IFRoZXkncmUgY3VycmVudGx5IGRvaW5nIGl0IGJ5 IHN1Ym1pdHRpbmcgYSBnaWFudCBwaWxlIG9mIGJhdGNoZXMgd2hlcmUKPiB0aGV5IHNwbGl0IHRo ZSBiYXRjaCBhbmQgYWRkIHN5bmMgcHJpbWl0aXZlcyBldmVyeSB0aW1lIHNvbWUgR0wgY2FsbAo+ IHJlcXVpcmVzIHRoZW0gdG8gc3luYyBiZXR3ZWVuIGZyYWdtZW50IGFuZCB2ZXJ0ZXggcGlwZXMu CgpZZWFoLCB3ZSBoYXZlIGV4YWN0bHkgdGhlIHNhbWUgcHJvYmxlbSBhcyB3ZWxsLgoKQnV0IHNv IGZhciBldmVyeSBtb2RlbCB3ZSBkaXNjdXNzZWQgaGFzIHNvbWUgZHJhd2JhY2tzIGFuZCBpdCBp cyByYXRoZXIgCmhhcmQgZm9yIHRoZSBzY2hlZHVsZXIgdG8gZ3VhcmFudGVlIHRoYXQgc3R1ZmYg cnVucyBhdCB0aGUgc2FtZSB0aW1lLgoKU28gaWYgeW91IGdvdCBhbnkgaWRlYXMgaG93IHRvIGNs ZWFubHkgaW1wbGVtZW50IHRoYXQgdGhlbiB0aGV5IHdvdWxkIGJlIApyYXRoZXIgd2VsY29tZWQu CgpSZWdhcmRzLApDaHJpc3RpYW4uCgo+Cj4gU28sIHRvIHN1bSB1cCwgSSB0aGluayB0aGVyZSdz IGxpa2VseSBzb21lIGdvb2QgY29sbGFib3JhdGlvbiB0byBiZQo+IGhhZCBoZXJlIGZvciBldmVy eW9uZS4gOi0pCj4KPiAtLUphc29uCj4KPj4+PiBTdXJlLCBJJ3ZlIGRvbmUgYSBxdWljayBQb0Mg aW50ZXJuYWxseSBhbmQgaGF2ZSBiZWVuIGFibGUgdG8gaG9vayB0aGlzCj4+Pj4gaW50byB0aGUg RFJNIHNjaGVkdWxlci4KPj4+Pgo+Pj4+IEJhc2ljYWxseSBlYWNoIEJCIHN0aWxsIG1hcHMgdG8g YSBzaW5nbGUgam9iIGFzIGVhY2ggam9iIGlzIHNvbWV3aGF0Cj4+Pj4gdW5pcXVlIChlLmcuIGVh Y2ggam9iIGhhcyBpdHMgb3duIHJpbmcsIGxyYywgc2Vxbm8sIGV0Yy4uLikuIEhvd2V2ZXIgYWxs Cj4+Pj4gdGhlIGpvYnMgY29uZmlndXJlZCB0byBydW4gaW4gcGFyYWxsZWwgbWFwIHRvIGEgc2lu Z2xlIHNjaGVkX2VudGl0eQo+Pj4+IHdoaWNoIG1haW50YWlucyB0aGUgb3JkZXIgZWFjaCBqb2Ig d2FzIGdlbmVyYXRlZCBmcm9tIHRoZSBleGVjYnVmIElPQ1RMCj4+Pj4gKDEgLSBOKS4gV2hlbiB0 aGUgYmFja2VuZCByZWNlaXZlcyBqb2JzIDEgdG8gTiAtIDEgaXQgYmFzaWNhbGx5IGp1c3QKPj4+ PiB1cGRhdGVzIHNvbWUgaW50ZXJuYWwgc3RhdGUuIFdoZW4gdGhlIGJhY2tlbmQgc2VlcyBqb2Ig TiAobGFzdCBqb2IpIGl0Cj4+Pj4gYWN0dWFsbHkgZG9lcyB0aGUgc3VibWl0IGZvciBqb2JzIDEg LSBOIHdoaWNoIHdpdGggR3VDIHN1Ym1pc3Npb24gaXMgYQo+Pj4+IHNpbXBsZSBjb21tYW5kIG1v dmluZyB0aGUgTFJDIHRhaWwgb2YgdGhlIE4gam9icy4KPj4+Pgo+Pj4+IERhbmllbCBoYXMgc3Vn Z2VzdGVkIHRoYXQgd2UgY3JlYXRlIGEgc2luZ2xlIGpvYiBmb3IgdGhlIE5OIEJCcyBidXQgdGhh dAo+Pj4+IHdvdWxkIGJlIGh1Z2UgcmV3b3JrIHRvIHRoZSBpbnRlcm5hbHMgb2YgdGhlIGk5MTUg YW5kIGxpa2VseSB3b24ndAo+Pj4+IGhhcHBlbiBieSB0aGUgdGltZSB0aGlzIGNvZGUgZmlyc3Qg bGFuZHMuCj4+Pj4KPj4+PiBBbHNvIHdvcnRoIG5vdGluZyBvbmUgd2F5IGEgam9iIGlzbid0IHJl YWxseSBhIHRyZWF0ZWQgaW5kaXZpZHVhbGx5IGlzCj4+Pj4gdGhlIGV4Y2wgc2xvdCB3aXRoIGRt YS1yZXN2LiBJbiB0aGF0IGNhc2Ugd2UgY3JlYXRlIGEgY29tcG9zaXRlIGZlbmNlIG9mCj4+Pj4g YWxsIGpvYnMgKGRtYV9mZW5jZV9hcnJheSkuCj4+PiBZZWFoLCB0aGF0J3Mgc29tZXRoaW5nIHdl IGhhdmUgZGlzY3Vzc2VkIGFzIHdlbGwuCj4+Pgo+Pj4gSG93IGRvIHlvdSBwcmV2ZW50IHRoZSBz Y2hlZHVsZXIgZnJvbSBvdmVyIGNvbW1pdHRpbmcgdG8gYSBzaW5nbGUgcmluZwo+Pj4gYnVmZmVy IGluIHRoaXMgc2NlbmFyaW8/Cj4+Pgo+PiBFYWNoIGpvYiBoYXMgaXRzIG93biByaW5nLCB0aGUg ZXhlY2J1ZiBJT0NUTCB0aHJvdHRsZXMgaXRzZWxmIGZvciBlYWNoCj4+IGpvYiBpZiB0aGVyZSBp c24ndCBzcGFjZSBpbiB0aGUgcmluZy4gVGhpcyBpcyBleGFjdGx5IHRoZSBzYW1lIGFzCj4+IG5v bi1wYXJhbGxlbCBzdWJtaXRzLgo+Pgo+PiBJIHRoaW5rIHRoaXMgaXMgd2hhdCB5b3Ugd2VyZSBh c2tpbmc/IElmIG5vdCwgbWF5YmUgdHJ5IGV4cGxhaW5pbmcgdGhlCj4+IHF1ZXN0aW9uIGEgYml0 IG1vcmUuCj4+Cj4+IE1hdHQKPj4KPj4+IENocmlzdGlhbi4KPj4+Cj4+Pj4gTWF0dAo+Pj4+Cj4+ Pj4+IFRoYW5rcywKPj4+Pj4gQ2hyaXN0aWFuLgo+Pj4+Pgo+Pj4+PiBBbSAxOS4wNS4yMSB1bSAw MTo1OCBzY2hyaWViIE1hdHRoZXcgQnJvc3Q6Cj4+Pj4+PiBBZGQgZW50cnkgZnByIGk5MTUgbmV3 IHBhcmFsbGVsIHN1Ym1pc3Npb24gdUFQSSBwbGFuLgo+Pj4+Pj4KPj4+Pj4+IHYyOgo+Pj4+Pj4g ICAgIChEYW5pZWwgVmV0dGVyKToKPj4+Pj4+ICAgICAgLSBFeHBhbmQgbG9naWNhbCBvcmRlciBl eHBsYWluYXRpb24KPj4+Pj4+ICAgICAgLSBBZGQgZHVtbXkgaGVhZGVyCj4+Pj4+PiAgICAgIC0g T25seSBhbGxvdyBOIEJCcyBpbiBleGVjYnVmIElPQ1RMCj4+Pj4+PiAgICAgIC0gQ29uZmlndXJl IHBhcmFsbGVsIHN1Ym1pc3Npb24gcGVyIHNsb3Qgbm90IHBlciBnZW0gY29udGV4dAo+Pj4+Pj4K Pj4+Pj4+IENjOiBUdnJ0a28gVXJzdWxpbiA8dHZydGtvLnVyc3VsaW5AaW50ZWwuY29tPgo+Pj4+ Pj4gQ2M6IFRvbnkgWWUgPHRvbnkueWVAaW50ZWwuY29tPgo+Pj4+Pj4gQ0M6IENhcmwgWmhhbmcg PGNhcmwuemhhbmdAaW50ZWwuY29tPgo+Pj4+Pj4gQ2M6IERhbmllbCBWZXR0ZXIgPGRhbmllbC52 ZXR0ZXJAaW50ZWwuY29tPgo+Pj4+Pj4gQ2M6IEphc29uIEVrc3RyYW5kIDxqYXNvbkBqbGVrc3Ry YW5kLm5ldD4KPj4+Pj4+IFNpZ25lZC1vZmYtYnk6IE1hdHRoZXcgQnJvc3QgPG1hdHRoZXcuYnJv c3RAaW50ZWwuY29tPgo+Pj4+Pj4gLS0tCj4+Pj4+PiAgICAgRG9jdW1lbnRhdGlvbi9ncHUvcmZj L2k5MTVfcGFyYWxsZWxfZXhlY2J1Zi5oIHwgMTQ0ICsrKysrKysrKysrKysrKysrKwo+Pj4+Pj4g ICAgIERvY3VtZW50YXRpb24vZ3B1L3JmYy9pOTE1X3NjaGVkdWxlci5yc3QgICAgICB8ICA1MyAr KysrKystCj4+Pj4+PiAgICAgMiBmaWxlcyBjaGFuZ2VkLCAxOTYgaW5zZXJ0aW9ucygrKSwgMSBk ZWxldGlvbigtKQo+Pj4+Pj4gICAgIGNyZWF0ZSBtb2RlIDEwMDY0NCBEb2N1bWVudGF0aW9uL2dw dS9yZmMvaTkxNV9wYXJhbGxlbF9leGVjYnVmLmgKPj4+Pj4+Cj4+Pj4+PiBkaWZmIC0tZ2l0IGEv RG9jdW1lbnRhdGlvbi9ncHUvcmZjL2k5MTVfcGFyYWxsZWxfZXhlY2J1Zi5oIGIvRG9jdW1lbnRh dGlvbi9ncHUvcmZjL2k5MTVfcGFyYWxsZWxfZXhlY2J1Zi5oCj4+Pj4+PiBuZXcgZmlsZSBtb2Rl IDEwMDY0NAo+Pj4+Pj4gaW5kZXggMDAwMDAwMDAwMDAwLi44YzY0Yjk4M2NjYWQKPj4+Pj4+IC0t LSAvZGV2L251bGwKPj4+Pj4+ICsrKyBiL0RvY3VtZW50YXRpb24vZ3B1L3JmYy9pOTE1X3BhcmFs bGVsX2V4ZWNidWYuaAo+Pj4+Pj4gQEAgLTAsMCArMSwxNDQgQEAKPj4+Pj4+ICsjZGVmaW5lIEk5 MTVfQ09OVEVYVF9FTkdJTkVTX0VYVF9QQVJBTExFTF9TVUJNSVQgMiAvKiBzZWUgaTkxNV9jb250 ZXh0X2VuZ2luZXNfcGFyYWxsZWxfc3VibWl0ICovCj4+Pj4+PiArCj4+Pj4+PiArLyoKPj4+Pj4+ ICsgKiBpOTE1X2NvbnRleHRfZW5naW5lc19wYXJhbGxlbF9zdWJtaXQ6Cj4+Pj4+PiArICoKPj4+ Pj4+ICsgKiBTZXR1cCBhIHNsb3QgdG8gYWxsb3cgbXVsdGlwbGUgQkJzIHRvIGJlIHN1Ym1pdHRl ZCBpbiBhIHNpbmdsZSBleGVjYnVmIElPQ1RMLgo+Pj4+Pj4gKyAqIFRob3NlIEJCcyB3aWxsIHRo ZW4gYmUgc2NoZWR1bGVkIHRvIHJ1biBvbiB0aGUgR1BVIGluIHBhcmFsbGVsLiBNdWx0aXBsZQo+ Pj4+Pj4gKyAqIGhhcmR3YXJlIGNvbnRleHRzIGFyZSBjcmVhdGVkIGludGVybmFsbHkgaW4gdGhl IGk5MTUgcnVuIHRoZXNlIEJCcy4gT25jZSBhCj4+Pj4+PiArICogc2xvdCBpcyBjb25maWd1cmVk IGZvciBOIEJCcyBvbmx5IE4gQkJzIGNhbiBiZSBzdWJtaXR0ZWQgaW4gZWFjaCBleGVjYnVmCj4+ Pj4+PiArICogSU9DVEwgYW5kIHRoaXMgaXMgaW1wbGljdCBiZWhhdmlvciAoZS5nLiB0aGUgdXNl ciBkb2Vzbid0IHRlbGwgdGhlIGV4ZWNidWYKPj4+Pj4+ICsgKiBJT0NUTCB0aGVyZSBhcmUgTiBC QnMsIHRoZSBleGVjYnVmIElPQ1RMIGtub3cgaG93IG1hbnkgQkJzIHRoZXJlIGFyZSBiYXNlZCBv bgo+Pj4+Pj4gKyAqIHRoZSBzbG90cyBjb25maWd1cmF0aW9uKS4KPj4+Pj4+ICsgKgo+Pj4+Pj4g KyAqIFRoZWlyIGFyZSB0d28gY3VycmVudGx5IGRlZmluZWQgd2F5cyB0byBjb250cm9sIHRoZSBw bGFjZW1lbnQgb2YgdGhlCj4+Pj4+PiArICogaGFyZHdhcmUgY29udGV4dHMgb24gcGh5c2ljYWwg ZW5naW5lczogZGVmYXVsdCBiZWhhdmlvciAobm8gZmxhZ3MpIGFuZAo+Pj4+Pj4gKyAqIEk5MTVf UEFSQUxMRUxfSU1QTElDVF9CT05EUyAoYSBmbGFnKS4gTW9yZSBmbGFncyBtYXkgYmUgYWRkZWQg dGhlIGluIHRoZQo+Pj4+Pj4gKyAqIGZ1dHVyZSBhcyBuZXcgaGFyZHdhcmUgLyB1c2UgY2FzZXMg YXJpc2UuIERldGFpbHMgb2YgaG93IHRvIHVzZSB0aGlzCj4+Pj4+PiArICogaW50ZXJmYWNlIGJl bG93IGFib3ZlIHRoZSBmbGFncy4KPj4+Pj4+ICsgKgo+Pj4+Pj4gKyAqIFJldHVybnMgLUVJTlZB TCBpZiBoYXJkd2FyZSBjb250ZXh0IHBsYWNlbWVudCBjb25maWd1cmF0aW9uIGludmFsaWQgb3Ig aWYgdGhlCj4+Pj4+PiArICogcGxhY2VtZW50IGNvbmZpZ3VyYXRpb24gaXNuJ3Qgc3VwcG9ydGVk IG9uIHRoZSBwbGF0Zm9ybSAvIHN1Ym1pc3Npb24KPj4+Pj4+ICsgKiBpbnRlcmZhY2UuCj4+Pj4+ PiArICogUmV0dXJucyAtRU5PREVWIGlmIGV4dGVuc2lvbiBpc24ndCBzdXBwb3J0ZWQgb24gdGhl IHBsYXRmb3JtIC8gc3VibWlzc2lvbgo+Pj4+Pj4gKyAqIGludGVmYWNlLgo+Pj4+Pj4gKyAqLwo+ Pj4+Pj4gK3N0cnVjdCBpOTE1X2NvbnRleHRfZW5naW5lc19wYXJhbGxlbF9zdWJtaXQgewo+Pj4+ Pj4gKyAgICAgICBzdHJ1Y3QgaTkxNV91c2VyX2V4dGVuc2lvbiBiYXNlOwo+Pj4+Pj4gKwo+Pj4+ Pj4gKyAgICAgICBfX3UxNiBlbmdpbmVfaW5kZXg7ICAgICAvKiBzbG90IGZvciBwYXJhbGxlbCBl bmdpbmUgKi8KPj4+Pj4+ICsgICAgICAgX191MTYgd2lkdGg7ICAgICAgICAgICAgLyogbnVtYmVy IG9mIGNvbnRleHRzIHBlciBwYXJhbGxlbCBlbmdpbmUgKi8KPj4+Pj4+ICsgICAgICAgX191MTYg bnVtX3NpYmxpbmdzOyAgICAgLyogbnVtYmVyIG9mIHNpYmxpbmdzIHBlciBjb250ZXh0ICovCj4+ Pj4+PiArICAgICAgIF9fdTE2IG1iejE2Owo+Pj4+Pj4gKy8qCj4+Pj4+PiArICogRGVmYXVsdCBw bGFjZW1lbnQgYmVodmF2aW9yIChjdXJyZW50bHkgdW5zdXBwb3J0ZWQpOgo+Pj4+Pj4gKyAqCj4+ Pj4+PiArICogUmF0aGVyIHRoYW4gcmVzdHJpY3RpbmcgcGFyYWxsZWwgc3VibWlzc2lvbiB0byBh IHNpbmdsZSBjbGFzcyB3aXRoIGEKPj4+Pj4+ICsgKiBsb2dpY2FsbHkgY29udGlndW91cyBwbGFj ZW1lbnQgKEk5MTVfUEFSQUxMRUxfSU1QTElDVF9CT05EUyksIGFkZCBhIG1vZGUgdGhhdAo+Pj4+ Pj4gKyAqIGVuYWJsZXMgcGFyYWxsZWwgc3VibWlzc2lvbiBhY3Jvc3MgbXVsdGlwbGUgZW5naW5l IGNsYXNzZXMuIEluIHRoaXMgY2FzZSBlYWNoCj4+Pj4+PiArICogY29udGV4dCdzIGxvZ2ljYWwg ZW5naW5lIG1hc2sgaW5kaWNhdGVzIHdoZXJlIHRoYXQgY29udGV4dCBjYW4gcGxhY2VkLiBJdCBp cwo+Pj4+Pj4gKyAqIGltcGxpZWQgaW4gdGhpcyBtb2RlIHRoYXQgYWxsIGNvbnRleHRzIGhhdmUg bXV0dWFsIGV4Y2x1c2l2ZSBwbGFjZW1lbnQgKGUuZy4KPj4+Pj4+ICsgKiBpZiBvbmUgY29udGV4 dCBpcyBydW5uaW5nIENTMCBubyBvdGhlciBjb250ZXh0cyBjYW4gcnVuIG9uIENTMCkuCj4+Pj4+ PiArICoKPj4+Pj4+ICsgKiBFeGFtcGxlIDEgcHNldWRvIGNvZGU6Cj4+Pj4+PiArICogQ1NYW1ld ID0gZW5naW5lIGNsYXNzIFgsIGxvZ2ljYWwgaW5zdGFuY2UgWQo+Pj4+Pj4gKyAqIElOVkFMSUQg PSBJOTE1X0VOR0lORV9DTEFTU19JTlZBTElELCBJOTE1X0VOR0lORV9DTEFTU19JTlZBTElEX05P TkUKPj4+Pj4+ICsgKiBzZXRfZW5naW5lcyhJTlZBTElEKQo+Pj4+Pj4gKyAqIHNldF9wYXJhbGxl bChlbmdpbmVfaW5kZXg9MCwgd2lkdGg9MiwgbnVtX3NpYmxpbmdzPTIsCj4+Pj4+PiArICogICAg ICAgICAgICAgZW5naW5lcz1DUzBbMF0sQ1MwWzFdLENTMVswXSxDUzFbMV0pCj4+Pj4+PiArICoK Pj4+Pj4+ICsgKiBSZXN1bHRzIGluIHRoZSBmb2xsb3dpbmcgdmFsaWQgcGxhY2VtZW50czoKPj4+ Pj4+ICsgKiBDUzBbMF0sIENTMVswXQo+Pj4+Pj4gKyAqIENTMFswXSwgQ1MxWzFdCj4+Pj4+PiAr ICogQ1MwWzFdLCBDUzFbMF0KPj4+Pj4+ICsgKiBDUzBbMV0sIENTMVsxXQo+Pj4+Pj4gKyAqCj4+ Pj4+PiArICogVGhpcyBjYW4gYWxzbyBiZSB0aG91Z2ggb2YgYXMgMiB2aXJ0dWFsIGVuZ2luZXM6 Cj4+Pj4+PiArICogVkVbMF0gPSBDUzBbMF0sIENTMFsxXQo+Pj4+Pj4gKyAqIFZFWzFdID0gQ1Mx WzBdLCBDUzFbMV0KPj4+Pj4+ICsgKgo+Pj4+Pj4gKyAqIEV4YW1wbGUgMiBwc2V1ZG8gY29kZToK Pj4+Pj4+ICsgKiBDU1tYXSA9IGdlbmVyaWMgZW5naW5lIG9mIHNhbWUgY2xhc3MsIGxvZ2ljYWwg aW5zdGFuY2UgWAo+Pj4+Pj4gKyAqIElOVkFMSUQgPSBJOTE1X0VOR0lORV9DTEFTU19JTlZBTElE LCBJOTE1X0VOR0lORV9DTEFTU19JTlZBTElEX05PTkUKPj4+Pj4+ICsgKiBzZXRfZW5naW5lcyhJ TlZBTElEKQo+Pj4+Pj4gKyAqIHNldF9wYXJhbGxlbChlbmdpbmVfaW5kZXg9MCwgd2lkdGg9Miwg bnVtX3NpYmxpbmdzPTMsCj4+Pj4+PiArICogICAgICAgICAgICAgZW5naW5lcz1DU1swXSxDU1sx XSxDU1syXSxDU1swXSxDU1sxXSxDU1syXSkKPj4+Pj4+ICsgKgo+Pj4+Pj4gKyAqIFJlc3VsdHMg aW4gdGhlIGZvbGxvd2luZyB2YWxpZCBwbGFjZW1lbnRzOgo+Pj4+Pj4gKyAqIENTWzBdLCBDU1sx XQo+Pj4+Pj4gKyAqIENTWzBdLCBDU1syXQo+Pj4+Pj4gKyAqIENTWzFdLCBDU1swXQo+Pj4+Pj4g KyAqIENTWzFdLCBDU1syXQo+Pj4+Pj4gKyAqIENTWzJdLCBDU1swXQo+Pj4+Pj4gKyAqIENTWzJd LCBDU1sxXQo+Pj4+Pj4gKyAqCj4+Pj4+PiArICoKPj4+Pj4+ICsgKiBUaGlzIGNhbiBhbHNvIGJl IHRob3VnaCBvZiBhcyAyIHZpcnR1YWwgZW5naW5lczoKPj4+Pj4+ICsgKiBWRVswXSA9IENTWzBd LCBDU1sxXSwgQ1NbMl0KPj4+Pj4+ICsgKiBWRVsxXSA9IENTWzBdLCBDU1sxXSwgQ1NbMl0KPj4+ Pj4+ICsKPj4+Pj4+ICsgKiBUaGlzIGVuYWJsZXMgYSB1c2UgY2FzZSB3aGVyZSBhbGwgZW5naW5l cyBhcmUgY3JlYXRlZCBlcXVhbGx5LCB3ZSBkb24ndCBjYXJlCj4+Pj4+PiArICogd2hlcmUgdGhl eSBhcmUgc2NoZWR1bGVkLCB3ZSBqdXN0IHdhbnQgYSBjZXJ0YWluIG51bWJlciBvZiByZXNvdXJj ZXMsIGZvcgo+Pj4+Pj4gKyAqIHRob3NlIHJlc291cmNlcyB0byBiZSBzY2hlZHVsZWQgaW4gcGFy YWxsZWwsIGFuZCBwb3NzaWJseSBhY3Jvc3MgbXVsdGlwbGUKPj4+Pj4+ICsgKiBlbmdpbmUgY2xh c3Nlcy4KPj4+Pj4+ICsgKi8KPj4+Pj4+ICsKPj4+Pj4+ICsvKgo+Pj4+Pj4gKyAqIEk5MTVfUEFS QUxMRUxfSU1QTElDVF9CT05EUyAtIENyZWF0ZSBpbXBsaWN0IGJvbmRzIGJldHdlZW4gZWFjaCBj b250ZXh0Lgo+Pj4+Pj4gKyAqIEVhY2ggY29udGV4dCBtdXN0IGhhdmUgdGhlIHNhbWUgbnVtYmVy IHNpYmxpbmcgYW5kIGJvbmRzIGFyZSBpbXBsaWN0bHkgY3JlYXRlCj4+Pj4+PiArICogb2YgdGhl IHNpYmxpbmdzLgo+Pj4+Pj4gKyAqCj4+Pj4+PiArICogQWxsIG9mIHRoZSBiZWxvdyBleGFtcGxl cyBhcmUgaW4gbG9naWNhbCBzcGFjZS4KPj4+Pj4+ICsgKgo+Pj4+Pj4gKyAqIEV4YW1wbGUgMSBw c2V1ZG8gY29kZToKPj4+Pj4+ICsgKiBDU1tYXSA9IGdlbmVyaWMgZW5naW5lIG9mIHNhbWUgY2xh c3MsIGxvZ2ljYWwgaW5zdGFuY2UgWAo+Pj4+Pj4gKyAqIElOVkFMSUQgPSBJOTE1X0VOR0lORV9D TEFTU19JTlZBTElELCBJOTE1X0VOR0lORV9DTEFTU19JTlZBTElEX05PTkUKPj4+Pj4+ICsgKiBz ZXRfZW5naW5lcyhJTlZBTElEKQo+Pj4+Pj4gKyAqIHNldF9wYXJhbGxlbChlbmdpbmVfaW5kZXg9 MCwgd2lkdGg9MiwgbnVtX3NpYmxpbmdzPTEsCj4+Pj4+PiArICogICAgICAgICAgICAgZW5naW5l cz1DU1swXSxDU1sxXSwgZmxhZ3M9STkxNV9QQVJBTExFTF9JTVBMSUNUX0JPTkRTKQo+Pj4+Pj4g KyAqCj4+Pj4+PiArICogUmVzdWx0cyBpbiB0aGUgZm9sbG93aW5nIHZhbGlkIHBsYWNlbWVudHM6 Cj4+Pj4+PiArICogQ1NbMF0sIENTWzFdCj4+Pj4+PiArICoKPj4+Pj4+ICsgKiBFeGFtcGxlIDIg cHNldWRvIGNvZGU6Cj4+Pj4+PiArICogQ1NbWF0gPSBnZW5lcmljIGVuZ2luZSBvZiBzYW1lIGNs YXNzLCBsb2dpY2FsIGluc3RhbmNlIFgKPj4+Pj4+ICsgKiBJTlZBTElEID0gSTkxNV9FTkdJTkVf Q0xBU1NfSU5WQUxJRCwgSTkxNV9FTkdJTkVfQ0xBU1NfSU5WQUxJRF9OT05FCj4+Pj4+PiArICog c2V0X2VuZ2luZXMoSU5WQUxJRCkKPj4+Pj4+ICsgKiBzZXRfcGFyYWxsZWwoZW5naW5lX2luZGV4 PTAsIHdpZHRoPTIsIG51bV9zaWJsaW5ncz0yLAo+Pj4+Pj4gKyAqICAgICAgICAgICAgIGVuZ2lu ZXM9Q1NbMF0sQ1NbMl0sQ1NbMV0sQ1NbM10sIGZsYWdzPUk5MTVfUEFSQUxMRUxfSU1QTElDVF9C T05EUykKPj4+Pj4+ICsgKgo+Pj4+Pj4gKyAqIFJlc3VsdHMgaW4gdGhlIGZvbGxvd2luZyB2YWxp ZCBwbGFjZW1lbnRzOgo+Pj4+Pj4gKyAqIENTWzBdLCBDU1sxXQo+Pj4+Pj4gKyAqIENTWzJdLCBD U1szXQo+Pj4+Pj4gKyAqCj4+Pj4+PiArICogVGhpcyBjYW4gYWxzbyBiZSB0aG91Z2ggb2YgYXMg MiB2aXJ0dWFsIGVuZ2luZXM6Cj4+Pj4+PiArICogVkVbMF0gPSBDU1swXSwgQ1NbMl0KPj4+Pj4+ ICsgKiBWRVsxXSA9IENTWzFdLCBDU1szXQo+Pj4+Pj4gKyAqCj4+Pj4+PiArICogVGhpcyBlbmFi bGVzIGEgdXNlIGNhc2Ugd2hlcmUgYWxsIGVuZ2luZXMgYXJlIG5vdCBlcXVhbCBhbmQgY2VydGFp biBwbGFjZW1lbnQKPj4+Pj4+ICsgKiBydWxlcyBhcmUgcmVxdWlyZWQgKGkuZS4gc3BsaXQtZnJh bWUgcmVxdWlyZXMgYWxsIGNvbnRleHRzIHRvIGJlIHBsYWNlZCBpbiBhCj4+Pj4+PiArICogbG9n aWNhbGx5IGNvbnRpZ3VvdXMgb3JkZXIgb24gdGhlIFZDUyBlbmdpbmVzIG9uIGdlbjExKyBwbGF0 Zm9ybXMpLiBUaGlzIHVzZQo+Pj4+Pj4gKyAqIGNhc2UgKGxvZ2ljYWxseSBjb250aWd1b3VzIHBs YWNlbWVudCwgd2l0aGluIGEgc2luZ2xlIGVuZ2luZSBjbGFzcykgaXMKPj4+Pj4+ICsgKiBzdXBw b3J0ZWQgd2hlbiB1c2luZyBHdUMgc3VibWlzc2lvbi4gRXhlY2xpc3QgbW9kZSBjb3VsZCBzdXBw b3J0IGFsbCBwb3NzaWJsZQo+Pj4+Pj4gKyAqIGJvbmRpbmcgY29uZmlndXJhdGlvbnMgYnV0IGN1 cnJlbnRseSBkb2Vzbid0IHN1cHBvcnQgdGhpcyBleHRlbnNpb24uCj4+Pj4+PiArICovCj4+Pj4+ PiArI2RlZmluZSBJOTE1X1BBUkFMTEVMX0lNUExJQ1RfQk9ORFMgICAgICAgICAgICAgICAgICAg ICgxPDwwKQo+Pj4+Pj4gKy8qCj4+Pj4+PiArICogRG8gbm90IGFsbG93IEJCcyB0byBiZSBwcmVl bXB0ZWQgbWlkIEJCIHJhdGhlciBpbnNlcnQgY29vcmRpbmF0ZWQgcHJlZW1wdGlvbgo+Pj4+Pj4g KyAqIHBvaW50cyBvbiBhbGwgaGFyZHdhcmUgY29udGV4dHMgYmV0d2VlbiBlYWNoIHNldCBvZiBC QnMuIEFuIGV4YW1wbGUgdXNlIGNhc2UKPj4+Pj4+ICsgKiBvZiB0aGlzIGZlYXR1cmUgaXMgc3Bs aXQtZnJhbWUgb24gZ2VuMTErIGhhcmR3YXJlLiBXaGVuIHVzaW5nIHRoaXMgZmVhdHVyZSBhCj4+ Pj4+PiArICogQkIgbXVzdCBiZSBzdWJtaXR0ZWQgb24gZWFjaCBoYXJkd2FyZSBjb250ZXh0IGlu IHRoZSBwYXJhbGxlbCBnZW0gY29udGV4dC4KPj4+Pj4+ICsgKiBUaGUgZXhlY2J1ZjIgSU9DVEwg ZW5mb3JjZXMgdGhlIHVzZXIgYWRoZXJlcyB0byBwb2xpY3kuCj4+Pj4+PiArICovCj4+Pj4+PiAr I2RlZmluZSBJOTE1X1BBUkFMTEVMX05PX1BSRUVNUFRfTUlEX0JBVENIICAgICAgICAgICAgICgx PDwxKQo+Pj4+Pj4gKyNkZWZpbmUgX19JOTE1X1BBUkFMTEVMX1VOS05PV05fRkxBR1MgICgtKEk5 MTVfUEFSQUxMRUxfTk9fUFJFRU1QVF9NSURfQkFUQ0ggPDwgMSkpCj4+Pj4+PiArICAgICAgIF9f dTY0IGZsYWdzOyAgICAgICAgICAgIC8qIGFsbCB1bmRlZmluZWQgZmxhZ3MgbXVzdCBiZSB6ZXJv ICovCj4+Pj4+PiArICAgICAgIF9fdTY0IG1iejY0WzNdOyAgICAgICAgIC8qIHJlc2VydmVkIGZv ciBmdXR1cmUgdXNlOyBtdXN0IGJlIHplcm8gKi8KPj4+Pj4+ICsKPj4+Pj4+ICsgICAgICAgLyoK Pj4+Pj4+ICsgICAgICAgICogd2lkdGggKGkpICogbnVtX3NpYmxpbmdzIChqKSBpbiBsZW5ndGgK Pj4+Pj4+ICsgICAgICAgICogaW5kZXggPSBqICsgaSAqIG51bV9zaWJsaW5ncwo+Pj4+Pj4gKyAg ICAgICAgKi8KPj4+Pj4+ICsgICAgICAgc3RydWN0IGk5MTVfZW5naW5lX2NsYXNzX2luc3RhbmNl IGVuZ2luZXNbMF07Cj4+Pj4+PiArfSBfX2F0dHJpYnV0ZV9fICgocGFja2VkKSk7Cj4+Pj4+PiAr Cj4+Pj4+PiBkaWZmIC0tZ2l0IGEvRG9jdW1lbnRhdGlvbi9ncHUvcmZjL2k5MTVfc2NoZWR1bGVy LnJzdCBiL0RvY3VtZW50YXRpb24vZ3B1L3JmYy9pOTE1X3NjaGVkdWxlci5yc3QKPj4+Pj4+IGlu ZGV4IDdmYWE0NmNkZTA4OC4uNjRjNTM5NDg2ZWU0IDEwMDY0NAo+Pj4+Pj4gLS0tIGEvRG9jdW1l bnRhdGlvbi9ncHUvcmZjL2k5MTVfc2NoZWR1bGVyLnJzdAo+Pj4+Pj4gKysrIGIvRG9jdW1lbnRh dGlvbi9ncHUvcmZjL2k5MTVfc2NoZWR1bGVyLnJzdAo+Pj4+Pj4gQEAgLTgyLDQgKzgyLDU1IEBA IGh0dHBzOi8vbmFtMTEuc2FmZWxpbmtzLnByb3RlY3Rpb24ub3V0bG9vay5jb20vP3VybD1odHRw cyUzQSUyRiUyRnNwZWMub25lYXBpLmNvbSUyRmxldmVsLXplcm8lMkZsYXRlc3QlMkZjb3JlJTJG YXBpLmh0bWwlMjN6ZS1jb21tYW5kLXF1ZXVlLXByaW9yaXQmYW1wO2RhdGE9MDQlN0MwMSU3Q2No cmlzdGlhbi5rb2VuaWclNDBhbWQuY29tJTdDNDlhNzU1N2Y0ZTQ5NDA5MDc1NTYwOGQ5MWFlNzU4 YTYlN0MzZGQ4OTYxZmU0ODg0ZTYwOGUxMWE4MmQ5OTRlMTgzZCU3QzAlN0MwJTdDNjM3NTcwNDAz MjAyOTY5Mzc1JTdDVW5rbm93biU3Q1RXRnBiR1pzYjNkOGV5SldJam9pTUM0d0xqQXdNREFpTENK UUlqb2lWMmx1TXpJaUxDSkJUaUk2SWsxaGFXd2lMQ0pYVkNJNk1uMCUzRCU3QzEwMDAmYW1wO3Nk YXRhPWRuM1BWZHhZUXBrcFdJcnU1ZUFYSGdiZnVMRGtwcEFBNWRhVjVzSFFGN3MlM0QmYW1wO3Jl c2VydmVkPTAKPj4+Pj4+ICAgICBOZXcgcGFyYWxsZWwgc3VibWlzc2lvbiB1QVBJCj4+Pj4+PiAg ICAgPT09PT09PT09PT09PT09PT09PT09PT09PT09PQo+Pj4+Pj4gLURldGFpbHMgdG8gY29tZSBp biBhIGZvbGxvd2luZyBwYXRjaC4KPj4+Pj4+ICtUaGUgZXhpc3RpbmcgYm9uZGluZyB1QVBJIGlz IGNvbXBsZXRlbHkgYnJva2VuIHdpdGggR3VDIHN1Ym1pc3Npb24gYmVjYXVzZQo+Pj4+Pj4gK3do ZXRoZXIgYSBzdWJtaXNzaW9uIGlzIGEgc2luZ2xlIGNvbnRleHQgc3VibWl0IG9yIHBhcmFsbGVs IHN1Ym1pdCBpc24ndCBrbm93bgo+Pj4+Pj4gK3VudGlsIGV4ZWNidWYgdGltZSBhY3RpdmF0ZWQg dmlhIHRoZSBJOTE1X1NVQk1JVF9GRU5DRS4gVG8gc3VibWl0IG11bHRpcGxlCj4+Pj4+PiArY29u dGV4dHMgaW4gcGFyYWxsZWwgd2l0aCB0aGUgR3VDIHRoZSBjb250ZXh0IG11c3QgYmUgZXhwbGlj dGx5IHJlZ2lzdGVyZWQgd2l0aAo+Pj4+Pj4gK04gY29udGV4dHMgYW5kIGFsbCBOIGNvbnRleHRz IG11c3QgYmUgc3VibWl0dGVkIGluIGEgc2luZ2xlIGNvbW1hbmQgdG8gdGhlIEd1Qy4KPj4+Pj4+ ICtUaGVzZSBpbnRlcmZhY2VzIGRvZXNuJ3Qgc3VwcG9ydCBkeW5hbWljYWxseSBjaGFuZ2luZyBi ZXR3ZWVuIE4gY29udGV4dHMgYXMgdGhlCj4+Pj4+PiArYm9uZGluZyB1QVBJIGRvZXMuIEhlbmNl IHRoZSBuZWVkIGZvciBhIG5ldyBwYXJhbGxlbCBzdWJtaXNzaW9uIGludGVyZmFjZS4gQWxzbwo+ Pj4+Pj4gK3RoZSBsZWdhY3kgYm9uZGluZyB1QVBJIGlzIHF1aXRlIGNvbmZ1c2luZyBhbmQgbm90 IGludHVpdGl2ZSBhdCBhbGwuCj4+Pj4+PiArCj4+Pj4+PiArVGhlIG5ldyBwYXJhbGxlbCBzdWJt aXNzaW9uIHVBUEkgY29uc2lzdHMgb2YgMyBwYXJ0czoKPj4+Pj4+ICsKPj4+Pj4+ICsqIEV4cG9y dCBlbmdpbmVzIGxvZ2ljYWwgbWFwcGluZwo+Pj4+Pj4gKyogQSAnc2V0X3BhcmFsbGVsJyBleHRl bnNpb24gdG8gY29uZmlndXJlIGNvbnRleHRzIGZvciBwYXJhbGxlbAo+Pj4+Pj4gKyAgc3VibWlz c2lvbgo+Pj4+Pj4gKyogRXh0ZW5kIGV4ZWNidWYyIElPQ1RMIHRvIHN1cHBvcnQgc3VibWl0dGlu ZyBOIEJCcyBpbiBhIHNpbmdsZSBJT0NUTAo+Pj4+Pj4gKwo+Pj4+Pj4gK0V4cG9ydCBlbmdpbmVz IGxvZ2ljYWwgbWFwcGluZwo+Pj4+Pj4gKy0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQo+ Pj4+Pj4gK0NlcnRhaW4gdXNlIGNhc2VzIHJlcXVpcmUgQkJzIHRvIGJlIHBsYWNlZCBvbiBlbmdp bmUgaW5zdGFuY2VzIGluIGxvZ2ljYWwgb3JkZXIKPj4+Pj4+ICsoZS5nLiBzcGxpdC1mcmFtZSBv biBnZW4xMSspLiBUaGUgbG9naWNhbCBtYXBwaW5nIG9mIGVuZ2luZSBpbnN0YW5jZXMgY2FuIGNo YW5nZQo+Pj4+Pj4gK2Jhc2VkIG9uIGZ1c2luZy4gUmF0aGVyIHRoYW4gbWFraW5nIFVNRHMgYmUg YXdhcmUgb2YgZnVzaW5nLCBzaW1wbHkgZXhwb3NlIHRoZQo+Pj4+Pj4gK2xvZ2ljYWwgbWFwcGlu ZyB3aXRoIHRoZSBleGlzdGluZyBxdWVyeSBlbmdpbmUgaW5mbyBJT0NUTC4gQWxzbyB0aGUgR3VD Cj4+Pj4+PiArc3VibWlzc2lvbiBpbnRlcmZhY2UgY3VycmVudGx5IG9ubHkgc3VwcG9ydHMgc3Vi bWl0dGluZyBtdWx0aXBsZSBjb250ZXh0cyB0bwo+Pj4+Pj4gK2VuZ2luZXMgaW4gbG9naWNhbCBv cmRlciB3aGljaCBpcyBhIG5ldyByZXF1aXJlbWVudCBjb21wYXJlZCB0byBleGVjbGlzdHMuCj4+ Pj4+PiArTGFzdGx5LCBhbGwgY3VycmVudCBwbGF0Zm9ybXMgaGF2ZSBhdCBtb3N0IDIgaW5zdGFu Y2VzIGFuZCB0aGUgbG9naWNhbCBvcmRlciBpcwo+Pj4+Pj4gK3RoZSBzYW1lIGEgdUFCSSBvcmRl ci4gVGhpcyB3aWxsIGNoYW5nZSBvbiBwbGF0Zm9ybXMgd2l0aCBtb3JlIHRoYW4gMiBpbnN0YW5j ZXMuCj4+Pj4+PiArCj4+Pj4+PiArQSBzaW5nbGUgYml0IHdpbGwgYmUgYWRkZWQgdG8gZHJtX2k5 MTVfZW5naW5lX2luZm8uZmxhZ3MgaW5kaWNhdGluZyB0aGF0IHRoZQo+Pj4+Pj4gK2xvZ2ljYWwg aW5zdGFuY2UgaGFzIGJlZW4gcmV0dXJuZWQgYW5kIGEgbmV3IGZpZWxkLAo+Pj4+Pj4gK2RybV9p OTE1X2VuZ2luZV9pbmZvLmxvZ2ljYWxfaW5zdGFuY2UsIHJldHVybnMgdGhlIGxvZ2ljYWwgaW5z dGFuY2UuCj4+Pj4+PiArCj4+Pj4+PiArQSAnc2V0X3BhcmFsbGVsJyBleHRlbnNpb24gdG8gY29u ZmlndXJlIGNvbnRleHRzIGZvciBwYXJhbGxlbCBzdWJtaXNzaW9uCj4+Pj4+PiArLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tCj4+Pj4+PiArVGhlICdzZXRfcGFyYWxsZWwnIGV4dGVuc2lvbiBjb25maWd1cmVzIGEg c2xvdCBmb3IgcGFyYWxsZWwgc3VibWlzc2lvbiBvZiBOIEJCcy4KPj4+Pj4+ICtJdCBpcyBzZXR1 cCBzdGVwIHRoYXQgc2hvdWxkIGJlIGNhbGxlZCBiZWZvcmUgdXNpbmcgYW55IG9mIHRoZSBjb250 ZXh0cy4gU2VlCj4+Pj4+PiArSTkxNV9DT05URVhUX0VOR0lORVNfRVhUX0xPQURfQkFMQU5DRSBv ciBJOTE1X0NPTlRFWFRfRU5HSU5FU19FWFRfQk9ORCBmb3IKPj4+Pj4+ICtzaW1pbGFyIGV4aXN0 aW5nIGV4YW1wbGVzLiBPbmNlIGEgc2xvdCBpcyBjb25maWd1cmVkIGZvciBwYXJhbGxlbCBzdWJt aXNzaW9uIHRoZQo+Pj4+Pj4gK2V4ZWNidWYyIElPQ1RMIGNhbiBiZSBjYWxsZWQgc3VibWl0aW5n IE4gQkJzIGluIGEgc2luZ2xlIElPQ1RMLiBJbml0aWFsbHkgb25seQo+Pj4+Pj4gK3N1cHBvcnQg R3VDIHN1Ym1pc3Npb24uIEV4ZWNsaXN0IHN1cHBvcnQgY2FuIGJlIGFkZGVkIGxhdGVyIGlmIG5l ZWRlZC4KPj4+Pj4+ICsKPj4+Pj4+ICtBZGQgSTkxNV9DT05URVhUX0VOR0lORVNfRVhUX1BBUkFM TEVMX1NVQk1JVCBhbmQKPj4+Pj4+ICtpOTE1X2NvbnRleHRfZW5naW5lc19wYXJhbGxlbF9zdWJt aXQgdG8gdGhlIHVBUEkgdG8gaW1wbGVtZW50IHRoaXMgZXh0ZW5zaW9uLgo+Pj4+Pj4gKwo+Pj4+ Pj4gK0V4dGVuZCBleGVjYnVmMiBJT0NUTCB0byBzdXBwb3J0IHN1Ym1pdHRpbmcgTiBCQnMgaW4g YSBzaW5nbGUgSU9DVEwKPj4+Pj4+ICstLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tCj4+Pj4+PiArQ29udGV4dHMgdGhhdCBo YXZlIGJlZW4gY29uZmlndXJlZCB3aXRoIHRoZSAnc2V0X3BhcmFsbGVsJyBleHRlbnNpb24gYXJl IGFsbG93ZWQKPj4+Pj4+ICt0byBzdWJtaXQgTiBCQnMgaW4gYSBzaW5nbGUgZXhlY2J1ZjIgSU9D VEwuIFRoZSBCQnMgYXJlIGVpdGhlciB0aGUgbGFzdCBOCj4+Pj4+PiArb2JqZWN0cyBpbiB0aGUg ZHJtX2k5MTVfZ2VtX2V4ZWNfb2JqZWN0MiBsaXN0IG9yIHRoZSBmaXJzdCBOIGlmCj4+Pj4+PiAr STkxNV9FWEVDX0JBVENIX0ZJUlNUIGlzIHNldC4gVGhlIG51bWJlciBvZiBCQnMgaXMgaW1wbGlj dCBiYXNlZCBvbiB0aGUgc2xvdAo+Pj4+Pj4gK3N1Ym1pdHRlZCBhbmQgaG93IGl0IGhhcyBiZWVu IGNvbmZpZ3VyZWQgYnkgJ3NldF9wYXJhbGxlbCcgb3Igb3RoZXIgZXh0ZW5zaW9ucy4KPj4+Pj4+ ICtObyB1QVBJIGNoYW5nZXMgaW4gdGhlIGV4ZWNidWYgSU9DVEwgYnV0IHdvcnRoIG1lbnRpb25p bmcgdGhlIG5ldyBiZWhhdmlvciBvZgo+Pj4+Pj4gK3RoZSBJT0NUTC4KPj4gX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KPj4gSW50ZWwtZ2Z4IG1haWxpbmcg bGlzdAo+PiBJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCj4+IGh0dHBzOi8vbGlzdHMu ZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4CgpfX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBsaXN0 CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3Rv cC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK