From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Daney Subject: Re: Legacy features in PCI Express devices Date: Mon, 13 Mar 2017 10:24:53 -0700 Message-ID: References: Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Cc: Arnd Bergmann , netdev , Thibaud Cornic , David Laight , Bjorn Helgaas , Phuong Nguyen , Robin Murphy , Tim Harvey , Linux ARM To: Mason , linux-pci Return-path: In-Reply-To: Sender: linux-pci-owner@vger.kernel.org List-Id: netdev.vger.kernel.org On 03/13/2017 09:10 AM, Mason wrote: > Hello, > > There are two revisions of our PCI Express controller. > > Rev 1 did not support the following features: > > 1) legacy PCI interrupt delivery (INTx signals) > 2) I/O address space > > Internally, someone stated that such missing support would prevent > some PCIe cards from working with our controller. > > Are there really modern PCIe cards that require 1) and/or 2) > to function? It depends on your definition of "modern". I have some JMicron AHCI SATA controllers that support legacy interrupts only. These are cheap $20 PCIe devices I picked up at Fry's a couple of years ago. Do they count as modern? I/O address space is probably less important I would say. David. > > Can someone provide examples of such cards, so that I may test them > on both revisions? [root@localhost ddaney]# lspci -s 0005:90:00.0 -vvv 0005:90:00.0 SATA controller: JMicron Technology Corp. JMB363 SATA/IDE Controller (rev 03) (prog-if 01 [AHCI 1.0]) Subsystem: JMicron Technology Corp. JMB363 SATA/IDE Controller Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- TAbort- SERR- > I was told to check ath9k-based cards. Any other examples? > > Looking around, I came across this thread: > http://lists.infradead.org/pipermail/linux-arm-kernel/2016-March/418254.html > "i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity" > > IIUC, although some PCIe boards do support MSI, the driver might not > put in the work to use that infrastructure, and instead reverts to > legacy interrupts. (So it is a SW issue, in a sense.) > > Regards. > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > From mboxrd@z Thu Jan 1 00:00:00 1970 From: ddaney.cavm@gmail.com (David Daney) Date: Mon, 13 Mar 2017 10:24:53 -0700 Subject: Legacy features in PCI Express devices In-Reply-To: References: Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 03/13/2017 09:10 AM, Mason wrote: > Hello, > > There are two revisions of our PCI Express controller. > > Rev 1 did not support the following features: > > 1) legacy PCI interrupt delivery (INTx signals) > 2) I/O address space > > Internally, someone stated that such missing support would prevent > some PCIe cards from working with our controller. > > Are there really modern PCIe cards that require 1) and/or 2) > to function? It depends on your definition of "modern". I have some JMicron AHCI SATA controllers that support legacy interrupts only. These are cheap $20 PCIe devices I picked up at Fry's a couple of years ago. Do they count as modern? I/O address space is probably less important I would say. David. > > Can someone provide examples of such cards, so that I may test them > on both revisions? [root at localhost ddaney]# lspci -s 0005:90:00.0 -vvv 0005:90:00.0 SATA controller: JMicron Technology Corp. JMB363 SATA/IDE Controller (rev 03) (prog-if 01 [AHCI 1.0]) Subsystem: JMicron Technology Corp. JMB363 SATA/IDE Controller Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- TAbort- SERR- > I was told to check ath9k-based cards. Any other examples? > > Looking around, I came across this thread: > http://lists.infradead.org/pipermail/linux-arm-kernel/2016-March/418254.html > "i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity" > > IIUC, although some PCIe boards do support MSI, the driver might not > put in the work to use that infrastructure, and instead reverts to > legacy interrupts. (So it is a SW issue, in a sense.) > > Regards. > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel at lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >