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[83.9.32.53]) by smtp.gmail.com with ESMTPSA id g12-20020a0565123b8c00b004aa543f3748sm3324807lfv.130.2023.01.12.08.10.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Jan 2023 08:10:47 -0800 (PST) Message-ID: Date: Thu, 12 Jan 2023 17:10:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH 11/13] clk: qcom: cpu-8996: fix PLL clock ops Content-Language: en-US To: Dmitry Baryshkov , Andy Gross , Bjorn Andersson , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org References: <20230111192004.2509750-1-dmitry.baryshkov@linaro.org> <20230111192004.2509750-12-dmitry.baryshkov@linaro.org> From: Konrad Dybcio In-Reply-To: <20230111192004.2509750-12-dmitry.baryshkov@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 11.01.2023 20:20, Dmitry Baryshkov wrote: > Switch CPU PLLs to use clk_alpha_pll_hwfsm_ops, it seems to suit > better. > > Signed-off-by: Dmitry Baryshkov > --- I *think* SUPPORTS_DYNAMIC_UPDATE should also be kicked from non-alt PLLs.. Otherwise we might have been kicking ourselves in the face all along, changing the frequency of a running PLL that doesn't support it if we were using the main PLL and not the altPLL/ACD.. Downstream sets it only for clk_ops_alpha_pll_hwfsm which is used on alt PLLs only This change seems sound, as Huayra supports dynamic update even without setting any flags. Konrad > drivers/clk/qcom/clk-cpu-8996.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c > index 1c00eb629b61..b53cddc4bca3 100644 > --- a/drivers/clk/qcom/clk-cpu-8996.c > +++ b/drivers/clk/qcom/clk-cpu-8996.c > @@ -128,7 +128,7 @@ static struct clk_alpha_pll pwrcl_pll = { > .name = "pwrcl_pll", > .parent_data = pll_parent, > .num_parents = ARRAY_SIZE(pll_parent), > - .ops = &clk_alpha_pll_huayra_ops, > + .ops = &clk_alpha_pll_hwfsm_ops, > }, > }; > > @@ -140,7 +140,7 @@ static struct clk_alpha_pll perfcl_pll = { > .name = "perfcl_pll", > .parent_data = pll_parent, > .num_parents = ARRAY_SIZE(pll_parent), > - .ops = &clk_alpha_pll_huayra_ops, > + .ops = &clk_alpha_pll_hwfsm_ops, > }, > }; >