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From: Marc Zyngier <marc.zyngier@arm.com>
To: Greg KH <gregkh@linuxfoundation.org>, cdall@linaro.org
Cc: stable@vger.kernel.org, stable-commits@vger.kernel.org
Subject: Re: Patch "KVM: arm/arm64: vgic-v2: Do not use Active+Pending state for a HW interrupt" has been added to the 4.9-stable tree
Date: Wed, 24 May 2017 08:55:35 +0100	[thread overview]
Message-ID: <b3ee9849-cab8-49e7-b495-37e0b5694a17@arm.com> (raw)
In-Reply-To: <20170524070916.GD5785@kroah.com>

On 24/05/17 08:09, Greg KH wrote:
> On Tue, May 23, 2017 at 04:48:26PM +0200, gregkh@linuxfoundation.org wrote:
>>
>> This is a note to let you know that I've just added the patch titled
>>
>>     KVM: arm/arm64: vgic-v2: Do not use Active+Pending state for a HW interrupt
>>
>> to the 4.9-stable tree which can be found at:
>>     http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
>>
>> The filename of the patch is:
>>      kvm-arm-arm64-vgic-v2-do-not-use-active-pending-state-for-a-hw-interrupt.patch
>> and it can be found in the queue-4.9 subdirectory.
>>
>> If you, or anyone else, feels it should not be added to the stable tree,
>> please let <stable@vger.kernel.org> know about it.
>>
>>
>> >From ddf42d068f8802de122bb7efdfcb3179336053f1 Mon Sep 17 00:00:00 2001
>> From: Marc Zyngier <marc.zyngier@arm.com>
>> Date: Tue, 2 May 2017 14:30:39 +0100
>> Subject: KVM: arm/arm64: vgic-v2: Do not use Active+Pending state for a HW interrupt
>>
>> From: Marc Zyngier <marc.zyngier@arm.com>
>>
>> commit ddf42d068f8802de122bb7efdfcb3179336053f1 upstream.
>>
>> When an interrupt is injected with the HW bit set (indicating that
>> deactivation should be propagated to the physical distributor),
>> special care must be taken so that we never mark the corresponding
>> LR with the Active+Pending state (as the pending state is kept in
>> the physycal distributor).
>>
>> Fixes: 140b086dd197 ("KVM: arm/arm64: vgic-new: Add GICv2 world switch backend")
>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>> Reviewed-by: Christoffer Dall <cdall@linaro.org>
>> Signed-off-by: Christoffer Dall <cdall@linaro.org>
>> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
>>
>> ---
>>  virt/kvm/arm/vgic/vgic-v2.c |    7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> --- a/virt/kvm/arm/vgic/vgic-v2.c
>> +++ b/virt/kvm/arm/vgic/vgic-v2.c
>> @@ -168,6 +168,13 @@ void vgic_v2_populate_lr(struct kvm_vcpu
>>  	if (irq->hw) {
>>  		val |= GICH_LR_HW;
>>  		val |= irq->hwintid << GICH_LR_PHYSID_CPUID_SHIFT;
>> +		/*
>> +		 * Never set pending+active on a HW interrupt, as the
>> +		 * pending state is kept at the physical distributor
>> +		 * level.
>> +		 */
>> +		if (irq->active && irq_is_pending(irq))
> 
> Same irq_is_pending() problem here for 4.9 as well, now dropped.

Updated patch:

>From 06cdeec05ff8f62e81bab5c03c679dc16b2be8a3 Mon Sep 17 00:00:00 2001
From: Marc Zyngier <marc.zyngier@arm.com>
Date: Tue, 2 May 2017 14:30:39 +0100
Subject: [PATCH 2/2] KVM: arm/arm64: vgic-v2: Do not use Active+Pending state
 for a HW interrupt

commit ddf42d068f8802de122bb7efdfcb3179336053f1 upstream.

When an interrupt is injected with the HW bit set (indicating that
deactivation should be propagated to the physical distributor),
special care must be taken so that we never mark the corresponding
LR with the Active+Pending state (as the pending state is kept in
the physycal distributor).

Cc: stable@vger.kernel.org
Fixes: 140b086dd197 ("KVM: arm/arm64: vgic-new: Add GICv2 world switch backend")
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
---
 virt/kvm/arm/vgic/vgic-v2.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/virt/kvm/arm/vgic/vgic-v2.c b/virt/kvm/arm/vgic/vgic-v2.c
index 834137e7b83f..1ab58f7b5d74 100644
--- a/virt/kvm/arm/vgic/vgic-v2.c
+++ b/virt/kvm/arm/vgic/vgic-v2.c
@@ -168,6 +168,13 @@ void vgic_v2_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr)
 	if (irq->hw) {
 		val |= GICH_LR_HW;
 		val |= irq->hwintid << GICH_LR_PHYSID_CPUID_SHIFT;
+		/*
+		 * Never set pending+active on a HW interrupt, as the
+		 * pending state is kept at the physical distributor
+		 * level.
+		 */
+		if (irq->active && irq->pending)
+			val &= ~GICH_LR_PENDING_BIT;
 	} else {
 		if (irq->config == VGIC_CONFIG_LEVEL)
 			val |= GICH_LR_EOI;
-- 
2.11.0

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2017-05-24  7:55 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-23 14:48 Patch "KVM: arm/arm64: vgic-v2: Do not use Active+Pending state for a HW interrupt" has been added to the 4.9-stable tree gregkh
2017-05-24  7:09 ` Greg KH
2017-05-24  7:55   ` Marc Zyngier [this message]
2017-06-12  8:19     ` Greg KH
2017-06-12  9:07 gregkh

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