* [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support
@ 2018-02-21 7:39 chin.liang.see at intel.com
2018-02-21 19:23 ` Marek Vasut
0 siblings, 1 reply; 7+ messages in thread
From: chin.liang.see at intel.com @ 2018-02-21 7:39 UTC (permalink / raw)
To: u-boot
From: Chin Liang See <chin.liang.see@intel.com>
Enable Macronix flash support for Cyclone5 SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
---
configs/socfpga_cyclone5_defconfig | 1 +
configs/socfpga_is1_defconfig | 1 +
configs/socfpga_sockit_defconfig | 1 +
configs/socfpga_socrates_defconfig | 1 +
configs/socfpga_sr1500_defconfig | 1 +
configs/socfpga_vining_fpga_defconfig | 1 +
6 files changed, 6 insertions(+)
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 6ebd8a9..aa535c6 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 08628ab..7be720a 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -48,6 +48,7 @@ CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 8ebe394..6edb47f 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 9f42481..7c2428a 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -54,6 +54,7 @@ CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MICREL=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index f9ed1a3..df1ee31 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_DM_ETH=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 6670b9f..512d701 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -69,6 +69,7 @@ CONFIG_LED_STATUS_CMD=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
--
2.2.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support
2018-02-21 7:39 [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support chin.liang.see at intel.com
@ 2018-02-21 19:23 ` Marek Vasut
2018-02-22 6:29 ` See, Chin Liang
0 siblings, 1 reply; 7+ messages in thread
From: Marek Vasut @ 2018-02-21 19:23 UTC (permalink / raw)
To: u-boot
On 02/21/2018 08:39 AM, chin.liang.see at intel.com wrote:
> From: Chin Liang See <chin.liang.see@intel.com>
>
> Enable Macronix flash support for Cyclone5 SoC
Do these boards actually have a macronix flash ? Most of the ones I know
of do not.
> Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
> ---
> configs/socfpga_cyclone5_defconfig | 1 +
> configs/socfpga_is1_defconfig | 1 +
> configs/socfpga_sockit_defconfig | 1 +
> configs/socfpga_socrates_defconfig | 1 +
> configs/socfpga_sr1500_defconfig | 1 +
> configs/socfpga_vining_fpga_defconfig | 1 +
> 6 files changed, 6 insertions(+)
>
> diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
> index 6ebd8a9..aa535c6 100644
> --- a/configs/socfpga_cyclone5_defconfig
> +++ b/configs/socfpga_cyclone5_defconfig
> @@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
> CONFIG_MMC_DW=y
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_SPI_FLASH_STMICRO=y
> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
> index 08628ab..7be720a 100644
> --- a/configs/socfpga_is1_defconfig
> +++ b/configs/socfpga_is1_defconfig
> @@ -48,6 +48,7 @@ CONFIG_SYS_I2C_DW=y
> # CONFIG_MMC is not set
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> CONFIG_SPI_FLASH_STMICRO=y
> CONFIG_PHY_MICREL=y
> CONFIG_PHY_MICREL_KSZ90X1=y
> diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
> index 8ebe394..6edb47f 100644
> --- a/configs/socfpga_sockit_defconfig
> +++ b/configs/socfpga_sockit_defconfig
> @@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
> CONFIG_MMC_DW=y
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_SPI_FLASH_STMICRO=y
> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
> index 9f42481..7c2428a 100644
> --- a/configs/socfpga_socrates_defconfig
> +++ b/configs/socfpga_socrates_defconfig
> @@ -54,6 +54,7 @@ CONFIG_DM_MMC=y
> CONFIG_MMC_DW=y
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_SPI_FLASH_STMICRO=y
> CONFIG_PHY_MICREL=y
> diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
> index f9ed1a3..df1ee31 100644
> --- a/configs/socfpga_sr1500_defconfig
> +++ b/configs/socfpga_sr1500_defconfig
> @@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
> CONFIG_MMC_DW=y
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> CONFIG_SPI_FLASH_STMICRO=y
> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> CONFIG_DM_ETH=y
> diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
> index 6670b9f..512d701 100644
> --- a/configs/socfpga_vining_fpga_defconfig
> +++ b/configs/socfpga_vining_fpga_defconfig
> @@ -69,6 +69,7 @@ CONFIG_LED_STATUS_CMD=y
> CONFIG_DM_MMC=y
> CONFIG_MMC_DW=y
> CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_SPI_FLASH_STMICRO=y
> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
>
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support
2018-02-21 19:23 ` Marek Vasut
@ 2018-02-22 6:29 ` See, Chin Liang
2018-02-22 7:58 ` Simon Goldschmidt
2018-02-22 10:45 ` Marek Vasut
0 siblings, 2 replies; 7+ messages in thread
From: See, Chin Liang @ 2018-02-22 6:29 UTC (permalink / raw)
To: u-boot
On Wed, 2018-02-21 at 20:23 +0100, Marek Vasut wrote:
> On 02/21/2018 08:39 AM, chin.liang.see at intel.com wrote:
> >
> > From: Chin Liang See <chin.liang.see@intel.com>
> >
> > Enable Macronix flash support for Cyclone5 SoC
> Do these boards actually have a macronix flash ? Most of the ones I
> know
> of do not.
Good question.
Actually they are pin compatible and customer can replace the existing
one. FYI, there seems a NOR flash shortage worldwide which lead to
requests by customer to change the BOM list.
Thanks
Chin Liang
>
> >
> > Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
> > ---
> > configs/socfpga_cyclone5_defconfig | 1 +
> > configs/socfpga_is1_defconfig | 1 +
> > configs/socfpga_sockit_defconfig | 1 +
> > configs/socfpga_socrates_defconfig | 1 +
> > configs/socfpga_sr1500_defconfig | 1 +
> > configs/socfpga_vining_fpga_defconfig | 1 +
> > 6 files changed, 6 insertions(+)
> >
> > diff --git a/configs/socfpga_cyclone5_defconfig
> > b/configs/socfpga_cyclone5_defconfig
> > index 6ebd8a9..aa535c6 100644
> > --- a/configs/socfpga_cyclone5_defconfig
> > +++ b/configs/socfpga_cyclone5_defconfig
> > @@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
> > CONFIG_MMC_DW=y
> > CONFIG_SPI_FLASH=y
> > CONFIG_SPI_FLASH_BAR=y
> > +CONFIG_SPI_FLASH_MACRONIX=y
> > CONFIG_SPI_FLASH_SPANSION=y
> > CONFIG_SPI_FLASH_STMICRO=y
> > # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> > diff --git a/configs/socfpga_is1_defconfig
> > b/configs/socfpga_is1_defconfig
> > index 08628ab..7be720a 100644
> > --- a/configs/socfpga_is1_defconfig
> > +++ b/configs/socfpga_is1_defconfig
> > @@ -48,6 +48,7 @@ CONFIG_SYS_I2C_DW=y
> > # CONFIG_MMC is not set
> > CONFIG_SPI_FLASH=y
> > CONFIG_SPI_FLASH_BAR=y
> > +CONFIG_SPI_FLASH_MACRONIX=y
> > CONFIG_SPI_FLASH_STMICRO=y
> > CONFIG_PHY_MICREL=y
> > CONFIG_PHY_MICREL_KSZ90X1=y
> > diff --git a/configs/socfpga_sockit_defconfig
> > b/configs/socfpga_sockit_defconfig
> > index 8ebe394..6edb47f 100644
> > --- a/configs/socfpga_sockit_defconfig
> > +++ b/configs/socfpga_sockit_defconfig
> > @@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
> > CONFIG_MMC_DW=y
> > CONFIG_SPI_FLASH=y
> > CONFIG_SPI_FLASH_BAR=y
> > +CONFIG_SPI_FLASH_MACRONIX=y
> > CONFIG_SPI_FLASH_SPANSION=y
> > CONFIG_SPI_FLASH_STMICRO=y
> > # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> > diff --git a/configs/socfpga_socrates_defconfig
> > b/configs/socfpga_socrates_defconfig
> > index 9f42481..7c2428a 100644
> > --- a/configs/socfpga_socrates_defconfig
> > +++ b/configs/socfpga_socrates_defconfig
> > @@ -54,6 +54,7 @@ CONFIG_DM_MMC=y
> > CONFIG_MMC_DW=y
> > CONFIG_SPI_FLASH=y
> > CONFIG_SPI_FLASH_BAR=y
> > +CONFIG_SPI_FLASH_MACRONIX=y
> > CONFIG_SPI_FLASH_SPANSION=y
> > CONFIG_SPI_FLASH_STMICRO=y
> > CONFIG_PHY_MICREL=y
> > diff --git a/configs/socfpga_sr1500_defconfig
> > b/configs/socfpga_sr1500_defconfig
> > index f9ed1a3..df1ee31 100644
> > --- a/configs/socfpga_sr1500_defconfig
> > +++ b/configs/socfpga_sr1500_defconfig
> > @@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
> > CONFIG_MMC_DW=y
> > CONFIG_SPI_FLASH=y
> > CONFIG_SPI_FLASH_BAR=y
> > +CONFIG_SPI_FLASH_MACRONIX=y
> > CONFIG_SPI_FLASH_STMICRO=y
> > # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> > CONFIG_DM_ETH=y
> > diff --git a/configs/socfpga_vining_fpga_defconfig
> > b/configs/socfpga_vining_fpga_defconfig
> > index 6670b9f..512d701 100644
> > --- a/configs/socfpga_vining_fpga_defconfig
> > +++ b/configs/socfpga_vining_fpga_defconfig
> > @@ -69,6 +69,7 @@ CONFIG_LED_STATUS_CMD=y
> > CONFIG_DM_MMC=y
> > CONFIG_MMC_DW=y
> > CONFIG_SPI_FLASH=y
> > +CONFIG_SPI_FLASH_MACRONIX=y
> > CONFIG_SPI_FLASH_SPANSION=y
> > CONFIG_SPI_FLASH_STMICRO=y
> > # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> >
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support
2018-02-22 6:29 ` See, Chin Liang
@ 2018-02-22 7:58 ` Simon Goldschmidt
2018-02-22 10:45 ` Marek Vasut
1 sibling, 0 replies; 7+ messages in thread
From: Simon Goldschmidt @ 2018-02-22 7:58 UTC (permalink / raw)
To: u-boot
On 22.02.2018 07:29, See, Chin Liang wrote:
> On Wed, 2018-02-21 at 20:23 +0100, Marek Vasut wrote:
>> On 02/21/2018 08:39 AM, chin.liang.see at intel.com wrote:
>>> From: Chin Liang See <chin.liang.see@intel.com>
>>>
>>> Enable Macronix flash support for Cyclone5 SoC
>> Do these boards actually have a macronix flash ? Most of the ones I
>> know
>> of do not.
> Good question.
>
> Actually they are pin compatible and customer can replace the existing
> one. FYI, there seems a NOR flash shortage worldwide which lead to
> requests by customer to change the BOM list.
But at least the Socrates seems to be out of production. I don't see why
we would have to change the defconfig here.
Simon
>
> Thanks
> Chin Liang
>
>>> Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
>>> ---
>>> configs/socfpga_cyclone5_defconfig | 1 +
>>> configs/socfpga_is1_defconfig | 1 +
>>> configs/socfpga_sockit_defconfig | 1 +
>>> configs/socfpga_socrates_defconfig | 1 +
>>> configs/socfpga_sr1500_defconfig | 1 +
>>> configs/socfpga_vining_fpga_defconfig | 1 +
>>> 6 files changed, 6 insertions(+)
>>>
>>> diff --git a/configs/socfpga_cyclone5_defconfig
>>> b/configs/socfpga_cyclone5_defconfig
>>> index 6ebd8a9..aa535c6 100644
>>> --- a/configs/socfpga_cyclone5_defconfig
>>> +++ b/configs/socfpga_cyclone5_defconfig
>>> @@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
>>> CONFIG_MMC_DW=y
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_BAR=y
>>> +CONFIG_SPI_FLASH_MACRONIX=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_SPI_FLASH_STMICRO=y
>>> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
>>> diff --git a/configs/socfpga_is1_defconfig
>>> b/configs/socfpga_is1_defconfig
>>> index 08628ab..7be720a 100644
>>> --- a/configs/socfpga_is1_defconfig
>>> +++ b/configs/socfpga_is1_defconfig
>>> @@ -48,6 +48,7 @@ CONFIG_SYS_I2C_DW=y
>>> # CONFIG_MMC is not set
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_BAR=y
>>> +CONFIG_SPI_FLASH_MACRONIX=y
>>> CONFIG_SPI_FLASH_STMICRO=y
>>> CONFIG_PHY_MICREL=y
>>> CONFIG_PHY_MICREL_KSZ90X1=y
>>> diff --git a/configs/socfpga_sockit_defconfig
>>> b/configs/socfpga_sockit_defconfig
>>> index 8ebe394..6edb47f 100644
>>> --- a/configs/socfpga_sockit_defconfig
>>> +++ b/configs/socfpga_sockit_defconfig
>>> @@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
>>> CONFIG_MMC_DW=y
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_BAR=y
>>> +CONFIG_SPI_FLASH_MACRONIX=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_SPI_FLASH_STMICRO=y
>>> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
>>> diff --git a/configs/socfpga_socrates_defconfig
>>> b/configs/socfpga_socrates_defconfig
>>> index 9f42481..7c2428a 100644
>>> --- a/configs/socfpga_socrates_defconfig
>>> +++ b/configs/socfpga_socrates_defconfig
>>> @@ -54,6 +54,7 @@ CONFIG_DM_MMC=y
>>> CONFIG_MMC_DW=y
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_BAR=y
>>> +CONFIG_SPI_FLASH_MACRONIX=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_SPI_FLASH_STMICRO=y
>>> CONFIG_PHY_MICREL=y
>>> diff --git a/configs/socfpga_sr1500_defconfig
>>> b/configs/socfpga_sr1500_defconfig
>>> index f9ed1a3..df1ee31 100644
>>> --- a/configs/socfpga_sr1500_defconfig
>>> +++ b/configs/socfpga_sr1500_defconfig
>>> @@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
>>> CONFIG_MMC_DW=y
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_BAR=y
>>> +CONFIG_SPI_FLASH_MACRONIX=y
>>> CONFIG_SPI_FLASH_STMICRO=y
>>> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
>>> CONFIG_DM_ETH=y
>>> diff --git a/configs/socfpga_vining_fpga_defconfig
>>> b/configs/socfpga_vining_fpga_defconfig
>>> index 6670b9f..512d701 100644
>>> --- a/configs/socfpga_vining_fpga_defconfig
>>> +++ b/configs/socfpga_vining_fpga_defconfig
>>> @@ -69,6 +69,7 @@ CONFIG_LED_STATUS_CMD=y
>>> CONFIG_DM_MMC=y
>>> CONFIG_MMC_DW=y
>>> CONFIG_SPI_FLASH=y
>>> +CONFIG_SPI_FLASH_MACRONIX=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_SPI_FLASH_STMICRO=y
>>> # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
>>>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support
2018-02-22 6:29 ` See, Chin Liang
2018-02-22 7:58 ` Simon Goldschmidt
@ 2018-02-22 10:45 ` Marek Vasut
2018-02-22 13:39 ` See, Chin Liang
1 sibling, 1 reply; 7+ messages in thread
From: Marek Vasut @ 2018-02-22 10:45 UTC (permalink / raw)
To: u-boot
On 02/22/2018 07:29 AM, See, Chin Liang wrote:
> On Wed, 2018-02-21 at 20:23 +0100, Marek Vasut wrote:
>> On 02/21/2018 08:39 AM, chin.liang.see at intel.com wrote:
>>>
>>> From: Chin Liang See <chin.liang.see@intel.com>
>>>
>>> Enable Macronix flash support for Cyclone5 SoC
>> Do these boards actually have a macronix flash ? Most of the ones I
>> know
>> of do not.
>
> Good question.Â
>
> Actually they are pin compatible and customer can replace the existing
> one. FYI, there seems a NOR flash shortage worldwide which lead to
> requests by customer to change the BOM list.
I'm quite sure better half of those boards won't . If you want to enable
the SPI NORs on the devkits, fine, but the is1, sr1500 and vining are
unlikely to get a replacement memory type.
[...]
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support
2018-02-22 10:45 ` Marek Vasut
@ 2018-02-22 13:39 ` See, Chin Liang
2018-02-22 14:23 ` Marek Vasut
0 siblings, 1 reply; 7+ messages in thread
From: See, Chin Liang @ 2018-02-22 13:39 UTC (permalink / raw)
To: u-boot
On Thu, 2018-02-22 at 11:45 +0100, Marek Vasut wrote:
> On 02/22/2018 07:29 AM, See, Chin Liang wrote:
> >
> > On Wed, 2018-02-21 at 20:23 +0100, Marek Vasut wrote:
> > >
> > > On 02/21/2018 08:39 AM, chin.liang.see at intel.com wrote:
> > > >
> > > >
> > > > From: Chin Liang See <chin.liang.see@intel.com>
> > > >
> > > > Enable Macronix flash support for Cyclone5 SoC
> > > Do these boards actually have a macronix flash ? Most of the ones
> > > I
> > > know
> > > of do not.
> > Good question.Â
> >
> > Actually they are pin compatible and customer can replace the
> > existing
> > one. FYI, there seems a NOR flash shortage worldwide which lead to
> > requests by customer to change the BOM list.
> I'm quite sure better half of those boards won't . If you want to
> enable
> the SPI NORs on the devkits, fine, but the is1, sr1500 and vining are
> unlikely to get a replacement memory type.
Actually the way the code works is detecting JEDEC ID and associate it
with correct flash drivers like Micron, Spansion or Macronix. Hence it
would not yield any issue except slightly larger code. But I can take
out sr1500 and vining if it yield a concern.
Thanks
Chin Liang
>
> [...]
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support
2018-02-22 13:39 ` See, Chin Liang
@ 2018-02-22 14:23 ` Marek Vasut
0 siblings, 0 replies; 7+ messages in thread
From: Marek Vasut @ 2018-02-22 14:23 UTC (permalink / raw)
To: u-boot
On 02/22/2018 02:39 PM, See, Chin Liang wrote:
> On Thu, 2018-02-22 at 11:45 +0100, Marek Vasut wrote:
>> On 02/22/2018 07:29 AM, See, Chin Liang wrote:
>>>
>>> On Wed, 2018-02-21 at 20:23 +0100, Marek Vasut wrote:
>>>>
>>>> On 02/21/2018 08:39 AM, chin.liang.see at intel.com wrote:
>>>>>
>>>>>
>>>>> From: Chin Liang See <chin.liang.see@intel.com>
>>>>>
>>>>> Enable Macronix flash support for Cyclone5 SoC
>>>> Do these boards actually have a macronix flash ? Most of the ones
>>>> I
>>>> know
>>>> of do not.
>>> Good question.Â
>>>
>>> Actually they are pin compatible and customer can replace the
>>> existing
>>> one. FYI, there seems a NOR flash shortage worldwide which lead to
>>> requests by customer to change the BOM list.
>> I'm quite sure better half of those boards won't . If you want to
>> enable
>> the SPI NORs on the devkits, fine, but the is1, sr1500 and vining are
>> unlikely to get a replacement memory type.
>
> Actually the way the code works is detecting JEDEC ID and associate it
> with correct flash drivers like Micron, Spansion or Macronix. Hence it
> would not yield any issue except slightly larger code.
Which on those boards I listed is useless dead code.
> But I can take
> out sr1500 and vining if it yield a concern.
IS1 too.
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2018-02-22 14:23 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-21 7:39 [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support chin.liang.see at intel.com
2018-02-21 19:23 ` Marek Vasut
2018-02-22 6:29 ` See, Chin Liang
2018-02-22 7:58 ` Simon Goldschmidt
2018-02-22 10:45 ` Marek Vasut
2018-02-22 13:39 ` See, Chin Liang
2018-02-22 14:23 ` Marek Vasut
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