From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53D43C3A5A2 for ; Tue, 10 Sep 2019 06:21:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2916921928 for ; Tue, 10 Sep 2019 06:21:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=amazon.com header.i=@amazon.com header.b="uR30FecK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2406445AbfIJGVc (ORCPT ); Tue, 10 Sep 2019 02:21:32 -0400 Received: from smtp-fw-2101.amazon.com ([72.21.196.25]:24318 "EHLO smtp-fw-2101.amazon.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725916AbfIJGV2 (ORCPT ); Tue, 10 Sep 2019 02:21:28 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1568096488; x=1599632488; h=subject:to:cc:references:from:message-id:date: mime-version:in-reply-to:content-transfer-encoding; bh=P2cS529XUmulKfRe/UANSM/dlb33mBmMJiHTNnM+zWE=; b=uR30FecKBi3b6JpiTLonlq8ol9c47cxJNNnPKm+81uJwY139oSzKn6Bq 4qJFZww/tIRjUD4vT/Pi+BNV2MUO+MHB3vy+V7XQzY/wPoOmNdOswjuFu pdV/x54NMVMDofKkvBLeshixKlzk/5eTmnXjIP9rZipz9oyycG4oEFp7l k=; X-IronPort-AV: E=Sophos;i="5.64,487,1559520000"; d="scan'208";a="749910613" Received: from iad6-co-svc-p1-lb1-vlan2.amazon.com (HELO email-inbound-relay-1a-7d76a15f.us-east-1.amazon.com) ([10.124.125.2]) by smtp-border-fw-out-2101.iad2.amazon.com with ESMTP; 10 Sep 2019 06:21:25 +0000 Received: from EX13MTAUEA001.ant.amazon.com (iad55-ws-svc-p15-lb9-vlan2.iad.amazon.com [10.40.159.162]) by email-inbound-relay-1a-7d76a15f.us-east-1.amazon.com (Postfix) with ESMTPS id 95BD1A0742; Tue, 10 Sep 2019 06:21:19 +0000 (UTC) Received: from EX13D01EUB001.ant.amazon.com (10.43.166.194) by EX13MTAUEA001.ant.amazon.com (10.43.61.243) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Tue, 10 Sep 2019 06:21:18 +0000 Received: from [10.125.238.52] (10.43.161.176) by EX13D01EUB001.ant.amazon.com (10.43.166.194) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Tue, 10 Sep 2019 06:21:07 +0000 Subject: Re: [PATCH 2/3] soc: amazon: al-pos: Introduce Amazon's Annapurna Labs POS driver To: Arnd Bergmann CC: Rob Herring , Mark Rutland , Mauro Carvalho Chehab , David Miller , gregkh , Nicolas Ferre , Thomas Gleixner , "Patrick Venture" , Linus Walleij , "Olof Johansson" , Maxime Ripard , "Santosh Shilimkar" , , , Catalin Marinas , "Will Deacon" , DTML , "linux-kernel@vger.kernel.org" , Linux ARM , David Woodhouse , Benjamin Herrenschmidt , , , , , References: <1568020220-7758-1-git-send-email-talel@amazon.com> <1568020220-7758-3-git-send-email-talel@amazon.com> <98f0028e-5653-3116-fdaa-1385ecdf0289@amazon.com> <8f7840c3-a682-04a5-18bf-ac7a723725b0@amazon.com> From: "Shenhar, Talel" Message-ID: Date: Tue, 10 Sep 2019 09:21:01 +0300 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-Originating-IP: [10.43.161.176] X-ClientProxiedBy: EX13D31UWC002.ant.amazon.com (10.43.162.220) To EX13D01EUB001.ant.amazon.com (10.43.166.194) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 9/9/2019 6:16 PM, Arnd Bergmann wrote: > On Mon, Sep 9, 2019 at 4:11 PM Shenhar, Talel wrote: >> On 9/9/2019 4:41 PM, Arnd Bergmann wrote: >> >> In current implementation of v1, I am not doing any read barrier, Hence, >> using the non-relaxed will add unneeded memory barrier. >> >> I have no strong objection moving to the non-relaxed version and have an >> unneeded memory barrier, as this path is not "hot" one. > Ok, then please add it. ok, shall be part of v2 > >> Beside of avoiding the unneeded memory barrier, I would be happy to keep >> common behavior for our drivers: >> >> e.g. >> >> https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-al-fic.c#L49 >> >> >> So what do you think we should go with? relaxed or non-relaxed? > The al_fic_set_trigger() function is clearly a slow-path and should use the > non-relaxed functions. In case of al_fic_irq_handler(), the extra barrier > might introduce a measurable overhead, but at the same time I'm > not sure if that one is correct without the barrier: > > If you have an MSI-type interrupt for notifying a device driver of > a DMA completion, there might not be any other barrier between > the arrival of the MSI message and the CPU accessing the data. > Depending on how strict the hardware implements MSI and how > the IRQ is chained, this could lead to data corruption. > > If the interrupt is only used for level or edge triggered interrupts, > this is ok since you already need another register read in > the driver before it can safely access a DMA buffer. > > In either case, if you can prove that it's safe to use the relaxed > version here and you think that it may help, it would be good to > add a comment explaining the reasoning. Decided to go with the non-relaxed version as this is not hot path and likely be more clear to the common reader to have non relaxed version. > > Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Shenhar, Talel" Subject: Re: [PATCH 2/3] soc: amazon: al-pos: Introduce Amazon's Annapurna Labs POS driver Date: Tue, 10 Sep 2019 09:21:01 +0300 Message-ID: References: <1568020220-7758-1-git-send-email-talel@amazon.com> <1568020220-7758-3-git-send-email-talel@amazon.com> <98f0028e-5653-3116-fdaa-1385ecdf0289@amazon.com> <8f7840c3-a682-04a5-18bf-ac7a723725b0@amazon.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Arnd Bergmann Cc: Rob Herring , Mark Rutland , Mauro Carvalho Chehab , David Miller , gregkh , Nicolas Ferre , Thomas Gleixner , Patrick Venture , Linus Walleij , Olof Johansson , Maxime Ripard , Santosh Shilimkar , paul.kocialkowski@bootlin.com, mjourdan@baylibre.com, Catalin Marinas , Will Deacon , DTML , "linux-kernel@vger.kernel.org" , Linux ARM Dav List-Id: devicetree@vger.kernel.org On 9/9/2019 6:16 PM, Arnd Bergmann wrote: > On Mon, Sep 9, 2019 at 4:11 PM Shenhar, Talel wrote: >> On 9/9/2019 4:41 PM, Arnd Bergmann wrote: >> >> In current implementation of v1, I am not doing any read barrier, Hence, >> using the non-relaxed will add unneeded memory barrier. >> >> I have no strong objection moving to the non-relaxed version and have an >> unneeded memory barrier, as this path is not "hot" one. > Ok, then please add it. ok, shall be part of v2 > >> Beside of avoiding the unneeded memory barrier, I would be happy to keep >> common behavior for our drivers: >> >> e.g. >> >> https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-al-fic.c#L49 >> >> >> So what do you think we should go with? relaxed or non-relaxed? > The al_fic_set_trigger() function is clearly a slow-path and should use the > non-relaxed functions. In case of al_fic_irq_handler(), the extra barrier > might introduce a measurable overhead, but at the same time I'm > not sure if that one is correct without the barrier: > > If you have an MSI-type interrupt for notifying a device driver of > a DMA completion, there might not be any other barrier between > the arrival of the MSI message and the CPU accessing the data. > Depending on how strict the hardware implements MSI and how > the IRQ is chained, this could lead to data corruption. > > If the interrupt is only used for level or edge triggered interrupts, > this is ok since you already need another register read in > the driver before it can safely access a DMA buffer. > > In either case, if you can prove that it's safe to use the relaxed > version here and you think that it may help, it would be good to > add a comment explaining the reasoning. Decided to go with the non-relaxed version as this is not hot path and likely be more clear to the common reader to have non relaxed version. > > Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_ADSP_ALL, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A03A9C3A5A2 for ; Tue, 10 Sep 2019 06:22:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 720082089F for ; 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Tue, 10 Sep 2019 06:21:07 +0000 Subject: Re: [PATCH 2/3] soc: amazon: al-pos: Introduce Amazon's Annapurna Labs POS driver To: Arnd Bergmann References: <1568020220-7758-1-git-send-email-talel@amazon.com> <1568020220-7758-3-git-send-email-talel@amazon.com> <98f0028e-5653-3116-fdaa-1385ecdf0289@amazon.com> <8f7840c3-a682-04a5-18bf-ac7a723725b0@amazon.com> From: "Shenhar, Talel" Message-ID: Date: Tue, 10 Sep 2019 09:21:01 +0300 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-Originating-IP: [10.43.161.176] X-ClientProxiedBy: EX13D31UWC002.ant.amazon.com (10.43.162.220) To EX13D01EUB001.ant.amazon.com (10.43.166.194) Precedence: Bulk X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190909_232129_204157_E8C978AC X-CRM114-Status: GOOD ( 21.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , mjourdan@baylibre.com, Catalin Marinas , Linus Walleij , "linux-kernel@vger.kernel.org" , jonnyc@amazon.com, Mauro Carvalho Chehab , ronenk@amazon.com, Will Deacon , Benjamin Herrenschmidt , DTML , Maxime Ripard , Rob Herring , Santosh Shilimkar , Thomas Gleixner , hanochu@amazon.com, Linux ARM , barakw@amazon.com, hhhawa@amazon.com, gregkh , paul.kocialkowski@bootlin.com, Patrick Venture , Olof Johansson , David Miller , David Woodhouse Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/9/2019 6:16 PM, Arnd Bergmann wrote: > On Mon, Sep 9, 2019 at 4:11 PM Shenhar, Talel wrote: >> On 9/9/2019 4:41 PM, Arnd Bergmann wrote: >> >> In current implementation of v1, I am not doing any read barrier, Hence, >> using the non-relaxed will add unneeded memory barrier. >> >> I have no strong objection moving to the non-relaxed version and have an >> unneeded memory barrier, as this path is not "hot" one. > Ok, then please add it. ok, shall be part of v2 > >> Beside of avoiding the unneeded memory barrier, I would be happy to keep >> common behavior for our drivers: >> >> e.g. >> >> https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-al-fic.c#L49 >> >> >> So what do you think we should go with? relaxed or non-relaxed? > The al_fic_set_trigger() function is clearly a slow-path and should use the > non-relaxed functions. In case of al_fic_irq_handler(), the extra barrier > might introduce a measurable overhead, but at the same time I'm > not sure if that one is correct without the barrier: > > If you have an MSI-type interrupt for notifying a device driver of > a DMA completion, there might not be any other barrier between > the arrival of the MSI message and the CPU accessing the data. > Depending on how strict the hardware implements MSI and how > the IRQ is chained, this could lead to data corruption. > > If the interrupt is only used for level or edge triggered interrupts, > this is ok since you already need another register read in > the driver before it can safely access a DMA buffer. > > In either case, if you can prove that it's safe to use the relaxed > version here and you think that it may help, it would be good to > add a comment explaining the reasoning. Decided to go with the non-relaxed version as this is not hot path and likely be more clear to the common reader to have non relaxed version. > > Arnd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel