From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF9D3C3DA7D for ; Tue, 3 Jan 2023 21:28:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234280AbjACV2p (ORCPT ); Tue, 3 Jan 2023 16:28:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233894AbjACV2n (ORCPT ); Tue, 3 Jan 2023 16:28:43 -0500 Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 430B51274B; Tue, 3 Jan 2023 13:28:41 -0800 (PST) Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailout.nyi.internal (Postfix) with ESMTP id AB5955C010A; Tue, 3 Jan 2023 16:28:40 -0500 (EST) Received: from imap51 ([10.202.2.101]) by compute6.internal (MEProxy); Tue, 03 Jan 2023 16:28:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arndb.de; h=cc :cc:content-type:date:date:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to; s=fm2; t=1672781320; x=1672867720; bh=yNCwZ6Th6X npsgpDnxdC5Wteq3Enf3afecAlxpz1Yf0=; b=RT3jcKWDrIdGX0GMBXlzEaJXZo t7WlxKzq6ISMii12Gw1Qgc3yw8AtUuj/Y7W8CH2UZcNBIqOpaaaa3FF7o5wWjf7v W/0cFDOQEzBC0TTVAMb3vPe6r2oM/JceBHauEqwON+EMplFJKDTXx8cItFH36s76 cLGUmuBMIVn4VkGmiBZvnxMX+lkB05BKdaEtS3m2pLRWPeTNUDkDpezww9LQvO0S yDU0tUPjx8bvNWYbkbsMUwcEDUqltHHfT2T5HDZF0Eow6917hMhqQnl8gDAfc7fG LMnZcCAvIxI0wK7fOMuUCZ/OF0UeFStMonJ+95w2fo7Ue5RqKlKhuRnw8PNw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-type:date:date:feedback-id :feedback-id:from:from:in-reply-to:in-reply-to:message-id :mime-version:references:reply-to:sender:subject:subject:to:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; t=1672781320; x=1672867720; bh=yNCwZ6Th6XnpsgpDnxdC5Wteq3En f3afecAlxpz1Yf0=; b=UYLDHjxb4WaTHgRLWiMAmf4ywTasuzhf9H9wzMvnKxZp IgksybaORA3FFMXapDEEhKCznDRLY5Sd/H6liz6G5N82nlk2QnIzZCzNBvGIFWRV 45T4WaOnIYE0qVJOA3+60FNJchWtsUjdv93cDB+zqUaF7MAii11/5E82xI2DPTCl UXxdYAJbYtzuvOsEZ4qFPcMGmkqxx1s7kaJAZK/inMqTt4preDDRYxv1uGas36ru mYXwrjIrfxPm5jpk8prqohSSWczwMEoFMfpa9191QOJaD2l92h4xAny1fcgjd7yE IYw8DwbJcLurc8S/uFSdKf/xe+4snfiaMtAnfIKjqQ== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrjeeggddugeelucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhepofgfggfkjghffffhvfevufgtsehttdertderredtnecuhfhrohhmpedftehr nhguuceuvghrghhmrghnnhdfuceorghrnhgusegrrhhnuggsrdguvgeqnecuggftrfgrth htvghrnhepffehueegteeihfegtefhjefgtdeugfegjeelheejueethfefgeeghfektdek teffnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomheprg hrnhgusegrrhhnuggsrdguvg X-ME-Proxy: Feedback-ID: i56a14606:Fastmail Received: by mailuser.nyi.internal (Postfix, from userid 501) id CB431B60086; Tue, 3 Jan 2023 16:28:39 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.7.0-alpha0-1185-g841157300a-fm-20221208.002-g84115730 Mime-Version: 1.0 Message-Id: In-Reply-To: <20230103210400.3500626-10-conor@kernel.org> References: <20230103210400.3500626-10-conor@kernel.org> Date: Tue, 03 Jan 2023 22:28:19 +0100 From: "Arnd Bergmann" To: "Conor Dooley" , "Palmer Dabbelt" , Prabhakar Cc: "Conor.Dooley" , "Andrew Jones" , "Albert Ou" , "Anup Patel" , "Atish Patra" , "Biju Das" , devicetree@vger.kernel.org, "Geert Uytterhoeven" , guoren , "Christoph Hellwig" , =?UTF-8?Q?Heiko_St=C3=BCbner?= , "Jisheng Zhang" , krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org, Linux-Renesas , linux-riscv@lists.infradead.org, "Magnus Damm" , "Nathan Chancellor" , "Paul Walmsley" , "Philipp Tomsich" , "Lad, Prabhakar" , "Rob Herring" , "Samuel Holland" , soc@kernel.org, "Daire McNamara" Subject: Re: [RFC v5.1 9/9] [DON'T APPLY] cache: sifive-ccache: add cache flushing capability Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 3, 2023, at 22:04, Conor Dooley wrote: > From: Daire McNamara > > SiFive L2 cache controller can flush L2 cache. Expose this capability via > driver. > > Signed-off-by: Daire McNamara > [Conor: rebase on top of move to cache subsystem] > Signed-off-by: Conor Dooley > --- > This commit needs more work, and a way to enable it from errata. I've > not gone and done this as PolarFire SoC has archid etc all set to zero. > So we need to go figure out a workaround for this, before adding in > errata enabling code for this. I've included it here as a second user of > the cache management stuff, since what's currently upstream for the > ccache driver does not do any cache management. > --- > drivers/cache/sifive_ccache.c | 45 +++++++++++++++++++++++++++++++++++ > 1 file changed, 45 insertions(+) My feeling here is that the cacheflush code is unrelated to the EDAC code and it should just be a separate file. From what I can tell, all of the existing contents of this file can simply get merged into drivers/edac/sifive_edac.c, with the newly added code becoming a standalone driver. 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Tue, 3 Jan 2023 16:28:39 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.7.0-alpha0-1185-g841157300a-fm-20221208.002-g84115730 Mime-Version: 1.0 Message-Id: In-Reply-To: <20230103210400.3500626-10-conor@kernel.org> References: <20230103210400.3500626-10-conor@kernel.org> Date: Tue, 03 Jan 2023 22:28:19 +0100 From: "Arnd Bergmann" To: "Conor Dooley" , "Palmer Dabbelt" , Prabhakar Cc: "Conor.Dooley" , "Andrew Jones" , "Albert Ou" , "Anup Patel" , "Atish Patra" , "Biju Das" , devicetree@vger.kernel.org, "Geert Uytterhoeven" , guoren , "Christoph Hellwig" , =?UTF-8?Q?Heiko_St=C3=BCbner?= , "Jisheng Zhang" , krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org, Linux-Renesas , linux-riscv@lists.infradead.org, "Magnus Damm" , "Nathan Chancellor" , "Paul Walmsley" , "Philipp Tomsich" , "Lad, Prabhakar" , "Rob Herring" , "Samuel Holland" , soc@kernel.org, "Daire McNamara" Subject: Re: [RFC v5.1 9/9] [DON'T APPLY] cache: sifive-ccache: add cache flushing capability X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230103_132841_954556_6AEA0B77 X-CRM114-Status: GOOD ( 16.96 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Jan 3, 2023, at 22:04, Conor Dooley wrote: > From: Daire McNamara > > SiFive L2 cache controller can flush L2 cache. Expose this capability via > driver. > > Signed-off-by: Daire McNamara > [Conor: rebase on top of move to cache subsystem] > Signed-off-by: Conor Dooley > --- > This commit needs more work, and a way to enable it from errata. I've > not gone and done this as PolarFire SoC has archid etc all set to zero. > So we need to go figure out a workaround for this, before adding in > errata enabling code for this. I've included it here as a second user of > the cache management stuff, since what's currently upstream for the > ccache driver does not do any cache management. > --- > drivers/cache/sifive_ccache.c | 45 +++++++++++++++++++++++++++++++++++ > 1 file changed, 45 insertions(+) My feeling here is that the cacheflush code is unrelated to the EDAC code and it should just be a separate file. From what I can tell, all of the existing contents of this file can simply get merged into drivers/edac/sifive_edac.c, with the newly added code becoming a standalone driver. Arnd _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv