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From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2] spi: ich: Configure SPI BIOS parameters
Date: Wed, 8 Feb 2017 17:44:17 +0100	[thread overview]
Message-ID: <b5810b21-cf3b-7bb5-2978-4490d4c67e71@denx.de> (raw)
In-Reply-To: <CAEUhbmUEWHYUON9asC7We3N=myMCGTMvYzfWQn4wVpVEs8kGXw@mail.gmail.com>

Hi Bin,

On 04.02.2017 06:57, Bin Meng wrote:
> On Mon, Jan 23, 2017 at 10:55 PM, Stefan Roese <sr@denx.de> wrote:
>> Without configuring these registers in the SPI controller, the Linux
>> MTD device driver is not able to correctly read/write to the SPI
>> NOR chip at all. In fact, the chip is not detected at all.
>>
>> Signed-off-by: Stefan Roese <sr@denx.de>
>> Cc: Bin Meng <bmeng.cn@gmail.com>
>> Cc: Simon Glass <sjg@chromium.org>
>> Cc: Jagan Teki <jteki@openedev.com>
>> ---
>> v2:
>> - Moved code into the ICH SPI driver as suggested by Simon and Bin
>>
>>  drivers/spi/ich.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 51 insertions(+)
>>
>> diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
>> index caf0103dc3..586b4e9024 100644
>> --- a/drivers/spi/ich.c
>> +++ b/drivers/spi/ich.c
>> @@ -18,6 +18,39 @@
>>
>>  #include "ich.h"
>>
>> +#define SPI_OPMENU_0 0x01 /* WRSR: Write Status Register */
>> +#define SPI_OPTYPE_0 0x01 /* Write, no address */
>> +
>> +#define SPI_OPMENU_1 0x02 /* BYPR: Byte Program */
>> +#define SPI_OPTYPE_1 0x03 /* Write, address required */
>> +
>> +#define SPI_OPMENU_2 0x03 /* READ: Read Data */
>> +#define SPI_OPTYPE_2 0x02 /* Read, address required */
>> +
>> +#define SPI_OPMENU_3 0x05 /* RDSR: Read Status Register */
>> +#define SPI_OPTYPE_3 0x00 /* Read, no address */
>> +
>> +#define SPI_OPMENU_4 0x20 /* SE20: Sector Erase 0x20 */
>> +#define SPI_OPTYPE_4 0x03 /* Write, address required */
>> +
>> +#define SPI_OPMENU_5 0x9f /* RDID: Read ID */
>> +#define SPI_OPTYPE_5 0x00 /* Read, no address */
>> +
>> +#define SPI_OPMENU_6 0xd8 /* BED8: Block Erase 0xd8 */
>> +#define SPI_OPTYPE_6 0x03 /* Write, address required */
>> +
>> +#define SPI_OPMENU_7 0x0b /* FAST: Fast Read */
>> +#define SPI_OPTYPE_7 0x02 /* Read, address required */
>> +
>
> nits: can we move these defines to ich.h?

Sure, no problem.

> In ich.h, I see such macros are defined using enum,

You are referring to these here?

enum {
	SPI_OPCODE_TYPE_READ_NO_ADDRESS =	0,
	SPI_OPCODE_TYPE_WRITE_NO_ADDRESS =	1,
	SPI_OPCODE_TYPE_READ_WITH_ADDRESS =	2,
	SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS =	3
};

> not sure the
> coding standard here, but I guess we may either follow the enum
> defines, or use a new patch to convert enum to #defines...

I personally prefer #defines in such cases. So if nobody objects,
I can send a patch to move those enums to defines.

Thanks,
Stefan

  reply	other threads:[~2017-02-08 16:44 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-20 14:26 [U-Boot] [PATCH] x86: baytrail: Configure SPI BIOS parameters Stefan Roese
2017-01-21  3:52 ` Simon Glass
2017-01-23  8:37   ` Bin Meng
2017-01-23 14:55 ` [U-Boot] [PATCH v2] spi: ich: " Stefan Roese
2017-02-04  5:57   ` Bin Meng
2017-02-08 16:44     ` Stefan Roese [this message]
2017-02-09  3:46       ` Bin Meng

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