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From: Steven Price <steven.price@arm.com>
To: Nicolas Boichat <drinkcat@chromium.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Tomeu Vizoso <tomeu.vizoso@collabora.com>,
	David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, Liam Girdwood <lgirdwood@gmail.com>,
	dri-devel@lists.freedesktop.org, Mark Brown <broonie@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>,
	hsinyi@chromium.org, Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 5/7] drm/panfrost: Add support for multiple power domain support
Date: Thu, 9 Jan 2020 14:08:48 +0000	[thread overview]
Message-ID: <b58a8cf9-3275-cf89-6dff-596aceeb8000@arm.com> (raw)
In-Reply-To: <20200108052337.65916-6-drinkcat@chromium.org>

On 08/01/2020 05:23, Nicolas Boichat wrote:
> When there is a single power domain per device, the core will
> ensure the power domains are all switched on.
> 
> However, when there are multiple ones, as in MT8183 Bifrost GPU,
> we need to handle them in driver code.
> 
> 
> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> ---
> 
> The downstream driver we use on chromeos-4.19 currently uses 2
> additional devices in device tree to accomodate for this [1], but
> I believe this solution is cleaner.

I'm not sure what is best, but it seems odd to encode this into the Panfrost driver itself - it doesn't have any knowledge of what to do with these power domains. The naming of the domains looks suspiciously like someone thought that e.g. only half of the cores could be powered, but it doesn't look like that was implemented in the chromeos driver linked and anyway that is *meant* to be automatic in the hardware! (I.e. if you only power up one cores in one core stack then the PDC should only enable the power domain for that set of cores).

Steve

> 
> [1] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/refs/heads/chromeos-4.19/drivers/gpu/arm/midgard/platform/mediatek/mali_kbase_runtime_pm.c#31
> 
> drivers/gpu/drm/panfrost/panfrost_device.c | 87 ++++++++++++++++++++--
>   drivers/gpu/drm/panfrost/panfrost_device.h |  4 +
>   2 files changed, 83 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> index a0b0a6fef8b4e63..c6e9e059de94a4d 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> @@ -5,6 +5,7 @@
>   #include <linux/clk.h>
>   #include <linux/reset.h>
>   #include <linux/platform_device.h>
> +#include <linux/pm_domain.h>
>   #include <linux/regulator/consumer.h>
>   
>   #include "panfrost_device.h"
> @@ -131,6 +132,67 @@ static void panfrost_regulator_fini(struct panfrost_device *pfdev)
>   	regulator_disable(pfdev->regulator_sram);
>   }
>   
> +static void panfrost_pm_domain_fini(struct panfrost_device *pfdev)
> +{
> +	int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(pfdev->pm_domain_devs); i++) {
> +		if (!pfdev->pm_domain_devs[i])
> +			break;
> +
> +		if (pfdev->pm_domain_links[i])
> +			device_link_del(pfdev->pm_domain_links[i]);
> +
> +		dev_pm_domain_detach(pfdev->pm_domain_devs[i], true);
> +	}
> +}
> +
> +static int panfrost_pm_domain_init(struct panfrost_device *pfdev)
> +{
> +	int err;
> +	int i, num_domains;
> +
> +	num_domains = of_count_phandle_with_args(pfdev->dev->of_node,
> +						 "power-domains",
> +						 "#power-domain-cells");
> +	/* Single domains are handled by the core. */
> +	if (num_domains < 2)
> +		return 0;
> +
> +	if (num_domains > ARRAY_SIZE(pfdev->pm_domain_devs)) {
> +		dev_err(pfdev->dev, "Too many pm-domains: %d\n", num_domains);
> +		return -EINVAL;
> +	}
> +
> +	for (i = 0; i < num_domains; i++) {
> +		pfdev->pm_domain_devs[i] =
> +			dev_pm_domain_attach_by_id(pfdev->dev, i);
> +		if (IS_ERR(pfdev->pm_domain_devs[i])) {
> +			err = PTR_ERR(pfdev->pm_domain_devs[i]);
> +			pfdev->pm_domain_devs[i] = NULL;
> +			dev_err(pfdev->dev,
> +				"failed to get pm-domain %d: %d\n", i, err);
> +			goto err;
> +		}
> +
> +		pfdev->pm_domain_links[i] = device_link_add(pfdev->dev,
> +				pfdev->pm_domain_devs[i], DL_FLAG_PM_RUNTIME |
> +				DL_FLAG_STATELESS | DL_FLAG_RPM_ACTIVE);
> +		if (!pfdev->pm_domain_links[i]) {
> +			dev_err(pfdev->pm_domain_devs[i],
> +				"adding device link failed!\n");
> +			err = -ENODEV;
> +			goto err;
> +		}
> +	}
> +
> +	return 0;
> +
> +err:
> +	panfrost_pm_domain_fini(pfdev);
> +	return err;
> +}
> +
>   int panfrost_device_init(struct panfrost_device *pfdev)
>   {
>   	int err;
> @@ -161,37 +223,45 @@ int panfrost_device_init(struct panfrost_device *pfdev)
>   		goto err_out1;
>   	}
>   
> +	err = panfrost_pm_domain_init(pfdev);
> +	if (err) {
> +		dev_err(pfdev->dev, "pm_domain init failed %d\n", err);
> +		goto err_out2;
> +	}
> +
>   	res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0);
>   	pfdev->iomem = devm_ioremap_resource(pfdev->dev, res);
>   	if (IS_ERR(pfdev->iomem)) {
>   		dev_err(pfdev->dev, "failed to ioremap iomem\n");
>   		err = PTR_ERR(pfdev->iomem);
> -		goto err_out2;
> +		goto err_out3;
>   	}
>   
>   	err = panfrost_gpu_init(pfdev);
>   	if (err)
> -		goto err_out2;
> +		goto err_out3;
>   
>   	err = panfrost_mmu_init(pfdev);
>   	if (err)
> -		goto err_out3;
> +		goto err_out4;
>   
>   	err = panfrost_job_init(pfdev);
>   	if (err)
> -		goto err_out4;
> +		goto err_out5;
>   
>   	err = panfrost_perfcnt_init(pfdev);
>   	if (err)
> -		goto err_out5;
> +		goto err_out6;
>   
>   	return 0;
> -err_out5:
> +err_out6:
>   	panfrost_job_fini(pfdev);
> -err_out4:
> +err_out5:
>   	panfrost_mmu_fini(pfdev);
> -err_out3:
> +err_out4:
>   	panfrost_gpu_fini(pfdev);
> +err_out3:
> +	panfrost_pm_domain_fini(pfdev);
>   err_out2:
>   	panfrost_reset_fini(pfdev);
>   err_out1:
> @@ -208,6 +278,7 @@ void panfrost_device_fini(struct panfrost_device *pfdev)
>   	panfrost_mmu_fini(pfdev);
>   	panfrost_gpu_fini(pfdev);
>   	panfrost_reset_fini(pfdev);
> +	panfrost_pm_domain_fini(pfdev);
>   	panfrost_regulator_fini(pfdev);
>   	panfrost_clk_fini(pfdev);
>   }
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
> index a124334d69e7e93..92d471676fc7823 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.h
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.h
> @@ -19,6 +19,7 @@ struct panfrost_job;
>   struct panfrost_perfcnt;
>   
>   #define NUM_JOB_SLOTS 3
> +#define MAX_PM_DOMAINS 3
>   
>   struct panfrost_features {
>   	u16 id;
> @@ -62,6 +63,9 @@ struct panfrost_device {
>   	struct regulator *regulator;
>   	struct regulator *regulator_sram;
>   	struct reset_control *rstc;
> +	/* pm_domains for devices with more than one. */
> +	struct device *pm_domain_devs[MAX_PM_DOMAINS];
> +	struct device_link *pm_domain_links[MAX_PM_DOMAINS];
>   
>   	struct panfrost_features features;
>   
> 


WARNING: multiple messages have this Message-ID (diff)
From: Steven Price <steven.price@arm.com>
To: Nicolas Boichat <drinkcat@chromium.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Tomeu Vizoso <tomeu.vizoso@collabora.com>,
	David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>,
	hsinyi@chromium.org, Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 5/7] drm/panfrost: Add support for multiple power domain support
Date: Thu, 9 Jan 2020 14:08:48 +0000	[thread overview]
Message-ID: <b58a8cf9-3275-cf89-6dff-596aceeb8000@arm.com> (raw)
In-Reply-To: <20200108052337.65916-6-drinkcat@chromium.org>

On 08/01/2020 05:23, Nicolas Boichat wrote:
> When there is a single power domain per device, the core will
> ensure the power domains are all switched on.
> 
> However, when there are multiple ones, as in MT8183 Bifrost GPU,
> we need to handle them in driver code.
> 
> 
> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> ---
> 
> The downstream driver we use on chromeos-4.19 currently uses 2
> additional devices in device tree to accomodate for this [1], but
> I believe this solution is cleaner.

I'm not sure what is best, but it seems odd to encode this into the Panfrost driver itself - it doesn't have any knowledge of what to do with these power domains. The naming of the domains looks suspiciously like someone thought that e.g. only half of the cores could be powered, but it doesn't look like that was implemented in the chromeos driver linked and anyway that is *meant* to be automatic in the hardware! (I.e. if you only power up one cores in one core stack then the PDC should only enable the power domain for that set of cores).

Steve

> 
> [1] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/refs/heads/chromeos-4.19/drivers/gpu/arm/midgard/platform/mediatek/mali_kbase_runtime_pm.c#31
> 
> drivers/gpu/drm/panfrost/panfrost_device.c | 87 ++++++++++++++++++++--
>   drivers/gpu/drm/panfrost/panfrost_device.h |  4 +
>   2 files changed, 83 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> index a0b0a6fef8b4e63..c6e9e059de94a4d 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> @@ -5,6 +5,7 @@
>   #include <linux/clk.h>
>   #include <linux/reset.h>
>   #include <linux/platform_device.h>
> +#include <linux/pm_domain.h>
>   #include <linux/regulator/consumer.h>
>   
>   #include "panfrost_device.h"
> @@ -131,6 +132,67 @@ static void panfrost_regulator_fini(struct panfrost_device *pfdev)
>   	regulator_disable(pfdev->regulator_sram);
>   }
>   
> +static void panfrost_pm_domain_fini(struct panfrost_device *pfdev)
> +{
> +	int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(pfdev->pm_domain_devs); i++) {
> +		if (!pfdev->pm_domain_devs[i])
> +			break;
> +
> +		if (pfdev->pm_domain_links[i])
> +			device_link_del(pfdev->pm_domain_links[i]);
> +
> +		dev_pm_domain_detach(pfdev->pm_domain_devs[i], true);
> +	}
> +}
> +
> +static int panfrost_pm_domain_init(struct panfrost_device *pfdev)
> +{
> +	int err;
> +	int i, num_domains;
> +
> +	num_domains = of_count_phandle_with_args(pfdev->dev->of_node,
> +						 "power-domains",
> +						 "#power-domain-cells");
> +	/* Single domains are handled by the core. */
> +	if (num_domains < 2)
> +		return 0;
> +
> +	if (num_domains > ARRAY_SIZE(pfdev->pm_domain_devs)) {
> +		dev_err(pfdev->dev, "Too many pm-domains: %d\n", num_domains);
> +		return -EINVAL;
> +	}
> +
> +	for (i = 0; i < num_domains; i++) {
> +		pfdev->pm_domain_devs[i] =
> +			dev_pm_domain_attach_by_id(pfdev->dev, i);
> +		if (IS_ERR(pfdev->pm_domain_devs[i])) {
> +			err = PTR_ERR(pfdev->pm_domain_devs[i]);
> +			pfdev->pm_domain_devs[i] = NULL;
> +			dev_err(pfdev->dev,
> +				"failed to get pm-domain %d: %d\n", i, err);
> +			goto err;
> +		}
> +
> +		pfdev->pm_domain_links[i] = device_link_add(pfdev->dev,
> +				pfdev->pm_domain_devs[i], DL_FLAG_PM_RUNTIME |
> +				DL_FLAG_STATELESS | DL_FLAG_RPM_ACTIVE);
> +		if (!pfdev->pm_domain_links[i]) {
> +			dev_err(pfdev->pm_domain_devs[i],
> +				"adding device link failed!\n");
> +			err = -ENODEV;
> +			goto err;
> +		}
> +	}
> +
> +	return 0;
> +
> +err:
> +	panfrost_pm_domain_fini(pfdev);
> +	return err;
> +}
> +
>   int panfrost_device_init(struct panfrost_device *pfdev)
>   {
>   	int err;
> @@ -161,37 +223,45 @@ int panfrost_device_init(struct panfrost_device *pfdev)
>   		goto err_out1;
>   	}
>   
> +	err = panfrost_pm_domain_init(pfdev);
> +	if (err) {
> +		dev_err(pfdev->dev, "pm_domain init failed %d\n", err);
> +		goto err_out2;
> +	}
> +
>   	res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0);
>   	pfdev->iomem = devm_ioremap_resource(pfdev->dev, res);
>   	if (IS_ERR(pfdev->iomem)) {
>   		dev_err(pfdev->dev, "failed to ioremap iomem\n");
>   		err = PTR_ERR(pfdev->iomem);
> -		goto err_out2;
> +		goto err_out3;
>   	}
>   
>   	err = panfrost_gpu_init(pfdev);
>   	if (err)
> -		goto err_out2;
> +		goto err_out3;
>   
>   	err = panfrost_mmu_init(pfdev);
>   	if (err)
> -		goto err_out3;
> +		goto err_out4;
>   
>   	err = panfrost_job_init(pfdev);
>   	if (err)
> -		goto err_out4;
> +		goto err_out5;
>   
>   	err = panfrost_perfcnt_init(pfdev);
>   	if (err)
> -		goto err_out5;
> +		goto err_out6;
>   
>   	return 0;
> -err_out5:
> +err_out6:
>   	panfrost_job_fini(pfdev);
> -err_out4:
> +err_out5:
>   	panfrost_mmu_fini(pfdev);
> -err_out3:
> +err_out4:
>   	panfrost_gpu_fini(pfdev);
> +err_out3:
> +	panfrost_pm_domain_fini(pfdev);
>   err_out2:
>   	panfrost_reset_fini(pfdev);
>   err_out1:
> @@ -208,6 +278,7 @@ void panfrost_device_fini(struct panfrost_device *pfdev)
>   	panfrost_mmu_fini(pfdev);
>   	panfrost_gpu_fini(pfdev);
>   	panfrost_reset_fini(pfdev);
> +	panfrost_pm_domain_fini(pfdev);
>   	panfrost_regulator_fini(pfdev);
>   	panfrost_clk_fini(pfdev);
>   }
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
> index a124334d69e7e93..92d471676fc7823 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.h
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.h
> @@ -19,6 +19,7 @@ struct panfrost_job;
>   struct panfrost_perfcnt;
>   
>   #define NUM_JOB_SLOTS 3
> +#define MAX_PM_DOMAINS 3
>   
>   struct panfrost_features {
>   	u16 id;
> @@ -62,6 +63,9 @@ struct panfrost_device {
>   	struct regulator *regulator;
>   	struct regulator *regulator_sram;
>   	struct reset_control *rstc;
> +	/* pm_domains for devices with more than one. */
> +	struct device *pm_domain_devs[MAX_PM_DOMAINS];
> +	struct device_link *pm_domain_links[MAX_PM_DOMAINS];
>   
>   	struct panfrost_features features;
>   
> 


_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Steven Price <steven.price@arm.com>
To: Nicolas Boichat <drinkcat@chromium.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Tomeu Vizoso <tomeu.vizoso@collabora.com>,
	David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>,
	hsinyi@chromium.org, Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 5/7] drm/panfrost: Add support for multiple power domain support
Date: Thu, 9 Jan 2020 14:08:48 +0000	[thread overview]
Message-ID: <b58a8cf9-3275-cf89-6dff-596aceeb8000@arm.com> (raw)
In-Reply-To: <20200108052337.65916-6-drinkcat@chromium.org>

On 08/01/2020 05:23, Nicolas Boichat wrote:
> When there is a single power domain per device, the core will
> ensure the power domains are all switched on.
> 
> However, when there are multiple ones, as in MT8183 Bifrost GPU,
> we need to handle them in driver code.
> 
> 
> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> ---
> 
> The downstream driver we use on chromeos-4.19 currently uses 2
> additional devices in device tree to accomodate for this [1], but
> I believe this solution is cleaner.

I'm not sure what is best, but it seems odd to encode this into the Panfrost driver itself - it doesn't have any knowledge of what to do with these power domains. The naming of the domains looks suspiciously like someone thought that e.g. only half of the cores could be powered, but it doesn't look like that was implemented in the chromeos driver linked and anyway that is *meant* to be automatic in the hardware! (I.e. if you only power up one cores in one core stack then the PDC should only enable the power domain for that set of cores).

Steve

> 
> [1] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/refs/heads/chromeos-4.19/drivers/gpu/arm/midgard/platform/mediatek/mali_kbase_runtime_pm.c#31
> 
> drivers/gpu/drm/panfrost/panfrost_device.c | 87 ++++++++++++++++++++--
>   drivers/gpu/drm/panfrost/panfrost_device.h |  4 +
>   2 files changed, 83 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> index a0b0a6fef8b4e63..c6e9e059de94a4d 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> @@ -5,6 +5,7 @@
>   #include <linux/clk.h>
>   #include <linux/reset.h>
>   #include <linux/platform_device.h>
> +#include <linux/pm_domain.h>
>   #include <linux/regulator/consumer.h>
>   
>   #include "panfrost_device.h"
> @@ -131,6 +132,67 @@ static void panfrost_regulator_fini(struct panfrost_device *pfdev)
>   	regulator_disable(pfdev->regulator_sram);
>   }
>   
> +static void panfrost_pm_domain_fini(struct panfrost_device *pfdev)
> +{
> +	int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(pfdev->pm_domain_devs); i++) {
> +		if (!pfdev->pm_domain_devs[i])
> +			break;
> +
> +		if (pfdev->pm_domain_links[i])
> +			device_link_del(pfdev->pm_domain_links[i]);
> +
> +		dev_pm_domain_detach(pfdev->pm_domain_devs[i], true);
> +	}
> +}
> +
> +static int panfrost_pm_domain_init(struct panfrost_device *pfdev)
> +{
> +	int err;
> +	int i, num_domains;
> +
> +	num_domains = of_count_phandle_with_args(pfdev->dev->of_node,
> +						 "power-domains",
> +						 "#power-domain-cells");
> +	/* Single domains are handled by the core. */
> +	if (num_domains < 2)
> +		return 0;
> +
> +	if (num_domains > ARRAY_SIZE(pfdev->pm_domain_devs)) {
> +		dev_err(pfdev->dev, "Too many pm-domains: %d\n", num_domains);
> +		return -EINVAL;
> +	}
> +
> +	for (i = 0; i < num_domains; i++) {
> +		pfdev->pm_domain_devs[i] =
> +			dev_pm_domain_attach_by_id(pfdev->dev, i);
> +		if (IS_ERR(pfdev->pm_domain_devs[i])) {
> +			err = PTR_ERR(pfdev->pm_domain_devs[i]);
> +			pfdev->pm_domain_devs[i] = NULL;
> +			dev_err(pfdev->dev,
> +				"failed to get pm-domain %d: %d\n", i, err);
> +			goto err;
> +		}
> +
> +		pfdev->pm_domain_links[i] = device_link_add(pfdev->dev,
> +				pfdev->pm_domain_devs[i], DL_FLAG_PM_RUNTIME |
> +				DL_FLAG_STATELESS | DL_FLAG_RPM_ACTIVE);
> +		if (!pfdev->pm_domain_links[i]) {
> +			dev_err(pfdev->pm_domain_devs[i],
> +				"adding device link failed!\n");
> +			err = -ENODEV;
> +			goto err;
> +		}
> +	}
> +
> +	return 0;
> +
> +err:
> +	panfrost_pm_domain_fini(pfdev);
> +	return err;
> +}
> +
>   int panfrost_device_init(struct panfrost_device *pfdev)
>   {
>   	int err;
> @@ -161,37 +223,45 @@ int panfrost_device_init(struct panfrost_device *pfdev)
>   		goto err_out1;
>   	}
>   
> +	err = panfrost_pm_domain_init(pfdev);
> +	if (err) {
> +		dev_err(pfdev->dev, "pm_domain init failed %d\n", err);
> +		goto err_out2;
> +	}
> +
>   	res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0);
>   	pfdev->iomem = devm_ioremap_resource(pfdev->dev, res);
>   	if (IS_ERR(pfdev->iomem)) {
>   		dev_err(pfdev->dev, "failed to ioremap iomem\n");
>   		err = PTR_ERR(pfdev->iomem);
> -		goto err_out2;
> +		goto err_out3;
>   	}
>   
>   	err = panfrost_gpu_init(pfdev);
>   	if (err)
> -		goto err_out2;
> +		goto err_out3;
>   
>   	err = panfrost_mmu_init(pfdev);
>   	if (err)
> -		goto err_out3;
> +		goto err_out4;
>   
>   	err = panfrost_job_init(pfdev);
>   	if (err)
> -		goto err_out4;
> +		goto err_out5;
>   
>   	err = panfrost_perfcnt_init(pfdev);
>   	if (err)
> -		goto err_out5;
> +		goto err_out6;
>   
>   	return 0;
> -err_out5:
> +err_out6:
>   	panfrost_job_fini(pfdev);
> -err_out4:
> +err_out5:
>   	panfrost_mmu_fini(pfdev);
> -err_out3:
> +err_out4:
>   	panfrost_gpu_fini(pfdev);
> +err_out3:
> +	panfrost_pm_domain_fini(pfdev);
>   err_out2:
>   	panfrost_reset_fini(pfdev);
>   err_out1:
> @@ -208,6 +278,7 @@ void panfrost_device_fini(struct panfrost_device *pfdev)
>   	panfrost_mmu_fini(pfdev);
>   	panfrost_gpu_fini(pfdev);
>   	panfrost_reset_fini(pfdev);
> +	panfrost_pm_domain_fini(pfdev);
>   	panfrost_regulator_fini(pfdev);
>   	panfrost_clk_fini(pfdev);
>   }
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
> index a124334d69e7e93..92d471676fc7823 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.h
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.h
> @@ -19,6 +19,7 @@ struct panfrost_job;
>   struct panfrost_perfcnt;
>   
>   #define NUM_JOB_SLOTS 3
> +#define MAX_PM_DOMAINS 3
>   
>   struct panfrost_features {
>   	u16 id;
> @@ -62,6 +63,9 @@ struct panfrost_device {
>   	struct regulator *regulator;
>   	struct regulator *regulator_sram;
>   	struct reset_control *rstc;
> +	/* pm_domains for devices with more than one. */
> +	struct device *pm_domain_devs[MAX_PM_DOMAINS];
> +	struct device_link *pm_domain_links[MAX_PM_DOMAINS];
>   
>   	struct panfrost_features features;
>   
> 


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Steven Price <steven.price@arm.com>
To: Nicolas Boichat <drinkcat@chromium.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Tomeu Vizoso <tomeu.vizoso@collabora.com>,
	David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>,
	hsinyi@chromium.org, Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 5/7] drm/panfrost: Add support for multiple power domain support
Date: Thu, 9 Jan 2020 14:08:48 +0000	[thread overview]
Message-ID: <b58a8cf9-3275-cf89-6dff-596aceeb8000@arm.com> (raw)
In-Reply-To: <20200108052337.65916-6-drinkcat@chromium.org>

On 08/01/2020 05:23, Nicolas Boichat wrote:
> When there is a single power domain per device, the core will
> ensure the power domains are all switched on.
> 
> However, when there are multiple ones, as in MT8183 Bifrost GPU,
> we need to handle them in driver code.
> 
> 
> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> ---
> 
> The downstream driver we use on chromeos-4.19 currently uses 2
> additional devices in device tree to accomodate for this [1], but
> I believe this solution is cleaner.

I'm not sure what is best, but it seems odd to encode this into the Panfrost driver itself - it doesn't have any knowledge of what to do with these power domains. The naming of the domains looks suspiciously like someone thought that e.g. only half of the cores could be powered, but it doesn't look like that was implemented in the chromeos driver linked and anyway that is *meant* to be automatic in the hardware! (I.e. if you only power up one cores in one core stack then the PDC should only enable the power domain for that set of cores).

Steve

> 
> [1] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/refs/heads/chromeos-4.19/drivers/gpu/arm/midgard/platform/mediatek/mali_kbase_runtime_pm.c#31
> 
> drivers/gpu/drm/panfrost/panfrost_device.c | 87 ++++++++++++++++++++--
>   drivers/gpu/drm/panfrost/panfrost_device.h |  4 +
>   2 files changed, 83 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> index a0b0a6fef8b4e63..c6e9e059de94a4d 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> @@ -5,6 +5,7 @@
>   #include <linux/clk.h>
>   #include <linux/reset.h>
>   #include <linux/platform_device.h>
> +#include <linux/pm_domain.h>
>   #include <linux/regulator/consumer.h>
>   
>   #include "panfrost_device.h"
> @@ -131,6 +132,67 @@ static void panfrost_regulator_fini(struct panfrost_device *pfdev)
>   	regulator_disable(pfdev->regulator_sram);
>   }
>   
> +static void panfrost_pm_domain_fini(struct panfrost_device *pfdev)
> +{
> +	int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(pfdev->pm_domain_devs); i++) {
> +		if (!pfdev->pm_domain_devs[i])
> +			break;
> +
> +		if (pfdev->pm_domain_links[i])
> +			device_link_del(pfdev->pm_domain_links[i]);
> +
> +		dev_pm_domain_detach(pfdev->pm_domain_devs[i], true);
> +	}
> +}
> +
> +static int panfrost_pm_domain_init(struct panfrost_device *pfdev)
> +{
> +	int err;
> +	int i, num_domains;
> +
> +	num_domains = of_count_phandle_with_args(pfdev->dev->of_node,
> +						 "power-domains",
> +						 "#power-domain-cells");
> +	/* Single domains are handled by the core. */
> +	if (num_domains < 2)
> +		return 0;
> +
> +	if (num_domains > ARRAY_SIZE(pfdev->pm_domain_devs)) {
> +		dev_err(pfdev->dev, "Too many pm-domains: %d\n", num_domains);
> +		return -EINVAL;
> +	}
> +
> +	for (i = 0; i < num_domains; i++) {
> +		pfdev->pm_domain_devs[i] =
> +			dev_pm_domain_attach_by_id(pfdev->dev, i);
> +		if (IS_ERR(pfdev->pm_domain_devs[i])) {
> +			err = PTR_ERR(pfdev->pm_domain_devs[i]);
> +			pfdev->pm_domain_devs[i] = NULL;
> +			dev_err(pfdev->dev,
> +				"failed to get pm-domain %d: %d\n", i, err);
> +			goto err;
> +		}
> +
> +		pfdev->pm_domain_links[i] = device_link_add(pfdev->dev,
> +				pfdev->pm_domain_devs[i], DL_FLAG_PM_RUNTIME |
> +				DL_FLAG_STATELESS | DL_FLAG_RPM_ACTIVE);
> +		if (!pfdev->pm_domain_links[i]) {
> +			dev_err(pfdev->pm_domain_devs[i],
> +				"adding device link failed!\n");
> +			err = -ENODEV;
> +			goto err;
> +		}
> +	}
> +
> +	return 0;
> +
> +err:
> +	panfrost_pm_domain_fini(pfdev);
> +	return err;
> +}
> +
>   int panfrost_device_init(struct panfrost_device *pfdev)
>   {
>   	int err;
> @@ -161,37 +223,45 @@ int panfrost_device_init(struct panfrost_device *pfdev)
>   		goto err_out1;
>   	}
>   
> +	err = panfrost_pm_domain_init(pfdev);
> +	if (err) {
> +		dev_err(pfdev->dev, "pm_domain init failed %d\n", err);
> +		goto err_out2;
> +	}
> +
>   	res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0);
>   	pfdev->iomem = devm_ioremap_resource(pfdev->dev, res);
>   	if (IS_ERR(pfdev->iomem)) {
>   		dev_err(pfdev->dev, "failed to ioremap iomem\n");
>   		err = PTR_ERR(pfdev->iomem);
> -		goto err_out2;
> +		goto err_out3;
>   	}
>   
>   	err = panfrost_gpu_init(pfdev);
>   	if (err)
> -		goto err_out2;
> +		goto err_out3;
>   
>   	err = panfrost_mmu_init(pfdev);
>   	if (err)
> -		goto err_out3;
> +		goto err_out4;
>   
>   	err = panfrost_job_init(pfdev);
>   	if (err)
> -		goto err_out4;
> +		goto err_out5;
>   
>   	err = panfrost_perfcnt_init(pfdev);
>   	if (err)
> -		goto err_out5;
> +		goto err_out6;
>   
>   	return 0;
> -err_out5:
> +err_out6:
>   	panfrost_job_fini(pfdev);
> -err_out4:
> +err_out5:
>   	panfrost_mmu_fini(pfdev);
> -err_out3:
> +err_out4:
>   	panfrost_gpu_fini(pfdev);
> +err_out3:
> +	panfrost_pm_domain_fini(pfdev);
>   err_out2:
>   	panfrost_reset_fini(pfdev);
>   err_out1:
> @@ -208,6 +278,7 @@ void panfrost_device_fini(struct panfrost_device *pfdev)
>   	panfrost_mmu_fini(pfdev);
>   	panfrost_gpu_fini(pfdev);
>   	panfrost_reset_fini(pfdev);
> +	panfrost_pm_domain_fini(pfdev);
>   	panfrost_regulator_fini(pfdev);
>   	panfrost_clk_fini(pfdev);
>   }
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
> index a124334d69e7e93..92d471676fc7823 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.h
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.h
> @@ -19,6 +19,7 @@ struct panfrost_job;
>   struct panfrost_perfcnt;
>   
>   #define NUM_JOB_SLOTS 3
> +#define MAX_PM_DOMAINS 3
>   
>   struct panfrost_features {
>   	u16 id;
> @@ -62,6 +63,9 @@ struct panfrost_device {
>   	struct regulator *regulator;
>   	struct regulator *regulator_sram;
>   	struct reset_control *rstc;
> +	/* pm_domains for devices with more than one. */
> +	struct device *pm_domain_devs[MAX_PM_DOMAINS];
> +	struct device_link *pm_domain_links[MAX_PM_DOMAINS];
>   
>   	struct panfrost_features features;
>   
> 

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  reply	other threads:[~2020-01-09 14:08 UTC|newest]

Thread overview: 128+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-08  5:23 [PATCH v2 0/7] Add dts for mt8183 GPU (and misc panfrost patches) Nicolas Boichat
2020-01-08  5:23 ` Nicolas Boichat
2020-01-08  5:23 ` Nicolas Boichat
2020-01-08  5:23 ` Nicolas Boichat
2020-01-08  5:23 ` [PATCH v2 1/7] dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183 Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23 ` [PATCH v2 2/7] arm64: dts: mt8183: Add node for the Mali GPU Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23 ` [PATCH v2 3/7] drm/panfrost: Improve error reporting in panfrost_gpu_power_on Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-09 12:03   ` Steven Price
2020-01-09 12:03     ` Steven Price
2020-01-09 12:03     ` Steven Price
2020-01-09 12:03     ` Steven Price
2020-01-08  5:23 ` [PATCH v2 4/7] drm/panfrost: Add support for a second regulator for the GPU Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08 13:23   ` Mark Brown
2020-01-08 13:23     ` Mark Brown
2020-01-08 13:23     ` Mark Brown
2020-01-08 13:23     ` Mark Brown
2020-01-08 22:52     ` Nicolas Boichat
2020-01-08 22:52       ` Nicolas Boichat
2020-01-08 22:52       ` Nicolas Boichat
2020-01-08 22:52       ` Nicolas Boichat
2020-01-09 14:14       ` Steven Price
2020-01-09 14:14         ` Steven Price
2020-01-09 14:14         ` Steven Price
2020-01-09 14:14         ` Steven Price
2020-01-09 16:28         ` Mark Brown
2020-01-09 16:28           ` Mark Brown
2020-01-09 16:28           ` Mark Brown
2020-01-09 16:28           ` Mark Brown
2020-01-09 16:53           ` Steven Price
2020-01-09 16:53             ` Steven Price
2020-01-09 16:53             ` Steven Price
2020-01-09 16:53             ` Steven Price
2020-01-09 19:49             ` Mark Brown
2020-01-09 19:49               ` Mark Brown
2020-01-09 19:49               ` Mark Brown
2020-01-09 19:49               ` Mark Brown
2020-01-10 11:30               ` Steven Price
2020-01-10 11:30                 ` Steven Price
2020-01-10 11:30                 ` Steven Price
2020-01-10 11:30                 ` Steven Price
2020-01-14  7:21                 ` Nicolas Boichat
2020-01-14  7:21                   ` Nicolas Boichat
2020-01-14  7:21                   ` Nicolas Boichat
2020-01-14  7:21                   ` Nicolas Boichat
2020-01-09 16:56       ` Rob Herring
2020-01-09 16:56         ` Rob Herring
2020-01-09 16:56         ` Rob Herring
2020-01-09 16:56         ` Rob Herring
2020-01-10 11:39         ` Steven Price
2020-01-10 11:39           ` Steven Price
2020-01-10 11:39           ` Steven Price
2020-01-10 11:39           ` Steven Price
2020-01-08  5:23 ` [PATCH v2 5/7] drm/panfrost: Add support for multiple power domain support Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-09 14:08   ` Steven Price [this message]
2020-01-09 14:08     ` Steven Price
2020-01-09 14:08     ` Steven Price
2020-01-09 14:08     ` Steven Price
2020-01-10  1:53     ` Nicolas Boichat
2020-01-10  1:53       ` Nicolas Boichat
2020-01-10  1:53       ` Nicolas Boichat
2020-01-10  1:53       ` Nicolas Boichat
2020-01-27  7:55       ` Ulf Hansson
2020-01-27  7:55         ` Ulf Hansson
2020-01-27  7:55         ` Ulf Hansson
2020-01-27  7:55         ` Ulf Hansson
2020-02-07  2:04         ` Nicolas Boichat
2020-02-07  2:04           ` Nicolas Boichat
2020-02-07  2:04           ` Nicolas Boichat
2020-02-07  2:04           ` Nicolas Boichat
2020-02-07  2:04           ` Nicolas Boichat
2020-02-07  2:04             ` Nicolas Boichat
2020-02-07  2:04             ` Nicolas Boichat
2020-02-07  2:04             ` Nicolas Boichat
2020-01-08  5:23 ` [PATCH v2 6/7, RFC] drm/panfrost: Add bifrost compatible string Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-09 14:11   ` Steven Price
2020-01-09 14:11     ` Steven Price
2020-01-09 14:11     ` Steven Price
2020-01-09 14:11     ` Steven Price
2020-01-08  5:23 ` [PATCH v2 7/7, RFC]: drm/panfrost: devfreq: Add support for 2 regulators Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08  5:23   ` Nicolas Boichat
2020-01-08 20:09   ` Rob Herring
2020-01-08 20:09     ` Rob Herring
2020-01-08 20:09     ` Rob Herring
2020-01-08 20:09     ` Rob Herring
2020-01-08 22:44     ` Nicolas Boichat
2020-01-08 22:44       ` Nicolas Boichat
2020-01-08 22:44       ` Nicolas Boichat
2020-01-08 22:44       ` Nicolas Boichat
2020-01-08 12:56 ` [PATCH v2 0/7] Add dts for mt8183 GPU (and misc panfrost patches) Alyssa Rosenzweig
2020-01-08 12:56   ` Alyssa Rosenzweig
2020-01-08 12:56   ` Alyssa Rosenzweig
2020-01-08 12:56   ` Alyssa Rosenzweig
2020-01-09  9:08 ` Nicolas Boichat
2020-01-09  9:08   ` Nicolas Boichat
2020-01-09  9:08   ` Nicolas Boichat
2020-01-09  9:08   ` Nicolas Boichat
2020-01-09 12:01 ` Steven Price
2020-01-09 12:01   ` Steven Price
2020-01-09 12:01   ` Steven Price
2020-01-09 12:01   ` Steven Price
2020-01-09 13:10   ` Robin Murphy
2020-01-09 13:10     ` Robin Murphy
2020-01-09 13:10     ` Robin Murphy
2020-01-09 13:10     ` Robin Murphy
2020-01-09 13:29     ` Steven Price
2020-01-09 13:29       ` Steven Price
2020-01-09 13:29       ` Steven Price
2020-01-09 13:29       ` Steven Price

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