From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH 1/2] target/hppa: Use tcg_constant_*
Date: Fri, 9 Jul 2021 09:08:06 +0200 [thread overview]
Message-ID: <b5f660c2-7e93-2442-34ed-f2673781a053@amsat.org> (raw)
In-Reply-To: <20210708205807.827147-2-richard.henderson@linaro.org>
On 7/8/21 10:58 PM, Richard Henderson wrote:
> Replace uses of tcg_const_* with the allocate and free
> close together.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/hppa/translate.c | 56 +++++++++++++----------------------------
> 1 file changed, 18 insertions(+), 38 deletions(-)
>
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index 64af1e0d5c..d17568880f 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -2971,9 +2956,8 @@ static bool trans_ldc(DisasContext *ctx, arg_ldst *a)
> */
> gen_helper_ldc_check(addr);
>
> - zero = tcg_const_reg(0);
> + zero = tcg_constant_reg(0);
> tcg_gen_atomic_xchg_reg(dest, addr, zero, ctx->mmu_idx, mop);
> - tcg_temp_free(zero);
>
> if (a->m) {
> save_gpr(ctx, a->b, ofs);
What about this one?
@@ -3385,7 +3385,7 @@ static bool do_depw_sar(DisasContext *ct
/* Convert big-endian bit numbering in SAR to left-shift. */
tcg_gen_xori_reg(shift, cpu_sar, TARGET_REGISTER_BITS - 1);
- mask = tcg_const_reg(msb + (msb - 1));
+ mask = tcg_constant_reg(msb + (msb - 1));
tcg_gen_and_reg(tmp, val, mask);
if (rs) {
tcg_gen_shl_reg(mask, mask, shift);
@@ -3396,7 +3396,6 @@ static bool do_depw_sar(DisasContext *ct
tcg_gen_shl_reg(dest, tmp, shift);
}
tcg_temp_free(shift);
- tcg_temp_free(mask);
tcg_temp_free(tmp);
save_gpr(ctx, rt, dest);
> @@ -3886,15 +3870,13 @@ static bool trans_fcmp_f(DisasContext *ctx, arg_fclass2 *a)
>
> ta = load_frw0_i32(a->r1);
> tb = load_frw0_i32(a->r2);
> - ty = tcg_const_i32(a->y);
> - tc = tcg_const_i32(a->c);
> + ty = tcg_constant_i32(a->y);
> + tc = tcg_constant_i32(a->c);
>
> gen_helper_fcmp_s(cpu_env, ta, tb, ty, tc);
>
> tcg_temp_free_i32(ta);
> tcg_temp_free_i32(tb);
> - tcg_temp_free_i32(ty);
> - tcg_temp_free_i32(tc);
>
> return nullify_end(ctx);
> }
next prev parent reply other threads:[~2021-07-09 7:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-08 20:58 [PATCH 0/2] target/hppa: Use tcg_constant_* Richard Henderson
2021-07-08 20:58 ` [PATCH 1/2] " Richard Henderson
2021-07-09 7:08 ` Philippe Mathieu-Daudé [this message]
2021-07-09 14:24 ` Richard Henderson
2021-07-09 16:15 ` Philippe Mathieu-Daudé
2021-07-08 20:58 ` [PATCH 2/2] target/hppa: Clean up DisasCond Richard Henderson
2021-08-04 21:01 ` Philippe Mathieu-Daudé
2021-08-04 23:33 ` Richard Henderson
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