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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id w13-20020a170906d20d00b00726298147b1sm851210ejz.161.2022.06.24.03.25.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 24 Jun 2022 03:25:46 -0700 (PDT) Message-ID: Date: Fri, 24 Jun 2022 12:25:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH v5 10/14] dt-bindings: firmware: Add fsl,scu yaml file Content-Language: en-US To: Viorel Suman , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Dmitry Torokhov , Srinivas Kandagatla , Dong Aisheng , Fabio Estevam , Shawn Guo , Stefan Agner , Pengutronix Kernel Team , Linus Walleij , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Wim Van Sebroeck , Guenter Roeck , Sascha Hauer , NXP Linux Team , Abel Vesa , Oliver Graute , Mirela Rabulea , Peng Fan , Liu Ying , Ming Qian , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Abel Vesa References: <20220616164303.790379-1-viorel.suman@nxp.com> <20220616164303.790379-11-viorel.suman@nxp.com> From: Krzysztof Kozlowski In-Reply-To: <20220616164303.790379-11-viorel.suman@nxp.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On 16/06/2022 18:42, Viorel Suman wrote: > From: Abel Vesa > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch adds the > fsl,scu.yaml in the firmware bindings folder. This one is only for > the main SCU node. The old txt file will be removed only after all > the child nodes have been properly switch to yaml. > > Signed-off-by: Abel Vesa > Signed-off-by: Viorel Suman > --- > .../devicetree/bindings/firmware/fsl,scu.yaml | 170 ++++++++++++++++++ > 1 file changed, 170 insertions(+) > create mode 100644 Documentation/devicetree/bindings/firmware/fsl,scu.yaml > > diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > new file mode 100644 > index 000000000000..a28f729bfadb > --- /dev/null > +++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > @@ -0,0 +1,170 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/firmware/fsl,scu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX System Controller Firmware (SCFW) > + > +maintainers: > + - Dong Aisheng > + > +description: System Controller Device Node > + The System Controller Firmware (SCFW) is a low-level system function > + which runs on a dedicated Cortex-M core to provide power, clock, and > + resource management. It exists on some i.MX8 processors. e.g. i.MX8QM > + (QM, QP), and i.MX8QX (QXP, DX). > + The AP communicates with the SC using a multi-ported MU module found > + in the LSIO subsystem. The current definition of this MU module provides > + 5 remote AP connections to the SC to support up to 5 execution environments > + (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces > + with the LSIO DSC IP bus. The SC firmware will communicate with this MU > + using the MSI bus. > + > +properties: > + $nodename: > + const: 'scu' Why enforcing node name? Second point is that node names should be generic, so I wonder what "SCU" exactly means and whether it is generic? > + > + compatible: > + const: fsl,imx-scu > + > + clock-controller: > + description: | > + $ref: /schemas/clock/fsl,scu-clk.yaml That's not a valid syntax. ref is not part of description > + Clock controller node that provides the clocks controlled by the SCU > + > + imx8qx-ocotp: > + description: | > + $ref: /schemas/nvmem/fsl,scu-ocotp.yaml > + OCOTP controller node provided by the SCU > + > + keys: > + description: | > + $ref: /schemas/input/fsl,scu-key.yaml > + Keys provided by the SCU > + > + mboxes: > + description: | > + $ref: /schemas/mailbox/fsl,mu.yaml > + List of phandle of 4 MU channels for tx, 4 MU channels for > + rx, and 1 optional MU channel for general interrupt. > + All MU channels must be in the same MU instance. > + Cross instances are not allowed. The MU instance can only > + be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need > + to make sure use the one which is not conflict with other > + execution environments. e.g. ATF. > + minItems: 1 > + maxItems: 10 > + > + mbox-names: > + description: > + include "gip3" if want to support general MU interrupt. > + minItems: 1 > + maxItems: 10 > + > + pinctrl: > + description: | > + $ref: /schemas/pinctrl/fsl,scu-pinctrl.yaml > + Pin controller provided by the SCU > + > + power-controller: > + description: | > + $ref: /schemas/power/fsl,scu-pd.yaml > + Power domains controller node that provides the power domains > + controlled by the SCU > + > + rtc: > + description: | > + $ref: /schemas/rtc/fsl,scu-rtc.yaml > + RTC controller provided by the SCU > + > + thermal-sensor: > + description: | > + $ref: /schemas/thermal/fsl,scu-thermal.yaml > + Thermal sensor provided by the SCU > + > + watchdog: > + description: | > + $ref: /schemas/watchdog/fsl,scu-wdt.yaml > + Watchdog controller provided by the SCU > + > +required: > + - compatible > + - mbox-names > + - mboxes > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + > + firmware { > + scu { > + compatible = "fsl,imx-scu"; > + mbox-names = "tx0", "tx1", "tx2", "tx3", > + "rx0", "rx1", "rx2", "rx3", > + "gip3"; > + mboxes = <&lsio_mu1 0 0 > + &lsio_mu1 0 1 > + &lsio_mu1 0 2 > + &lsio_mu1 0 3 > + &lsio_mu1 1 0 > + &lsio_mu1 1 1 > + &lsio_mu1 1 2 > + &lsio_mu1 1 3 > + &lsio_mu1 3 3>; > + > + clock-controller { > + compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; > + #clock-cells = <2>; > + }; > + > + pinctrl { > + compatible = "fsl,imx8qxp-iomuxc"; > + > + pinctrl_lpuart0: lpuart0grp { > + fsl,pins = < > + IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 > + IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 > + >; > + }; > + }; > + > + imx8qx-ocotp { > + compatible = "fsl,imx8qxp-scu-ocotp"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + fec_mac0: mac@2c4 { > + reg = <0x2c4 6>; > + }; > + }; > + > + power-controller { > + compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd"; > + #power-domain-cells = <1>; > + }; > + > + rtc { > + compatible = "fsl,imx8qxp-sc-rtc"; > + }; > + > + keys { > + compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key"; > + linux,keycodes = ; > + }; > + > + watchdog { > + compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; > + timeout-sec = <60>; > + }; > + > + thermal-sensor { > + compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal"; > + #thermal-sensor-cells = <1>; > + }; > + }; > + }; Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A679AC43334 for ; Fri, 24 Jun 2022 10:27:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id w13-20020a170906d20d00b00726298147b1sm851210ejz.161.2022.06.24.03.25.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 24 Jun 2022 03:25:46 -0700 (PDT) Message-ID: Date: Fri, 24 Jun 2022 12:25:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH v5 10/14] dt-bindings: firmware: Add fsl,scu yaml file Content-Language: en-US To: Viorel Suman , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Dmitry Torokhov , Srinivas Kandagatla , Dong Aisheng , Fabio Estevam , Shawn Guo , Stefan Agner , Pengutronix Kernel Team , Linus Walleij , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Wim Van Sebroeck , Guenter Roeck , Sascha Hauer , NXP Linux Team , Abel Vesa , Oliver Graute , Mirela Rabulea , Peng Fan , Liu Ying , Ming Qian , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Abel Vesa References: <20220616164303.790379-1-viorel.suman@nxp.com> <20220616164303.790379-11-viorel.suman@nxp.com> From: Krzysztof Kozlowski In-Reply-To: <20220616164303.790379-11-viorel.suman@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220624_032549_402786_97D28C4A X-CRM114-Status: GOOD ( 29.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 16/06/2022 18:42, Viorel Suman wrote: > From: Abel Vesa > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch adds the > fsl,scu.yaml in the firmware bindings folder. This one is only for > the main SCU node. The old txt file will be removed only after all > the child nodes have been properly switch to yaml. > > Signed-off-by: Abel Vesa > Signed-off-by: Viorel Suman > --- > .../devicetree/bindings/firmware/fsl,scu.yaml | 170 ++++++++++++++++++ > 1 file changed, 170 insertions(+) > create mode 100644 Documentation/devicetree/bindings/firmware/fsl,scu.yaml > > diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > new file mode 100644 > index 000000000000..a28f729bfadb > --- /dev/null > +++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > @@ -0,0 +1,170 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/firmware/fsl,scu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX System Controller Firmware (SCFW) > + > +maintainers: > + - Dong Aisheng > + > +description: System Controller Device Node > + The System Controller Firmware (SCFW) is a low-level system function > + which runs on a dedicated Cortex-M core to provide power, clock, and > + resource management. It exists on some i.MX8 processors. e.g. i.MX8QM > + (QM, QP), and i.MX8QX (QXP, DX). > + The AP communicates with the SC using a multi-ported MU module found > + in the LSIO subsystem. The current definition of this MU module provides > + 5 remote AP connections to the SC to support up to 5 execution environments > + (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces > + with the LSIO DSC IP bus. The SC firmware will communicate with this MU > + using the MSI bus. > + > +properties: > + $nodename: > + const: 'scu' Why enforcing node name? Second point is that node names should be generic, so I wonder what "SCU" exactly means and whether it is generic? > + > + compatible: > + const: fsl,imx-scu > + > + clock-controller: > + description: | > + $ref: /schemas/clock/fsl,scu-clk.yaml That's not a valid syntax. ref is not part of description > + Clock controller node that provides the clocks controlled by the SCU > + > + imx8qx-ocotp: > + description: | > + $ref: /schemas/nvmem/fsl,scu-ocotp.yaml > + OCOTP controller node provided by the SCU > + > + keys: > + description: | > + $ref: /schemas/input/fsl,scu-key.yaml > + Keys provided by the SCU > + > + mboxes: > + description: | > + $ref: /schemas/mailbox/fsl,mu.yaml > + List of phandle of 4 MU channels for tx, 4 MU channels for > + rx, and 1 optional MU channel for general interrupt. > + All MU channels must be in the same MU instance. > + Cross instances are not allowed. The MU instance can only > + be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need > + to make sure use the one which is not conflict with other > + execution environments. e.g. ATF. > + minItems: 1 > + maxItems: 10 > + > + mbox-names: > + description: > + include "gip3" if want to support general MU interrupt. > + minItems: 1 > + maxItems: 10 > + > + pinctrl: > + description: | > + $ref: /schemas/pinctrl/fsl,scu-pinctrl.yaml > + Pin controller provided by the SCU > + > + power-controller: > + description: | > + $ref: /schemas/power/fsl,scu-pd.yaml > + Power domains controller node that provides the power domains > + controlled by the SCU > + > + rtc: > + description: | > + $ref: /schemas/rtc/fsl,scu-rtc.yaml > + RTC controller provided by the SCU > + > + thermal-sensor: > + description: | > + $ref: /schemas/thermal/fsl,scu-thermal.yaml > + Thermal sensor provided by the SCU > + > + watchdog: > + description: | > + $ref: /schemas/watchdog/fsl,scu-wdt.yaml > + Watchdog controller provided by the SCU > + > +required: > + - compatible > + - mbox-names > + - mboxes > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + > + firmware { > + scu { > + compatible = "fsl,imx-scu"; > + mbox-names = "tx0", "tx1", "tx2", "tx3", > + "rx0", "rx1", "rx2", "rx3", > + "gip3"; > + mboxes = <&lsio_mu1 0 0 > + &lsio_mu1 0 1 > + &lsio_mu1 0 2 > + &lsio_mu1 0 3 > + &lsio_mu1 1 0 > + &lsio_mu1 1 1 > + &lsio_mu1 1 2 > + &lsio_mu1 1 3 > + &lsio_mu1 3 3>; > + > + clock-controller { > + compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; > + #clock-cells = <2>; > + }; > + > + pinctrl { > + compatible = "fsl,imx8qxp-iomuxc"; > + > + pinctrl_lpuart0: lpuart0grp { > + fsl,pins = < > + IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 > + IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 > + >; > + }; > + }; > + > + imx8qx-ocotp { > + compatible = "fsl,imx8qxp-scu-ocotp"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + fec_mac0: mac@2c4 { > + reg = <0x2c4 6>; > + }; > + }; > + > + power-controller { > + compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd"; > + #power-domain-cells = <1>; > + }; > + > + rtc { > + compatible = "fsl,imx8qxp-sc-rtc"; > + }; > + > + keys { > + compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key"; > + linux,keycodes = ; > + }; > + > + watchdog { > + compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; > + timeout-sec = <60>; > + }; > + > + thermal-sensor { > + compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal"; > + #thermal-sensor-cells = <1>; > + }; > + }; > + }; Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel