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From: "shenjian (K)" <shenjian15@huawei.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Wang Dongsheng <dongsheng.wang@hxt-semitech.com>,
	Andrew Lunn <andrew@lun>, David Miller <davem@davemloft.net>,
	<netdev@vger.kernel.org>,
	"Zhuangyuzeng (Yisen)" <yisen.zhuang@huawei.com>,
	Salil Mehta <salil.mehta@huawei.com>,
	"lipeng (Y)" <lipeng321@huawei.com>,
	Yunsheng Lin <linyunsheng@huawei.com>,
	Dengweiwei <dengweiwei@huawei.com>
Subject: Re: Question about default m88e1510 LED configuration of marvell phy
Date: Thu, 17 Jan 2019 10:58:07 +0800	[thread overview]
Message-ID: <b6b8a26c-56ec-b81f-a9ca-ea9a35a24b84@huawei.com> (raw)
In-Reply-To: <20190116160434.GD29244@lunn.ch>



在 2019/1/17 0:04, Andrew Lunn 写道:
>> Thanks, Andrew.
>>
>> But we are using acpi mode, is there any ohter way to poke values into registers ?
> 
> You can register a PHY fixup.
> 
> phy_register_fixup_for_uid(), mach-orion5x/dns323-setup.c
> 
>       Andrew
> 
> .
> 
Thanks Andrew!

I have tried phy_register_fixup_for_uid(), but it doesn't work .

Maybe I missed something important, phy_scan_fixups() is called before drv->config_init() in function
phy_init_hw(). So even though I configure the led ctrl register in fixup callbacks, the configuration
will be overrided by m88e1510_config_init()->m88e1318_config_init()->marvell_config_init().

test log is below:
[  105.703297] Hardware name: Huawei D06/D06, BIOS Hisilicon D06 UEFI RC0 - V1.10.01 01/03/2019
[  105.720192] Workqueue: events work_for_cpu_fn
[  105.728902] Call trace:
[  105.733782]  dump_backtrace+0x0/0x180
[  105.741099]  show_stack+0x14/0x20
[  105.747720]  dump_stack+0x90/0xb4
[  105.754342]  hclge_phy_marvell_fixup+0x14/0x90 [hclge] <-- configure the led ctrl reg to 0x1040 here
[  105.764620]  phy_scan_fixups+0x80/0x108
[  105.772285]  phy_init_hw+0x4c/0x78
[  105.779080]  phy_attach_direct+0x1cc/0x240
[  105.787267]  phy_connect_direct+0x20/0x70
[  105.795283]  hclge_mac_connect_phy+0x54/0xb0 [hclge]
[  105.805214]  hns3_client_init+0x24c/0x330 [hns3]
[  105.814448]  hclge_init_client_instance+0xcc/0x1a0 [hclge]
[  105.825423]  hnae3_match_n_instantiate+0x4c/0x110 [hnae3]
[  105.836223]  hnae3_register_ae_dev+0xd4/0x1a8 [hnae3]
[  105.846329]  hns3_probe+0x5c/0x88 [hns3]
[  105.854169]  local_pci_probe+0x3c/0xb0
[  105.861659]  work_for_cpu_fn+0x18/0x28
[  105.869151]  process_one_work+0x1e4/0x458
[  105.877165]  worker_thread+0x228/0x450
[  105.884655]  kthread+0x12c/0x130
[  105.891102]  ret_from_fork+0x10/0x18
[  105.899661] iommu: Adding device 0000:bd:00.0 to group 21
[  105.912042] hns3 0000:bd:00.0: The firmware version is b0600114
[  105.939661] hclge driver initialization finished.
estuary:/home$
estuary:/home$
estuary:/home$ ethtool -i eth2   <-- I add debug code here to print the led reg value
[  154.466599] hns3 0000:7d:00.2 eth2: phy led reg vaule: 0x1177
driver: hns3
version: 4.19.13-g1962b78-dirty SMP pree
firmware-version: 0xb0600114
expansion-rom-version:
bus-info: 0000:7d:00.2
supports-statistics: yes
supports-test: yes
supports-eeprom-access: no
supports-register-dump: yes
supports-priv-flags: no
estuary:/home$ uname -a
Linux (none) 4.19.13-g1962b78-dirty #2 SMP PREEMPT Mon Jan 14 16:28:34 HKT 2019 aarch64 GNU/Linux




  reply	other threads:[~2019-01-17  2:58 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-15  3:07 Question about default m88e1510 LED configuration of marvell phy shenjian (K)
2019-01-15  3:39 ` Andrew Lunn
2019-01-15  6:41   ` shenjian (K)
2019-01-15  9:08     ` Wang, Dongsheng
2019-01-17  3:06       ` shenjian (K)
2019-01-16 16:04     ` Andrew Lunn
2019-01-17  2:58       ` shenjian (K) [this message]
2019-01-17 12:41         ` Andrew Lunn
2019-01-17 14:57           ` shenjian (K)

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