From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9922AC433E6 for ; Sun, 7 Mar 2021 11:43:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6CB8765105 for ; Sun, 7 Mar 2021 11:43:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230344AbhCGLmu (ORCPT ); Sun, 7 Mar 2021 06:42:50 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:49602 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229753AbhCGLmQ (ORCPT ); Sun, 7 Mar 2021 06:42:16 -0500 Received: from mail-ed1-f72.google.com ([209.85.208.72]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lIrlU-0002K9-Du for linux-kernel@vger.kernel.org; Sun, 07 Mar 2021 11:40:04 +0000 Received: by mail-ed1-f72.google.com with SMTP id h2so3565462edw.10 for ; Sun, 07 Mar 2021 03:40:04 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=IaOI6sfLur1cio+d1DvBU3jWRBzRJHEdk3id990OmYw=; b=NmE0WOtEUG0UGtBpWJdP/dn6/p1agMCtNDD3iHU8zJlIt6Q8f2fyz6q49PPHXCsSFE yLji8a7Sy8mlh1TxzA58gLs6EgSnAcFu7DdlFFEYJgaOuqtRP4gRHFrhnAgpBDJXxcWO 0M2Fg6/iQ7035MLFzEg5ShswvQMoyH9obKEONXIiPKK1ggvA72fWpanTw9/BtoxNTVho ONeRnXDF96EGpM3q6UEP43B/L/hKXzGMH5tpOE2u4CKyICVxjcYBgOrz+srzxEIDz1sP aAymLg949E0X/IjidUWVIYNAmG7EO0OtOmReIbsKuI69VZ/tI8uxopNjX+/ll28CB/QQ n7Pg== X-Gm-Message-State: AOAM5338m4iedswJTH+Mdhy0vlYseQBwzfq6eHzi2msQpbxtqS8s+naj VIFP/IsOckrsqC6EK7/UKpy5U0tJUDi6NJRxyaUXaLmkQ9uTqFPDnhe2UTBdA+Fnyohm8sOoDSV hWPBgZ+0FTRt5gY2+p508XnJaxwiM2+JDPhWYGfw+Ww== X-Received: by 2002:a17:906:b884:: with SMTP id hb4mr10386018ejb.536.1615117203781; Sun, 07 Mar 2021 03:40:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJzipGzDNC2m7qFZQL7/GmPd9oamLJ2JkMxfSm2OQXdsFLMxQXP2tUZ+TWwrEadIMtG963jLFg== X-Received: by 2002:a17:906:b884:: with SMTP id hb4mr10385983ejb.536.1615117203555; Sun, 07 Mar 2021 03:40:03 -0800 (PST) Received: from [192.168.1.116] (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id x10sm4560734ejd.69.2021.03.07.03.40.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 07 Mar 2021 03:40:03 -0800 (PST) Subject: Re: [RFT PATCH v3 24/27] tty: serial: samsung_tty: Add support for Apple UARTs To: Hector Martin , Andy Shevchenko Cc: linux-arm Mailing List , Marc Zyngier , Rob Herring , Arnd Bergmann , Olof Johansson , Mark Kettenis , Tony Lindgren , Mohamed Mediouni , Stan Skowronek , Alexander Graf , Will Deacon , Linus Walleij , Mark Rutland , Greg Kroah-Hartman , Jonathan Corbet , Catalin Marinas , Christoph Hellwig , "David S. Miller" , devicetree , "open list:SERIAL DRIVERS" , Linux Documentation List , Linux Samsung SOC , Linux-Arch , Linux Kernel Mailing List References: <20210304213902.83903-1-marcan@marcan.st> <20210304213902.83903-25-marcan@marcan.st> <2ed7523f-5c11-976f-ac11-f756d7510400@marcan.st> From: Krzysztof Kozlowski Message-ID: Date: Sun, 7 Mar 2021 12:40:02 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <2ed7523f-5c11-976f-ac11-f756d7510400@marcan.st> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/03/2021 18:04, Hector Martin wrote: > On 06/03/2021 00.28, Andy Shevchenko wrote: >>> + case TYPE_APPLE_S5L: >>> + WARN_ON(1); // No DMA >> >> Oh, no, please use the ONCE variant. > > Thanks, changing this for v4. > >> >> ... >> >>> + /* Apple types use these bits for IRQ masks */ >>> + if (ourport->info->type != TYPE_APPLE_S5L) { >>> + ucon &= ~(S3C64XX_UCON_TIMEOUT_MASK | >>> + S3C64XX_UCON_EMPTYINT_EN | >>> + S3C64XX_UCON_DMASUS_EN | >>> + S3C64XX_UCON_TIMEOUT_EN); >>> + ucon |= 0xf << S3C64XX_UCON_TIMEOUT_SHIFT | >> >> Can you spell 0xf with named constant(s), please? >> >> In case they are repetitive via the code, introduce either a temporary >> variable (in case it scoped to one function only), or define it as a >> constant. > > I'm just moving this code; as far as I can tell this is a timeout value > (so just an integer), but I don't know if there is any special meaning > to 0xf here. Note that this codepath is for *non-Apple* chips, as the > Apple ones don't even have this field (at least not here). I agree here with Hector. Andi, you propose here unrelated change (which without documentation might not be doable by Hector). > >>> + irqreturn_t ret = IRQ_NONE; >> >> Redundant. You may return directly. > > What if both interrupts are pending? > >> No IO serialization? > > There is no DMA on the Apple variants (as far as I know; it's not > implemented anyway), so there is no need for serializing IO with DMA. In > any case, dealing with that is the DMA code's job, the interrupt handler > shouldn't need to care. > > If you mean serializing IO with the IRQ: CPU-wise, I would hope that's > the irqchip's job (AIC does this with a readl on the event). If you mean > ensuring all writes are complete (i.e. posted write issue), on the Apple > chips everything is non-posted as explained in the previous patches. > >> Extra blank line (check your entire series for a such) > > Thanks, noted. I'll check the declaration blocks in other patches. > >>> + ourport->rx_enabled = 1; >>> + ourport->tx_enabled = 0; >> >> How are these protected against race? > > The serial core should be holding the port mutex for pretty much every > call into the driver, as far as I can tell. > >> >> ... >> >>> + case TYPE_APPLE_S5L: { >>> + unsigned int ucon; >>> + int ret; >>> + >>> + ret = clk_prepare_enable(ourport->clk); >>> + if (ret) { >>> + dev_err(dev, "clk_enable clk failed: %d\n", ret); >>> + return ret; >>> + } >>> + if (!IS_ERR(ourport->baudclk)) { >>> + ret = clk_prepare_enable(ourport->baudclk); >>> + if (ret) { >>> + dev_err(dev, "clk_enable baudclk failed: %d\n", ret); >>> + clk_disable_unprepare(ourport->clk); >>> + return ret; >>> + } >>> + } >> >> Wouldn't it be better to use CLK bulk API? > > Ah, I guess that could save a line or two of code here, even though it > requires setting up the array. I'll give it a shot. > >>> +#ifdef CONFIG_ARCH_APPLE >> >> Why? Wouldn't you like the one kernel to work on many SoCs? > > This *adds* Apple support, it is not mutually exclusive with all the > other SoCs. You can enable all of those options and get a driver that > works on all of them. This is the same pattern used throughout the > driver for all the other Samsung variants. There is no reason to have > Apple SoC support in the samsung driver if the rest of the kernel > doesn't have Apple SoC support either, of course. How ifdef on ARCH_APLLE makes it non-working on many SoCs? All new platforms are multi... The true question is - do the ifdefs in the code make it more difficult to read/review? Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC3B2C433E0 for ; Sun, 7 Mar 2021 11:41:36 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4A1A964FCC for ; Sun, 7 Mar 2021 11:41:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4A1A964FCC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=canonical.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:Cc:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=0VAJlkMC4tqjMikcuf8B/hZxMtT2fGd2cpCDDwTmxzE=; b=p7b59rLoREjEygU3lqPFmVtXR LGTbSmQEwBkGHlFNo/YHdemOcwruWgg6jZKVYcS3yF0GBgeX4PfhTT+Mmb6gt4ZX9ax/qNgwSER5R Rzdga5GU+TllKrJyzfP5KajUKLlNbvfdtD8/cWlyLsxfUkps7zbaDECURUcfHp7XmMmlQTa14WadQ cCk4SbPTaTMxs7j3xIVO+/0prigNzSU8Q4MEUAGQ94jYKxLinfuGkQFHQy50UKgRlQyqx2eVkQlrL 0PA4UEOhe+VJLNpPC2jkVEhLDp0IMM8k5s/OBxyWGRB9KAfqy7Qj/k8MZPNEM+GeNa+TLTlqahXrg EocWZYgzA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lIrlZ-009ryx-GD; Sun, 07 Mar 2021 11:40:09 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lIrlV-009rxt-5p for linux-arm-kernel@lists.infradead.org; Sun, 07 Mar 2021 11:40:07 +0000 Received: from mail-ed1-f69.google.com ([209.85.208.69]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lIrlU-0002K0-37 for linux-arm-kernel@lists.infradead.org; Sun, 07 Mar 2021 11:40:04 +0000 Received: by mail-ed1-f69.google.com with SMTP id v27so3588113edx.1 for ; Sun, 07 Mar 2021 03:40:04 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=IaOI6sfLur1cio+d1DvBU3jWRBzRJHEdk3id990OmYw=; b=c5I6CvNOEkQQqbdW2ikZuy+M1In0NDW+AqkGQLZrLQCC7hCHW7nhdV0LzCVtt86DTy IVYjrMNGMvveWXPHohPZ0Z+29ToiLl05iQFGqjCQ5RvUf3sKVaP0FVI6ZE5Vj1s7uEKB CX9zp5UvoVw/nhFuM994RGbTv70ignx8PJfe4atLZ5SdcKMuiTi9+9gGWBKzRAO/5S7R gUfnW/EQI47nfPJDERLLA5X/rYF1FjH/L7mQA/hQABDr5LGdoFv/ozlXBuXhX/CxvATC uJ7uSFX1SrvyIph7gm5CmlSxxBzqvnOCHV2UQKMe6j2l+e9VCIbro5oP+DQUR9VxP3gC OFpA== X-Gm-Message-State: AOAM5305KZ/KdX+B2BRNBz4r6sfMwlgX7gt8T/4s1NOcsErYPbdrQ4Jm 9rEkfmw2q+NY96eAySKflg5v9mzQnU0QhlgSXisG3HcyK5fH9boWEa2oCbYj5k+ETeO9cHwcYaB 3kT61wia1fNMSYOiLvKmV6yfD6AztD7/a7m1xvHDGohW5fmBiCT4/ X-Received: by 2002:a17:906:b884:: with SMTP id hb4mr10386007ejb.536.1615117203709; Sun, 07 Mar 2021 03:40:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJzipGzDNC2m7qFZQL7/GmPd9oamLJ2JkMxfSm2OQXdsFLMxQXP2tUZ+TWwrEadIMtG963jLFg== X-Received: by 2002:a17:906:b884:: with SMTP id hb4mr10385983ejb.536.1615117203555; Sun, 07 Mar 2021 03:40:03 -0800 (PST) Received: from [192.168.1.116] (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id x10sm4560734ejd.69.2021.03.07.03.40.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 07 Mar 2021 03:40:03 -0800 (PST) Subject: Re: [RFT PATCH v3 24/27] tty: serial: samsung_tty: Add support for Apple UARTs To: Hector Martin , Andy Shevchenko Cc: linux-arm Mailing List , Marc Zyngier , Rob Herring , Arnd Bergmann , Olof Johansson , Mark Kettenis , Tony Lindgren , Mohamed Mediouni , Stan Skowronek , Alexander Graf , Will Deacon , Linus Walleij , Mark Rutland , Greg Kroah-Hartman , Jonathan Corbet , Catalin Marinas , Christoph Hellwig , "David S. Miller" , devicetree , "open list:SERIAL DRIVERS" , Linux Documentation List , Linux Samsung SOC , Linux-Arch , Linux Kernel Mailing List References: <20210304213902.83903-1-marcan@marcan.st> <20210304213902.83903-25-marcan@marcan.st> <2ed7523f-5c11-976f-ac11-f756d7510400@marcan.st> From: Krzysztof Kozlowski Message-ID: Date: Sun, 7 Mar 2021 12:40:02 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <2ed7523f-5c11-976f-ac11-f756d7510400@marcan.st> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210307_114005_453846_7BAF50B9 X-CRM114-Status: GOOD ( 44.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 05/03/2021 18:04, Hector Martin wrote: > On 06/03/2021 00.28, Andy Shevchenko wrote: >>> + case TYPE_APPLE_S5L: >>> + WARN_ON(1); // No DMA >> >> Oh, no, please use the ONCE variant. > > Thanks, changing this for v4. > >> >> ... >> >>> + /* Apple types use these bits for IRQ masks */ >>> + if (ourport->info->type != TYPE_APPLE_S5L) { >>> + ucon &= ~(S3C64XX_UCON_TIMEOUT_MASK | >>> + S3C64XX_UCON_EMPTYINT_EN | >>> + S3C64XX_UCON_DMASUS_EN | >>> + S3C64XX_UCON_TIMEOUT_EN); >>> + ucon |= 0xf << S3C64XX_UCON_TIMEOUT_SHIFT | >> >> Can you spell 0xf with named constant(s), please? >> >> In case they are repetitive via the code, introduce either a temporary >> variable (in case it scoped to one function only), or define it as a >> constant. > > I'm just moving this code; as far as I can tell this is a timeout value > (so just an integer), but I don't know if there is any special meaning > to 0xf here. Note that this codepath is for *non-Apple* chips, as the > Apple ones don't even have this field (at least not here). I agree here with Hector. Andi, you propose here unrelated change (which without documentation might not be doable by Hector). > >>> + irqreturn_t ret = IRQ_NONE; >> >> Redundant. You may return directly. > > What if both interrupts are pending? > >> No IO serialization? > > There is no DMA on the Apple variants (as far as I know; it's not > implemented anyway), so there is no need for serializing IO with DMA. In > any case, dealing with that is the DMA code's job, the interrupt handler > shouldn't need to care. > > If you mean serializing IO with the IRQ: CPU-wise, I would hope that's > the irqchip's job (AIC does this with a readl on the event). If you mean > ensuring all writes are complete (i.e. posted write issue), on the Apple > chips everything is non-posted as explained in the previous patches. > >> Extra blank line (check your entire series for a such) > > Thanks, noted. I'll check the declaration blocks in other patches. > >>> + ourport->rx_enabled = 1; >>> + ourport->tx_enabled = 0; >> >> How are these protected against race? > > The serial core should be holding the port mutex for pretty much every > call into the driver, as far as I can tell. > >> >> ... >> >>> + case TYPE_APPLE_S5L: { >>> + unsigned int ucon; >>> + int ret; >>> + >>> + ret = clk_prepare_enable(ourport->clk); >>> + if (ret) { >>> + dev_err(dev, "clk_enable clk failed: %d\n", ret); >>> + return ret; >>> + } >>> + if (!IS_ERR(ourport->baudclk)) { >>> + ret = clk_prepare_enable(ourport->baudclk); >>> + if (ret) { >>> + dev_err(dev, "clk_enable baudclk failed: %d\n", ret); >>> + clk_disable_unprepare(ourport->clk); >>> + return ret; >>> + } >>> + } >> >> Wouldn't it be better to use CLK bulk API? > > Ah, I guess that could save a line or two of code here, even though it > requires setting up the array. I'll give it a shot. > >>> +#ifdef CONFIG_ARCH_APPLE >> >> Why? Wouldn't you like the one kernel to work on many SoCs? > > This *adds* Apple support, it is not mutually exclusive with all the > other SoCs. You can enable all of those options and get a driver that > works on all of them. This is the same pattern used throughout the > driver for all the other Samsung variants. There is no reason to have > Apple SoC support in the samsung driver if the rest of the kernel > doesn't have Apple SoC support either, of course. How ifdef on ARCH_APLLE makes it non-working on many SoCs? All new platforms are multi... The true question is - do the ifdefs in the code make it more difficult to read/review? Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel