From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48657) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gNQGw-0008TW-MD for qemu-devel@nongnu.org; Thu, 15 Nov 2018 17:38:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gNQGt-00059e-AR for qemu-devel@nongnu.org; Thu, 15 Nov 2018 17:38:02 -0500 From: Alistair Francis Date: Thu, 15 Nov 2018 22:37:22 +0000 Message-ID: References: In-Reply-To: Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: [Qemu-devel] [RFC v1 23/23] configure: Add support for building RISC-V host List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "qemu-devel@nongnu.org" , "qemu-riscv@nongnu.org" Cc: Alistair Francis , "alistair23@gmail.com" Signed-off-by: Alistair Francis Signed-off-by: Michael Clark --- configure | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/configure b/configure index 74e313a810..8a7b9fc933 100755 --- a/configure +++ b/configure @@ -700,6 +700,12 @@ elif check_define __s390__ ; then else cpu=3D"s390" fi +elif check_define __riscv ; then + if check_define _LP64 ; then + cpu=3D"riscv64" + elif check_define _ILP32 ; then + cpu=3D"riscv32" + fi elif check_define __arm__ ; then cpu=3D"arm" elif check_define __aarch64__ ; then @@ -712,7 +718,7 @@ ARCH=3D # Normalise host CPU name and set ARCH. # Note that this case should only have supported host CPUs, not guests. case "$cpu" in - ppc|ppc64|s390|s390x|sparc64|x32) + ppc|ppc64|s390|s390x|sparc64|x32|riscv32|riscv64) cpu=3D"$cpu" supported_cpu=3D"yes" eval "cross_cc_${cpu}=3D\$host_cc" @@ -6809,6 +6815,8 @@ elif test "$ARCH" =3D "x86_64" -o "$ARCH" =3D "x32" ;= then QEMU_INCLUDES=3D"-iquote \$(SRC_PATH)/tcg/i386 $QEMU_INCLUDES" elif test "$ARCH" =3D "ppc64" ; then QEMU_INCLUDES=3D"-iquote \$(SRC_PATH)/tcg/ppc $QEMU_INCLUDES" +elif test "$ARCH" =3D "riscv32" -o "$ARCH" =3D "riscv64" ; then + QEMU_INCLUDES=3D"-I\$(SRC_PATH)/tcg/riscv $QEMU_INCLUDES" else QEMU_INCLUDES=3D"-iquote \$(SRC_PATH)/tcg/\$(ARCH) $QEMU_INCLUDES" fi @@ -7306,7 +7314,7 @@ for i in $ARCH $TARGET_BASE_ARCH ; do ppc*) disas_config "PPC" ;; - riscv) + riscv*) disas_config "RISCV" ;; s390*) --=20 2.19.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.71) id 1gNQH2-00007H-9s for mharc-qemu-riscv@gnu.org; Thu, 15 Nov 2018 17:38:08 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48685) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gNQH0-00005g-CV for qemu-riscv@nongnu.org; Thu, 15 Nov 2018 17:38:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gNQGy-0005As-D6 for qemu-riscv@nongnu.org; Thu, 15 Nov 2018 17:38:06 -0500 Received: from esa5.hgst.iphmx.com ([216.71.153.144]:50705) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gNQGs-00052j-9o; Thu, 15 Nov 2018 17:37:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1542321478; x=1573857478; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; 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X-Received-From: 216.71.153.144 Subject: [Qemu-riscv] [RFC v1 23/23] configure: Add support for building RISC-V host X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Nov 2018 22:38:07 -0000 Signed-off-by: Alistair Francis Signed-off-by: Michael Clark --- configure | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/configure b/configure index 74e313a810..8a7b9fc933 100755 --- a/configure +++ b/configure @@ -700,6 +700,12 @@ elif check_define __s390__ ; then else cpu=3D"s390" fi +elif check_define __riscv ; then + if check_define _LP64 ; then + cpu=3D"riscv64" + elif check_define _ILP32 ; then + cpu=3D"riscv32" + fi elif check_define __arm__ ; then cpu=3D"arm" elif check_define __aarch64__ ; then @@ -712,7 +718,7 @@ ARCH=3D # Normalise host CPU name and set ARCH. # Note that this case should only have supported host CPUs, not guests. case "$cpu" in - ppc|ppc64|s390|s390x|sparc64|x32) + ppc|ppc64|s390|s390x|sparc64|x32|riscv32|riscv64) cpu=3D"$cpu" supported_cpu=3D"yes" eval "cross_cc_${cpu}=3D\$host_cc" @@ -6809,6 +6815,8 @@ elif test "$ARCH" =3D "x86_64" -o "$ARCH" =3D "x32" ;= then QEMU_INCLUDES=3D"-iquote \$(SRC_PATH)/tcg/i386 $QEMU_INCLUDES" elif test "$ARCH" =3D "ppc64" ; then QEMU_INCLUDES=3D"-iquote \$(SRC_PATH)/tcg/ppc $QEMU_INCLUDES" +elif test "$ARCH" =3D "riscv32" -o "$ARCH" =3D "riscv64" ; then + QEMU_INCLUDES=3D"-I\$(SRC_PATH)/tcg/riscv $QEMU_INCLUDES" else QEMU_INCLUDES=3D"-iquote \$(SRC_PATH)/tcg/\$(ARCH) $QEMU_INCLUDES" fi @@ -7306,7 +7314,7 @@ for i in $ARCH $TARGET_BASE_ARCH ; do ppc*) disas_config "PPC" ;; - riscv) + riscv*) disas_config "RISCV" ;; s390*) --=20 2.19.1