Re: [PATCH v9 net-next 03/11] dt-bindings: net: dsa: dt bindings for microchip lan937x

From: Prasanna Vengateshan <prasanna.vengateshan@microchip.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: <netdev@vger.kernel.org>, <olteanv@gmail.com>,
	<robh+dt@kernel.org>, <UNGLinuxDriver@microchip.com>,
	<woojung.huh@microchip.com>, <hkallweit1@gmail.com>,
	<linux@armlinux.org.uk>, <davem@davemloft.net>, <kuba@kernel.org>,
	<linux-kernel@vger.kernel.org>, <vivien.didelot@gmail.com>,
	<f.fainelli@gmail.com>, <devicetree@vger.kernel.org>,
	Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v9 net-next 03/11] dt-bindings: net: dsa: dt bindings for microchip lan937x
Date: Tue, 22 Mar 2022 01:49:29 +0530	[thread overview]
Message-ID: <b7d6a721c1a5dd7de39483a9f70c40912bb5265b.camel@microchip.com> (raw)
In-Reply-To: <YjZ6GIrGCMzBaftB@lunn.ch>

On Sun, 2022-03-20 at 01:49 +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
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> 
> > +examples:
> 
> > +          port@6 {
> > +            reg = <6>;
> > +            label = "lan5";
> > +            phy-mode = "internal";
> > +            phy-handle = <&t1phy4>;
> > +          };
> > +          port@7 {
> > +            reg = <7>;
> > +            label = "lan3";
> > +            phy-mode = "internal";
> > +            phy-handle = <&t1phy5>;
> > +          };
> > +        };
> > +
> > +        mdio {
> 
> ..
> 
> > +          t1phy4: ethernet-phy@6{
> > +            reg = <0x6>;
> > +          };
> > +          t1phy5: ethernet-phy@7{
> > +            reg = <0x7>;
> > +          };
> 
> I know it is only an example, but the numbering is a little odd here.
> 
> Port 6, which is named lan5 using t1phy4 at address 6?
> 
> I would be more likely to use t1phy6 instead of t1phy4. And t1phy7
> instead of t1phy5.

> 
>         Andrew

Sure, will change it in the next rev as above, Labels are just named to
understand front panel naming.

Prasanna V