From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 12/13] drm/i915: Prevent mixing of snooped and tiling modes for old chipsets Date: Thu, 14 Apr 2011 21:26:08 +0100 Message-ID: References: <1302771827-26112-1-git-send-email-chris@chris-wilson.co.uk> <1302771827-26112-13-git-send-email-chris@chris-wilson.co.uk> <20110414174334.GG3408@viiv.ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 251089E7BE for ; Thu, 14 Apr 2011 13:26:12 -0700 (PDT) In-Reply-To: <20110414174334.GG3408@viiv.ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, 14 Apr 2011 19:43:35 +0200, Daniel Vetter wrote: > On Thu, Apr 14, 2011 at 10:03:46AM +0100, Chris Wilson wrote: > > + if (INTEL_INFO(dev)->gen < 6 && > > + args->tiling_mode != I915_TILING_NONE && > > + obj->cache_level != I915_CACHE_NONE) { > > + DRM_DEBUG("can't not set a tiling mode on snooped memory," > > One negation too much. D'oh. That was me trying to be extra careful and not succumb to my usual habit of over-using contractions. Thanks, -Chris -- Chris Wilson, Intel Open Source Technology Centre