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* [PATCH v2 0/8] hm/mips/fuloong2e fixes
@ 2020-12-19  7:12 Jiaxun Yang
  2020-12-19  7:12 ` [PATCH v2 1/8] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT Jiaxun Yang
                   ` (8 more replies)
  0 siblings, 9 replies; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-19  7:12 UTC (permalink / raw)
  To: qemu-devel; +Cc: chenhuacai, f4bug, wainersm, crosa

It can now boot Debian installer[1] as well as a custom PMON bootloader
distribution[2].

Note that it can't boot PMON shipped with actual machine as our ATI vgabios
is using some x86 hack that can't be handled by x86emu in original PMON. 


Tree avilable at: https://gitlab.com/FlyGoat/qemu/-/tree/fuloong_fixes_v2

v2:
 - Collect review tags.
 - Get CPU clock via elegant method. (philmd)
 - Add boot_linux_console scceptance test

[1]: http://archive.debian.org/debian/dists/jessie/main/installer-mipsel/current/images/loongson-2e/netboot/
[2]: https://github.com/loongson-community/pmon/releases/download/20201219/pmon-2edev.bin

Thanks.

- Jiaxun

Jiaxun Yang (8):
  hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
  hw/mips/fuloong2e: Relpace fault links
  hw/pci-host/bonito: Fixup IRQ mapping
  hw/pci-host/bonito: Fixup pci.lomem mapping
  hw/mips/fuloong2e: Remove unused env entry
  hw/mips/fuloong2e: Correct cpuclock env
  hw/mips/fuloong2e: Add highmem support
  tests/acceptance: Test boot_linux_console for fuloong2e

 hw/mips/fuloong2e.c                    | 84 +++++++++++++++++---------
 hw/pci-host/bonito.c                   | 45 ++++----------
 tests/acceptance/boot_linux_console.py | 21 +++++++
 3 files changed, 87 insertions(+), 63 deletions(-)

-- 
2.29.2


^ permalink raw reply	[flat|nested] 31+ messages in thread
* [PATCH v2 1/8] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
  2020-12-19  7:12 [PATCH v2 0/8] hm/mips/fuloong2e fixes Jiaxun Yang
@ 2020-12-19  7:12 ` Jiaxun Yang
  2020-12-22  0:26   ` Huacai Chen
  2020-12-19  7:12 ` [PATCH v2 2/8] hw/mips/fuloong2e: Relpace fault links Jiaxun Yang
                   ` (7 subsequent siblings)
  8 siblings, 1 reply; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-19  7:12 UTC (permalink / raw)
  To: qemu-devel; +Cc: chenhuacai, f4bug, wainersm, crosa

Seems useless....

Fixes: 051c190bce5 ("MIPS: Initial support of fulong mini pc (machine construction)")
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/mips/fuloong2e.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 9b0eb8a314..055b99e378 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -48,8 +48,6 @@
 #include "sysemu/reset.h"
 #include "qemu/error-report.h"
 
-#define DEBUG_FULOONG2E_INIT
-
 #define ENVP_PADDR              0x2000
 #define ENVP_VADDR              cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR)
 #define ENVP_NB_ENTRIES         16
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 2/8] hw/mips/fuloong2e: Relpace fault links
  2020-12-19  7:12 [PATCH v2 0/8] hm/mips/fuloong2e fixes Jiaxun Yang
  2020-12-19  7:12 ` [PATCH v2 1/8] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT Jiaxun Yang
@ 2020-12-19  7:12 ` Jiaxun Yang
  2020-12-19 17:52   ` Philippe Mathieu-Daudé
  2020-12-19  7:18 ` [PATCH v2 3/8] hw/pci-host/bonito: Fixup IRQ mapping Jiaxun Yang
                   ` (6 subsequent siblings)
  8 siblings, 1 reply; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-19  7:12 UTC (permalink / raw)
  To: qemu-devel; +Cc: chenhuacai, f4bug, wainersm, crosa

Websites are downing, but GitHub may last forever.
Loongson even doesn't recogonize 2E as their products nowadays..

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 hw/mips/fuloong2e.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 055b99e378..d846ef7b00 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -14,8 +14,8 @@
  * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
  * https://www.linux-mips.org/wiki/Fuloong_2E
  *
- * Loongson 2e user manual:
- * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
+ * Loongson 2e manuals:
+ * https://github.com/loongson-community/docs/tree/master/2E
  */
 
 #include "qemu/osdep.h"
@@ -61,14 +61,7 @@
  * PMON is not part of qemu and released with BSD license, anyone
  * who want to build a pmon binary please first git-clone the source
  * from the git repository at:
- * http://www.loongson.cn/support/git/pmon
- * Then follow the "Compile Guide" available at:
- * http://dev.lemote.com/code/pmon
- *
- * Notes:
- * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
- * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
- * in the "Compile Guide".
+ * https://github.com/loongson-community/pmon
  */
 #define FULOONG_BIOSNAME "pmon_2e.bin"
 
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 3/8] hw/pci-host/bonito: Fixup IRQ mapping
  2020-12-19  7:12 [PATCH v2 0/8] hm/mips/fuloong2e fixes Jiaxun Yang
  2020-12-19  7:12 ` [PATCH v2 1/8] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT Jiaxun Yang
  2020-12-19  7:12 ` [PATCH v2 2/8] hw/mips/fuloong2e: Relpace fault links Jiaxun Yang
@ 2020-12-19  7:18 ` Jiaxun Yang
  2020-12-21 21:06   ` Philippe Mathieu-Daudé
  2020-12-19  7:18 ` [PATCH v2 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping Jiaxun Yang
                   ` (5 subsequent siblings)
  8 siblings, 1 reply; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-19  7:18 UTC (permalink / raw)
  To: qemu-devel; +Cc: chenhuacai, f4bug, wainersm, crosa

Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel,
despites south bridge IRQs needs special care, all other
IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'.

As south bridge IRQs are all handled by ISA bus, we can simply
remove BONITO_IRQ_BASE and direct map IRQs here.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 hw/pci-host/bonito.c | 28 +++++-----------------------
 1 file changed, 5 insertions(+), 23 deletions(-)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index a99eced065..43b79448a9 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -546,19 +546,16 @@ static const MemoryRegionOps bonito_spciconf_ops = {
     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-#define BONITO_IRQ_BASE 32
-
 static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
 {
     BonitoState *s = opaque;
     qemu_irq *pic = s->pic;
     PCIBonitoState *bonito_state = s->pci_dev;
-    int internal_irq = irq_num - BONITO_IRQ_BASE;
 
-    if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) {
+    if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) {
         qemu_irq_pulse(*pic);
     } else {   /* level triggered */
-        if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) {
+        if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) {
             qemu_irq_raise(*pic);
         } else {
             qemu_irq_lower(*pic);
@@ -566,25 +563,10 @@ static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
     }
 }
 
-/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused) */
-static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
+/* PCI slots IRQ pins started from 25 */
+static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin)
 {
-    int slot;
-
-    slot = (pci_dev->devfn >> 3);
-
-    switch (slot) {
-    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
-        return irq_num % 4 + BONITO_IRQ_BASE;
-    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
-        return 4 + BONITO_IRQ_BASE;
-    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
-        return 5 + BONITO_IRQ_BASE;
-    case 8 ... 12: /* PCI slot 1 to 4 */
-        return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
-    default:  /* Unknown device, don't do any translation */
-        return irq_num;
-    }
+    return 25 + pin;
 }
 
 static void bonito_reset(void *opaque)
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping
  2020-12-19  7:12 [PATCH v2 0/8] hm/mips/fuloong2e fixes Jiaxun Yang
                   ` (2 preceding siblings ...)
  2020-12-19  7:18 ` [PATCH v2 3/8] hw/pci-host/bonito: Fixup IRQ mapping Jiaxun Yang
@ 2020-12-19  7:18 ` Jiaxun Yang
  2020-12-21 20:45   ` Philippe Mathieu-Daudé
  2020-12-19  7:21 ` [PATCH v2 5/8] hw/mips/fuloong2e: Remove unused env entry Jiaxun Yang
                   ` (4 subsequent siblings)
  8 siblings, 1 reply; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-19  7:18 UTC (permalink / raw)
  To: qemu-devel; +Cc: chenhuacai, f4bug, wainersm, crosa

The original mapping had wrong base address.
Fix by correct the base adress and merge three alias into
a single.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 hw/pci-host/bonito.c | 17 ++++++-----------
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 43b79448a9..3a31ba42f2 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -608,7 +608,7 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
 {
     PCIHostState *phb = PCI_HOST_BRIDGE(dev);
     BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
-    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
+    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 1);
 
     memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
     phb->bus = pci_register_root_bus(dev, "pci",
@@ -616,16 +616,11 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
                                      dev, &bs->pci_mem, get_system_io(),
                                      0x28, 32, TYPE_PCI_BUS);
 
-    for (size_t i = 0; i < 3; i++) {
-        char *name = g_strdup_printf("pci.lomem%zu", i);
-
-        memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
-                                 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
-        memory_region_add_subregion(get_system_memory(),
-                                    BONITO_PCILO_BASE + i * 64 * MiB,
-                                    &pcimem_lo_alias[i]);
-        g_free(name);
-    }
+    memory_region_init_alias(pcimem_lo_alias, OBJECT(dev), "pci.lomem",
+                             &bs->pci_mem, BONITO_PCILO_BASE,
+                             BONITO_PCILO_SIZE);
+    memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,
+                                pcimem_lo_alias);
 
     create_unimplemented_device("pci.io", BONITO_PCIIO_BASE, 1 * MiB);
 }
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 5/8] hw/mips/fuloong2e: Remove unused env entry
  2020-12-19  7:12 [PATCH v2 0/8] hm/mips/fuloong2e fixes Jiaxun Yang
                   ` (3 preceding siblings ...)
  2020-12-19  7:18 ` [PATCH v2 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping Jiaxun Yang
@ 2020-12-19  7:21 ` Jiaxun Yang
  2020-12-22  0:27   ` Huacai Chen
  2020-12-22 14:42   ` Philippe Mathieu-Daudé
  2020-12-19  7:21 ` [PATCH v2 6/8] hw/mips/fuloong2e: Correct cpuclock env Jiaxun Yang
                   ` (3 subsequent siblings)
  8 siblings, 2 replies; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-19  7:21 UTC (permalink / raw)
  To: qemu-devel; +Cc: chenhuacai, f4bug, wainersm, crosa

modetty and busclock is not handled by kernel and the parameter
here seems unreasonable.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 hw/mips/fuloong2e.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index d846ef7b00..c4843dd15e 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -159,10 +159,8 @@ static uint64_t load_kernel(CPUMIPSState *env)
     }
 
     /* Setup minimum environment variables */
-    prom_set(prom_buf, index++, "busclock=33000000");
     prom_set(prom_buf, index++, "cpuclock=100000000");
     prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
-    prom_set(prom_buf, index++, "modetty0=38400n8r");
     prom_set(prom_buf, index++, NULL);
 
     rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 6/8] hw/mips/fuloong2e: Correct cpuclock env
  2020-12-19  7:12 [PATCH v2 0/8] hm/mips/fuloong2e fixes Jiaxun Yang
                   ` (4 preceding siblings ...)
  2020-12-19  7:21 ` [PATCH v2 5/8] hw/mips/fuloong2e: Remove unused env entry Jiaxun Yang
@ 2020-12-19  7:21 ` Jiaxun Yang
  2020-12-19 18:22   ` Philippe Mathieu-Daudé
  2020-12-19  7:23 ` [PATCH v2 7/8] hw/mips/fuloong2e: Add highmem support Jiaxun Yang
                   ` (2 subsequent siblings)
  8 siblings, 1 reply; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-19  7:21 UTC (permalink / raw)
  To: qemu-devel; +Cc: chenhuacai, f4bug, wainersm, crosa

It was missed in 3ca7639ff00 ("hw/mips/fuloong2e:
Set CPU frequency to 533 MHz"), we need to tell kernel
correct clocks.

Fixes: 3ca7639ff00 ("hw/mips/fuloong2e: Set CPU frequency to 533 MHz").
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 hw/mips/fuloong2e.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index c4843dd15e..2744b211fd 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -100,7 +100,7 @@ static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index,
     va_end(ap);
 }
 
-static uint64_t load_kernel(CPUMIPSState *env)
+static uint64_t load_kernel(MIPSCPU *cpu)
 {
     uint64_t kernel_entry, kernel_high, initrd_size;
     int index = 0;
@@ -159,7 +159,7 @@ static uint64_t load_kernel(CPUMIPSState *env)
     }
 
     /* Setup minimum environment variables */
-    prom_set(prom_buf, index++, "cpuclock=100000000");
+    prom_set(prom_buf, index++, "cpuclock=%u", clock_get_hz(cpu->clock));
     prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
     prom_set(prom_buf, index++, NULL);
 
@@ -304,7 +304,7 @@ static void mips_fuloong2e_init(MachineState *machine)
         loaderparams.kernel_filename = kernel_filename;
         loaderparams.kernel_cmdline = kernel_cmdline;
         loaderparams.initrd_filename = initrd_filename;
-        kernel_entry = load_kernel(env);
+        kernel_entry = load_kernel(cpu);
         write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
     } else {
         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 7/8] hw/mips/fuloong2e: Add highmem support
  2020-12-19  7:12 [PATCH v2 0/8] hm/mips/fuloong2e fixes Jiaxun Yang
                   ` (5 preceding siblings ...)
  2020-12-19  7:21 ` [PATCH v2 6/8] hw/mips/fuloong2e: Correct cpuclock env Jiaxun Yang
@ 2020-12-19  7:23 ` Jiaxun Yang
  2020-12-19 19:02   ` Philippe Mathieu-Daudé
  2020-12-21 20:34   ` Philippe Mathieu-Daudé
  2020-12-19  7:23 ` [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e Jiaxun Yang
  2020-12-19 12:13 ` [PATCH v2 0/8] hm/mips/fuloong2e fixes BALATON Zoltan via
  8 siblings, 2 replies; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-19  7:23 UTC (permalink / raw)
  To: qemu-devel; +Cc: chenhuacai, f4bug, wainersm, crosa

highmem started from 0x20000000.
Now we can have up to 2G RAM.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
v2: Handle SPD for dual DIMM correctly.
---
 hw/mips/fuloong2e.c | 61 ++++++++++++++++++++++++++++++++++++---------
 1 file changed, 49 insertions(+), 12 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 2744b211fd..8a4bebe066 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -56,6 +56,7 @@
 /* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
 #define BIOS_SIZE               (512 * KiB)
 #define MAX_IDE_BUS             2
+#define HIGHMEM_START           0x20000000
 
 /*
  * PMON is not part of qemu and released with BSD license, anyone
@@ -71,7 +72,8 @@
 #define FULOONG2E_RTL8139_SLOT    7
 
 static struct _loaderparams {
-    int ram_size;
+    int ram_low_size;
+    int ram_high_size;
     const char *kernel_filename;
     const char *kernel_cmdline;
     const char *initrd_filename;
@@ -128,14 +130,14 @@ static uint64_t load_kernel(MIPSCPU *cpu)
         initrd_size = get_image_size(loaderparams.initrd_filename);
         if (initrd_size > 0) {
             initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
-            if (initrd_offset + initrd_size > loaderparams.ram_size) {
+            if (initrd_offset + initrd_size > loaderparams.ram_low_size) {
                 error_report("memory too small for initial ram disk '%s'",
                              loaderparams.initrd_filename);
                 exit(1);
             }
             initrd_size = load_image_targphys(loaderparams.initrd_filename,
                                               initrd_offset,
-                                              loaderparams.ram_size - initrd_offset);
+                                              loaderparams.ram_low_size - initrd_offset);
         }
         if (initrd_size == (target_ulong) -1) {
             error_report("could not load initial ram disk '%s'",
@@ -160,7 +162,11 @@ static uint64_t load_kernel(MIPSCPU *cpu)
 
     /* Setup minimum environment variables */
     prom_set(prom_buf, index++, "cpuclock=%u", clock_get_hz(cpu->clock));
-    prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
+    prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_low_size / MiB);
+    if (loaderparams.ram_high_size > 0) {
+            prom_set(prom_buf, index++, "highmemsize=%"PRIi64,
+                    loaderparams.ram_high_size / MiB);
+    }
     prom_set(prom_buf, index++, NULL);
 
     rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
@@ -186,7 +192,7 @@ static void write_bootloader(CPUMIPSState *env, uint8_t *base,
     p = (uint32_t *)(base + 0x040);
 
     bl_gen_jump_kernel(&p, ENVP_VADDR - 64, 2, ENVP_VADDR,
-                       ENVP_VADDR + 8, loaderparams.ram_size,
+                       ENVP_VADDR + 8, loaderparams.ram_low_size,
                        kernel_addr);
 }
 
@@ -258,8 +264,11 @@ static void mips_fuloong2e_init(MachineState *machine)
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     const char *initrd_filename = machine->initrd_filename;
+    ram_addr_t ram_low_size, ram_high_size = 0;
     char *filename;
     MemoryRegion *address_space_mem = get_system_memory();
+    MemoryRegion *ram_low_alias = g_new(MemoryRegion, 1);
+    MemoryRegion *ram_high_alias;
     MemoryRegion *bios = g_new(MemoryRegion, 1);
     long bios_size;
     uint8_t *spd_data;
@@ -282,12 +291,31 @@ static void mips_fuloong2e_init(MachineState *machine)
 
     qemu_register_reset(main_cpu_reset, cpu);
 
-    /* TODO: support more than 256M RAM as highmem */
-    if (machine->ram_size != 256 * MiB) {
-        error_report("Invalid RAM size, should be 256MB");
+    if (machine->ram_size > 2 * GiB) {
+        error_report("Too much memory for this machine: %" PRId64 "MB,"
+                     " maximum 2048MB", machine->ram_size / MiB);
         exit(EXIT_FAILURE);
     }
-    memory_region_add_subregion(address_space_mem, 0, machine->ram);
+
+    ram_low_size = MIN(machine->ram_size, 256 * MiB);
+
+    memory_region_init_alias(ram_low_alias, NULL,
+                            "ram_low_alias",
+                            machine->ram, 0,
+                            ram_low_size);
+    memory_region_add_subregion(address_space_mem, 0,
+                                ram_low_alias);
+
+    if (machine->ram_size > 256 * MiB) {
+        ram_high_alias = g_new(MemoryRegion, 1);
+        ram_high_size = machine->ram_size - ram_low_size;
+        memory_region_init_alias(ram_high_alias, NULL,
+                                "ram_high_alias",
+                                machine->ram, ram_low_size,
+                                ram_high_size);
+        memory_region_add_subregion(address_space_mem, HIGHMEM_START,
+                                    ram_high_alias);
+    }
 
     /* Boot ROM */
     memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
@@ -300,7 +328,8 @@ static void mips_fuloong2e_init(MachineState *machine)
      */
 
     if (kernel_filename) {
-        loaderparams.ram_size = machine->ram_size;
+        loaderparams.ram_low_size = ram_low_size;
+        loaderparams.ram_high_size = ram_high_size;
         loaderparams.kernel_filename = kernel_filename;
         loaderparams.kernel_cmdline = kernel_cmdline;
         loaderparams.initrd_filename = initrd_filename;
@@ -345,8 +374,16 @@ static void mips_fuloong2e_init(MachineState *machine)
     }
 
     /* Populate SPD eeprom data */
-    spd_data = spd_data_generate(DDR, machine->ram_size);
-    smbus_eeprom_init_one(smbus, 0x50, spd_data);
+    if (machine->ram_size <= 1 * GiB) {
+        /* It supports maxium of 1 GiB per DIMM */
+        spd_data = spd_data_generate(DDR, machine->ram_size);
+        smbus_eeprom_init_one(smbus, 0x50, spd_data);
+    } else {
+        /* Split to dual DIMM for more than 1 GiB  */
+        spd_data = spd_data_generate(DDR, machine->ram_size / 2);
+        smbus_eeprom_init_one(smbus, 0x50, spd_data);
+        smbus_eeprom_init_one(smbus, 0x51, spd_data);
+    }
 
     mc146818_rtc_init(isa_bus, 2000, NULL);
 
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e
  2020-12-19  7:12 [PATCH v2 0/8] hm/mips/fuloong2e fixes Jiaxun Yang
                   ` (6 preceding siblings ...)
  2020-12-19  7:23 ` [PATCH v2 7/8] hw/mips/fuloong2e: Add highmem support Jiaxun Yang
@ 2020-12-19  7:23 ` Jiaxun Yang
  2020-12-19 18:57   ` Philippe Mathieu-Daudé
                     ` (2 more replies)
  2020-12-19 12:13 ` [PATCH v2 0/8] hm/mips/fuloong2e fixes BALATON Zoltan via
  8 siblings, 3 replies; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-19  7:23 UTC (permalink / raw)
  To: qemu-devel; +Cc: chenhuacai, f4bug, wainersm, crosa

The kernel comes from debian archive so it's trusted.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 tests/acceptance/boot_linux_console.py | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
index cc6ec0f8c1..fb41bb7144 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -170,6 +170,27 @@ class BootLinuxConsole(LinuxKernelTest):
         console_pattern = 'Kernel command line: %s' % kernel_command_line
         self.wait_for_console_pattern(console_pattern)
 
+    def test_mips64el_fuloong2e(self):
+        """
+        :avocado: tags=arch:mips64el
+        :avocado: tags=machine:fuloong2e
+        :avocado: tags=endian:little
+        """
+        deb_url = ('http://archive.debian.org/debian/pool/main/l/linux/'
+                   'linux-image-3.16.0-6-loongson-2e_3.16.56-1+deb8u1_mipsel.deb')
+        deb_hash = 'd04d446045deecf7b755ef576551de0c4184dd44'
+        deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)
+        kernel_path = self.extract_from_deb(deb_path,
+                                            '/boot/vmlinux-3.16.0-6-loongson-2e')
+
+        self.vm.set_console()
+        kernel_command_line = self.KERNEL_COMMON_COMMAND_LINE + 'console=ttyS0'
+        self.vm.add_args('-kernel', kernel_path,
+                         '-append', kernel_command_line)
+        self.vm.launch()
+        console_pattern = 'Kernel command line: %s' % kernel_command_line
+        self.wait_for_console_pattern(console_pattern)
+
     def test_mips_malta_cpio(self):
         """
         :avocado: tags=arch:mips
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 0/8] hm/mips/fuloong2e fixes
  2020-12-19  7:12 [PATCH v2 0/8] hm/mips/fuloong2e fixes Jiaxun Yang
                   ` (7 preceding siblings ...)
  2020-12-19  7:23 ` [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e Jiaxun Yang
@ 2020-12-19 12:13 ` BALATON Zoltan via
  2020-12-19 12:37   ` Jiaxun Yang
  8 siblings, 1 reply; 31+ messages in thread
From: BALATON Zoltan via @ 2020-12-19 12:13 UTC (permalink / raw)
  To: Jiaxun Yang; +Cc: crosa, chenhuacai, qemu-devel, wainersm, f4bug

On Sat, 19 Dec 2020, Jiaxun Yang wrote:
> It can now boot Debian installer[1] as well as a custom PMON bootloader
> distribution[2].
>
> Note that it can't boot PMON shipped with actual machine as our ATI vgabios
> is using some x86 hack that can't be handled by x86emu in original PMON.

This may be similar problem that I've seen with similar PPC firmwares:

https://osdn.net/projects/qmiga/wiki/SubprojectAti
https://osdn.net/projects/qmiga/wiki/SubprojectPegasos2#h3-Known.20issues

TLDR; vgabios-ati.bin is compiled for i386 real mode (bacause that's what 
gcc can do, real x86 real mode would need something like bcc I think) that 
some x86emu can't handle. You can either use Bochs vga bios via romfile 
property of the vga emulation or try the option for x86emu when compiling 
vgabios-ati.bin (which did not help the firmwares I've tried).

Regards,
BALATON Zoltan

>
> Tree avilable at: https://gitlab.com/FlyGoat/qemu/-/tree/fuloong_fixes_v2
>
> v2:
> - Collect review tags.
> - Get CPU clock via elegant method. (philmd)
> - Add boot_linux_console scceptance test
>
> [1]: http://archive.debian.org/debian/dists/jessie/main/installer-mipsel/current/images/loongson-2e/netboot/
> [2]: https://github.com/loongson-community/pmon/releases/download/20201219/pmon-2edev.bin
>
> Thanks.
>
> - Jiaxun
>
> Jiaxun Yang (8):
>  hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
>  hw/mips/fuloong2e: Relpace fault links
>  hw/pci-host/bonito: Fixup IRQ mapping
>  hw/pci-host/bonito: Fixup pci.lomem mapping
>  hw/mips/fuloong2e: Remove unused env entry
>  hw/mips/fuloong2e: Correct cpuclock env
>  hw/mips/fuloong2e: Add highmem support
>  tests/acceptance: Test boot_linux_console for fuloong2e
>
> hw/mips/fuloong2e.c                    | 84 +++++++++++++++++---------
> hw/pci-host/bonito.c                   | 45 ++++----------
> tests/acceptance/boot_linux_console.py | 21 +++++++
> 3 files changed, 87 insertions(+), 63 deletions(-)
>
>


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 0/8] hm/mips/fuloong2e fixes
  2020-12-19 12:13 ` [PATCH v2 0/8] hm/mips/fuloong2e fixes BALATON Zoltan via
@ 2020-12-19 12:37   ` Jiaxun Yang
  2020-12-19 16:03     ` BALATON Zoltan via
  0 siblings, 1 reply; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-19 12:37 UTC (permalink / raw)
  To: BALATON Zoltan; +Cc: crosa, chenhuacai, qemu-devel, wainersm, f4bug



在2020年12月19日十二月 下午8:13，BALATON Zoltan写道：
> On Sat, 19 Dec 2020, Jiaxun Yang wrote:
> > It can now boot Debian installer[1] as well as a custom PMON bootloader
> > distribution[2].
> >
> > Note that it can't boot PMON shipped with actual machine as our ATI vgabios
> > is using some x86 hack that can't be handled by x86emu in original PMON.
> 
> This may be similar problem that I've seen with similar PPC firmwares:
> 
> https://osdn.net/projects/qmiga/wiki/SubprojectAti
> https://osdn.net/projects/qmiga/wiki/SubprojectPegasos2#h3-Known.20issues
> 
> TLDR; vgabios-ati.bin is compiled for i386 real mode (bacause that's what 
> gcc can do, real x86 real mode would need something like bcc I think) that 
> some x86emu can't handle. You can either use Bochs vga bios via romfile 
> property of the vga emulation or try the option for x86emu when compiling 
> vgabios-ati.bin (which did not help the firmwares I've tried).

Hi,

Thinks for your reminder!

To be more specified, our x86emu in PMON can handle i386 real mode,
however vgabios-ati uses INT15h when INT10h ax=0x4f01 (Get VESA Mode)
is called. And x86emu won't process INT15h properly.

My workround[1] is to allow 0x4f01 to be failed in PMON, as ax=0x4f02
(Set VESA Mode) do work, it won't be a actual problem.


- Jiaxun


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 0/8] hm/mips/fuloong2e fixes
  2020-12-19 12:37   ` Jiaxun Yang
@ 2020-12-19 16:03     ` BALATON Zoltan via
  2020-12-21  9:52       ` Gerd Hoffmann
  0 siblings, 1 reply; 31+ messages in thread
From: BALATON Zoltan via @ 2020-12-19 16:03 UTC (permalink / raw)
  To: Jiaxun Yang; +Cc: chenhuacai, qemu-devel, wainersm, f4bug, Gerd Hoffmann, crosa

[-- Attachment #1: Type: text/plain, Size: 4995 bytes --]

On Sat, 19 Dec 2020, Jiaxun Yang wrote:
> 在2020年12月19日十二月 下午8:13，BALATON Zoltan写道：
>> On Sat, 19 Dec 2020, Jiaxun Yang wrote:
>>> It can now boot Debian installer[1] as well as a custom PMON bootloader
>>> distribution[2].
>>>
>>> Note that it can't boot PMON shipped with actual machine as our ATI vgabios
>>> is using some x86 hack that can't be handled by x86emu in original PMON.
>>
>> This may be similar problem that I've seen with similar PPC firmwares:
>>
>> https://osdn.net/projects/qmiga/wiki/SubprojectAti
>> https://osdn.net/projects/qmiga/wiki/SubprojectPegasos2#h3-Known.20issues
>>
>> TLDR; vgabios-ati.bin is compiled for i386 real mode (bacause that's what
>> gcc can do, real x86 real mode would need something like bcc I think) that
>> some x86emu can't handle. You can either use Bochs vga bios via romfile
>> property of the vga emulation or try the option for x86emu when compiling
>> vgabios-ati.bin (which did not help the firmwares I've tried).
>
> Hi,
>
> Thinks for your reminder!
>
> To be more specified, our x86emu in PMON can handle i386 real mode,
> however vgabios-ati uses INT15h when INT10h ax=0x4f01 (Get VESA Mode)
> is called. And x86emu won't process INT15h properly.
>
> My workround[1] is to allow 0x4f01 to be failed in PMON, as ax=0x4f02
> (Set VESA Mode) do work, it won't be a actual problem.

Adding Gerd who is the vgabios maintainer and added the VESA mode support 
so he knows about this even if no fix is needed but maybe he knows a 
simple way to work around it anyway. Maybe this could be related to my 
problems too but with the sam460ex firmware I did not get any output, it 
just stops (did not check u-boot-sam460ex source yet), but with the 
pegasos2 firmware I got this diagnostics:

INTERNAL ERROR: 0000000E=UNIMPLEMENTED EXTENDED OPCODE

EAX=0000 EBX=0000 ECX=2222 EDX=3333 ESP=0000 EBP=0000 ESI=6666 EDI=0000
  AX=0055  BX=FFDA  CX=2222  DX=3333  SP=FF86  BP=FF9A  SI=6666  DI=FFA6
  DS=1000  ES=BAD0  SS=1000  CS=C000  IP=2E05   NV UP -- PL NZ NA PE NC
CS:IP = 0F
STACK: 0000 0000 0000 0000 FFDA 0000 6666 6666
   00: FE00 F000 FE01 F000 FE02 F000 FE03 F000
   10: FE04 F000 FE05 F000 FE06 F000 FE07 F000
   20: FE08 F000 FE09 F000 FE0A F000 FE0B F000
   30: FE0C F000 FE0D F000 FE0E F000 FE0F F000
   40: FE10 F000 FE11 F000 FE12 F000 FE13 F000
   50: FE14 F000 FE15 F000 FE16 F000 FE17 F000
   60: FE18 F000 FE19 F000 FE1A F000 FE1B F000
   70: FE1C F000 FE1D F000 FE1E F000 FE1F F000
   80: FE20 F000 FE21 F000 FE22 F000 FE23 F000
   90: FE24 F000 FE25 F000 FE26 F000 FE27 F000
   A0: FE28 F000 FE29 F000 FE2A F000 FE2B F000
   B0: FE2C F000 FE2D F000 FE2E F000 FE2F F000
   C0: FE30 F000 FE31 F000 FE32 F000 FE33 F000
   D0: FE34 F000 FE35 F000 FE36 F000 FE37 F000
   E0: FE38 F000 FE39 F000 FE3A F000 FE3B F000
   F0: FE3C F000 FE3D F000 FE3E F000 FE3F F000
   00: FE40 F000 FE41 F000 FE42 F000 FE43 F000
   10: FE44 F000 FE45 F000 FE46 F000 FE47 F000
   20: FE48 F000 FE49 F000 FE4A F000 FE4B F000
   30: FE4C F000 FE4D F000 FE4E F000 FE4F F000
MISC: UNHANDLED 32 BIT DATA PREFIX AT CS:IP = 0000C000:00002E04 0F
INTERNAL ERROR: 0000000A=UNHANDLED 32BIT PREFIX

EAX=0000 EBX=0000 ECX=2222 EDX=3333 ESP=0000 EBP=0000 ESI=6666 EDI=0000
  AX=0055  BX=FFDA  CX=2222  DX=3333  SP=FF86  BP=FF9A  SI=6666  DI=FFA6
  DS=1000  ES=BAD0  SS=1000  CS=C000  IP=2E05   NV UP -- PL NZ NA PE NC
CS:IP = 0F
STACK: 0000 0000 0000 0000 FFDA 0000 6666 6666
   00: FE00 F000 FE01 F000 FE02 F000 FE03 F000
   10: FE04 F000 FE05 F000 FE06 F000 FE07 F000
   20: FE08 F000 FE09 F000 FE0A F000 FE0B F000
   30: FE0C F000 FE0D F000 FE0E F000 FE0F F000
   40: FE10 F000 FE11 F000 FE12 F000 FE13 F000
   50: FE14 F000 FE15 F000 FE16 F000 FE17 F000
   60: FE18 F000 FE19 F000 FE1A F000 FE1B F000
   70: FE1C F000 FE1D F000 FE1E F000 FE1F F000
   80: FE20 F000 FE21 F000 FE22 F000 FE23 F000
   90: FE24 F000 FE25 F000 FE26 F000 FE27 F000
   A0: FE28 F000 FE29 F000 FE2A F000 FE2B F000
   B0: FE2C F000 FE2D F000 FE2E F000 FE2F F000
   C0: FE30 F000 FE31 F000 FE32 F000 FE33 F000
   D0: FE34 F000 FE35 F000 FE36 F000 FE37 F000
   E0: FE38 F000 FE39 F000 FE3A F000 FE3B F000
   F0: FE3C F000 FE3D F000 FE3E F000 FE3F F000
   00: FE40 F000 FE41 F000 FE42 F000 FE43 F000
   10: FE44 F000 FE45 F000 FE46 F000 FE47 F000
   20: FE48 F000 FE49 F000 FE4A F000 FE4B F000
   30: FE4C F000 FE4D F000 FE4E F000 FE4F F000
Failed to emulate CS:IP [C000:2E04]=66,0F,BE,C0,E9,FB
UNHANDLED INT 10 FUNCTION 0100 WITHIN EMULATION
EA: BYTE READ FROM UNINITIALIZED LOW MEM 0040:0085
UNHANDLED INT 10 FUNCTION 0300 WITHIN EMULATION
UNHANDLED INT 10 FUNCTION 1301 WITHIN EMULATION
UNHANDLED INT 10 FUNCTION 0300 WITHIN EMULATION
UNHANDLED INT 10 FUNCTION 1301 WITHIN EMULATION
UNHANDLED INT 10 FUNCTION 0300 WITHIN EMULATION
UNHANDLED INT 10 FUNCTION 1301 WITHIN EMULATION
UNHANDLED INT 10 FUNCTION 0300 WITHIN EMULATION

which I assumed could be the same problem with sam460ex too but maybe it's 
different then.

Regards,
BALATON Zoltan

>
> - Jiaxun
>
>

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/8] hw/mips/fuloong2e: Relpace fault links
  2020-12-19  7:12 ` [PATCH v2 2/8] hw/mips/fuloong2e: Relpace fault links Jiaxun Yang
@ 2020-12-19 17:52   ` Philippe Mathieu-Daudé
  2020-12-22  0:30     ` Huacai Chen
  0 siblings, 1 reply; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-19 17:52 UTC (permalink / raw)
  To: Jiaxun Yang, qemu-devel; +Cc: chenhuacai, wainersm, crosa

On 12/19/20 8:12 AM, Jiaxun Yang wrote:
> Websites are downing, but GitHub may last forever.
> Loongson even doesn't recogonize 2E as their products nowadays..
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  hw/mips/fuloong2e.c | 13 +++----------
>  1 file changed, 3 insertions(+), 10 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 6/8] hw/mips/fuloong2e: Correct cpuclock env
  2020-12-19  7:21 ` [PATCH v2 6/8] hw/mips/fuloong2e: Correct cpuclock env Jiaxun Yang
@ 2020-12-19 18:22   ` Philippe Mathieu-Daudé
  2020-12-22  0:28     ` Huacai Chen
  0 siblings, 1 reply; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-19 18:22 UTC (permalink / raw)
  To: Jiaxun Yang, qemu-devel; +Cc: chenhuacai, wainersm, crosa

On 12/19/20 8:21 AM, Jiaxun Yang wrote:
> It was missed in 3ca7639ff00 ("hw/mips/fuloong2e:
> Set CPU frequency to 533 MHz"), we need to tell kernel
> correct clocks.
> 
> Fixes: 3ca7639ff00 ("hw/mips/fuloong2e: Set CPU frequency to 533 MHz").
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  hw/mips/fuloong2e.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e
  2020-12-19  7:23 ` [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e Jiaxun Yang
@ 2020-12-19 18:57   ` Philippe Mathieu-Daudé
  2020-12-21 21:17   ` Wainer dos Santos Moschetta
  2020-12-21 21:35   ` Willian Rampazzo
  2 siblings, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-19 18:57 UTC (permalink / raw)
  To: Jiaxun Yang, qemu-devel; +Cc: chenhuacai, wainersm, crosa

On 12/19/20 8:23 AM, Jiaxun Yang wrote:
> The kernel comes from debian archive so it's trusted.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  tests/acceptance/boot_linux_console.py | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 7/8] hw/mips/fuloong2e: Add highmem support
  2020-12-19  7:23 ` [PATCH v2 7/8] hw/mips/fuloong2e: Add highmem support Jiaxun Yang
@ 2020-12-19 19:02   ` Philippe Mathieu-Daudé
  2020-12-21 20:34   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-19 19:02 UTC (permalink / raw)
  To: Jiaxun Yang, qemu-devel; +Cc: chenhuacai, wainersm, crosa

On 12/19/20 8:23 AM, Jiaxun Yang wrote:
> highmem started from 0x20000000.
> Now we can have up to 2G RAM.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> v2: Handle SPD for dual DIMM correctly.
> ---
>  hw/mips/fuloong2e.c | 61 ++++++++++++++++++++++++++++++++++++---------
>  1 file changed, 49 insertions(+), 12 deletions(-)

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 0/8] hm/mips/fuloong2e fixes
  2020-12-19 16:03     ` BALATON Zoltan via
@ 2020-12-21  9:52       ` Gerd Hoffmann
  0 siblings, 0 replies; 31+ messages in thread
From: Gerd Hoffmann @ 2020-12-21  9:52 UTC (permalink / raw)
  To: BALATON Zoltan; +Cc: chenhuacai, qemu-devel, wainersm, f4bug, crosa

> > To be more specified, our x86emu in PMON can handle i386 real mode,
> > however vgabios-ati uses INT15h when INT10h ax=0x4f01 (Get VESA Mode)
> > is called. And x86emu won't process INT15h properly.
> > 
> > My workround[1] is to allow 0x4f01 to be failed in PMON, as ax=0x4f02
> > (Set VESA Mode) do work, it won't be a actual problem.
> 
> Adding Gerd who is the vgabios maintainer and added the VESA mode support so
> he knows about this even if no fix is needed but maybe he knows a simple way
> to work around it anyway.

Hmm, memcpy_high() uses int15.  memcpy_high() is used to access the
framebuffer, and there isn't a way around it.  From a quick scan of the
source code I can't see why "get mode" uses that though.  "set mode" will
call it to clear the screen (unless the noclearmem flag is set).

take care,
  Gerd



^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 7/8] hw/mips/fuloong2e: Add highmem support
  2020-12-19  7:23 ` [PATCH v2 7/8] hw/mips/fuloong2e: Add highmem support Jiaxun Yang
  2020-12-19 19:02   ` Philippe Mathieu-Daudé
@ 2020-12-21 20:34   ` Philippe Mathieu-Daudé
  2020-12-22  1:13     ` Huacai Chen
  1 sibling, 1 reply; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-21 20:34 UTC (permalink / raw)
  To: Jiaxun Yang, qemu-devel; +Cc: chenhuacai, wainersm, crosa

On 12/19/20 8:23 AM, Jiaxun Yang wrote:
> highmem started from 0x20000000.

"started from" -> "starts at"?

> Now we can have up to 2G RAM.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> v2: Handle SPD for dual DIMM correctly.
> ---
>  hw/mips/fuloong2e.c | 61 ++++++++++++++++++++++++++++++++++++---------
>  1 file changed, 49 insertions(+), 12 deletions(-)
> 
> diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
> index 2744b211fd..8a4bebe066 100644
> --- a/hw/mips/fuloong2e.c
> +++ b/hw/mips/fuloong2e.c
> @@ -56,6 +56,7 @@
>  /* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
>  #define BIOS_SIZE               (512 * KiB)
>  #define MAX_IDE_BUS             2
> +#define HIGHMEM_START           0x20000000
>  
>  /*
>   * PMON is not part of qemu and released with BSD license, anyone
> @@ -71,7 +72,8 @@
>  #define FULOONG2E_RTL8139_SLOT    7
>  
>  static struct _loaderparams {
> -    int ram_size;
> +    int ram_low_size;
> +    int ram_high_size;
>      const char *kernel_filename;
>      const char *kernel_cmdline;
>      const char *initrd_filename;
> @@ -128,14 +130,14 @@ static uint64_t load_kernel(MIPSCPU *cpu)
>          initrd_size = get_image_size(loaderparams.initrd_filename);
>          if (initrd_size > 0) {
>              initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
> -            if (initrd_offset + initrd_size > loaderparams.ram_size) {
> +            if (initrd_offset + initrd_size > loaderparams.ram_low_size) {
>                  error_report("memory too small for initial ram disk '%s'",
>                               loaderparams.initrd_filename);
>                  exit(1);
>              }
>              initrd_size = load_image_targphys(loaderparams.initrd_filename,
>                                                initrd_offset,
> -                                              loaderparams.ram_size - initrd_offset);
> +                                              loaderparams.ram_low_size - initrd_offset);
>          }
>          if (initrd_size == (target_ulong) -1) {
>              error_report("could not load initial ram disk '%s'",
> @@ -160,7 +162,11 @@ static uint64_t load_kernel(MIPSCPU *cpu)
>  
>      /* Setup minimum environment variables */
>      prom_set(prom_buf, index++, "cpuclock=%u", clock_get_hz(cpu->clock));
> -    prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
> +    prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_low_size / MiB);
> +    if (loaderparams.ram_high_size > 0) {
> +            prom_set(prom_buf, index++, "highmemsize=%"PRIi64,
> +                    loaderparams.ram_high_size / MiB);
> +    }
>      prom_set(prom_buf, index++, NULL);
>  
>      rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
> @@ -186,7 +192,7 @@ static void write_bootloader(CPUMIPSState *env, uint8_t *base,
>      p = (uint32_t *)(base + 0x040);
>  
>      bl_gen_jump_kernel(&p, ENVP_VADDR - 64, 2, ENVP_VADDR,
> -                       ENVP_VADDR + 8, loaderparams.ram_size,
> +                       ENVP_VADDR + 8, loaderparams.ram_low_size,
>                         kernel_addr);
>  }
>  
> @@ -258,8 +264,11 @@ static void mips_fuloong2e_init(MachineState *machine)
>      const char *kernel_filename = machine->kernel_filename;
>      const char *kernel_cmdline = machine->kernel_cmdline;
>      const char *initrd_filename = machine->initrd_filename;
> +    ram_addr_t ram_low_size, ram_high_size = 0;
>      char *filename;
>      MemoryRegion *address_space_mem = get_system_memory();
> +    MemoryRegion *ram_low_alias = g_new(MemoryRegion, 1);
> +    MemoryRegion *ram_high_alias;
>      MemoryRegion *bios = g_new(MemoryRegion, 1);
>      long bios_size;
>      uint8_t *spd_data;
> @@ -282,12 +291,31 @@ static void mips_fuloong2e_init(MachineState *machine)
>  
>      qemu_register_reset(main_cpu_reset, cpu);
>  
> -    /* TODO: support more than 256M RAM as highmem */
> -    if (machine->ram_size != 256 * MiB) {
> -        error_report("Invalid RAM size, should be 256MB");
> +    if (machine->ram_size > 2 * GiB) {
> +        error_report("Too much memory for this machine: %" PRId64 "MB,"
> +                     " maximum 2048MB", machine->ram_size / MiB);
>          exit(EXIT_FAILURE);
>      }
> -    memory_region_add_subregion(address_space_mem, 0, machine->ram);
> +
> +    ram_low_size = MIN(machine->ram_size, 256 * MiB);
> +
> +    memory_region_init_alias(ram_low_alias, NULL,
> +                            "ram_low_alias",
> +                            machine->ram, 0,
> +                            ram_low_size);
> +    memory_region_add_subregion(address_space_mem, 0,
> +                                ram_low_alias);
> +
> +    if (machine->ram_size > 256 * MiB) {
> +        ram_high_alias = g_new(MemoryRegion, 1);
> +        ram_high_size = machine->ram_size - ram_low_size;
> +        memory_region_init_alias(ram_high_alias, NULL,
> +                                "ram_high_alias",
> +                                machine->ram, ram_low_size,
> +                                ram_high_size);
> +        memory_region_add_subregion(address_space_mem, HIGHMEM_START,
> +                                    ram_high_alias);

Cool, I've been using the same patch for one year. It works fine with
a Linux kernel which doesn't change the northbridge mapping. As there
is no plan for using another bootloader than PMON with this machine,
that is fine.

> +    }
>  
>      /* Boot ROM */
>      memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
> @@ -300,7 +328,8 @@ static void mips_fuloong2e_init(MachineState *machine)
>       */
>  
>      if (kernel_filename) {
> -        loaderparams.ram_size = machine->ram_size;
> +        loaderparams.ram_low_size = ram_low_size;
> +        loaderparams.ram_high_size = ram_high_size;
>          loaderparams.kernel_filename = kernel_filename;
>          loaderparams.kernel_cmdline = kernel_cmdline;
>          loaderparams.initrd_filename = initrd_filename;
> @@ -345,8 +374,16 @@ static void mips_fuloong2e_init(MachineState *machine)
>      }
>  
>      /* Populate SPD eeprom data */
> -    spd_data = spd_data_generate(DDR, machine->ram_size);
> -    smbus_eeprom_init_one(smbus, 0x50, spd_data);
> +    if (machine->ram_size <= 1 * GiB) {
> +        /* It supports maxium of 1 GiB per DIMM */

Typo "maximum".

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> +        spd_data = spd_data_generate(DDR, machine->ram_size);
> +        smbus_eeprom_init_one(smbus, 0x50, spd_data);
> +    } else {
> +        /* Split to dual DIMM for more than 1 GiB  */
> +        spd_data = spd_data_generate(DDR, machine->ram_size / 2);
> +        smbus_eeprom_init_one(smbus, 0x50, spd_data);
> +        smbus_eeprom_init_one(smbus, 0x51, spd_data);
> +    }
>  
>      mc146818_rtc_init(isa_bus, 2000, NULL);
>  
> 


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping
  2020-12-19  7:18 ` [PATCH v2 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping Jiaxun Yang
@ 2020-12-21 20:45   ` Philippe Mathieu-Daudé
  2020-12-22  0:36     ` Jiaxun Yang
  0 siblings, 1 reply; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-21 20:45 UTC (permalink / raw)
  To: Jiaxun Yang, qemu-devel; +Cc: chenhuacai, wainersm, crosa

On 12/19/20 8:18 AM, Jiaxun Yang wrote:
> The original mapping had wrong base address.
> Fix by correct the base adress and merge three alias into
> a single.

Why merge? Beside, typo "address".

> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  hw/pci-host/bonito.c | 17 ++++++-----------
>  1 file changed, 6 insertions(+), 11 deletions(-)
> 
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index 43b79448a9..3a31ba42f2 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -608,7 +608,7 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
>  {
>      PCIHostState *phb = PCI_HOST_BRIDGE(dev);
>      BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
> -    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
> +    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 1);
>  
>      memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
>      phb->bus = pci_register_root_bus(dev, "pci",
> @@ -616,16 +616,11 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
>                                       dev, &bs->pci_mem, get_system_io(),
>                                       0x28, 32, TYPE_PCI_BUS);
>  
> -    for (size_t i = 0; i < 3; i++) {
> -        char *name = g_strdup_printf("pci.lomem%zu", i);
> -
> -        memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
> -                                 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
> -        memory_region_add_subregion(get_system_memory(),
> -                                    BONITO_PCILO_BASE + i * 64 * MiB,
> -                                    &pcimem_lo_alias[i]);
> -        g_free(name);
> -    }
> +    memory_region_init_alias(pcimem_lo_alias, OBJECT(dev), "pci.lomem",
> +                             &bs->pci_mem, BONITO_PCILO_BASE,
> +                             BONITO_PCILO_SIZE);

Why is your pci_mem mapped at 0?

> +    memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,
> +                                pcimem_lo_alias);
>  
>      create_unimplemented_device("pci.io", BONITO_PCIIO_BASE, 1 * MiB);
>  }
> 


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 3/8] hw/pci-host/bonito: Fixup IRQ mapping
  2020-12-19  7:18 ` [PATCH v2 3/8] hw/pci-host/bonito: Fixup IRQ mapping Jiaxun Yang
@ 2020-12-21 21:06   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-21 21:06 UTC (permalink / raw)
  To: Jiaxun Yang, qemu-devel; +Cc: chenhuacai, wainersm, crosa

On 12/19/20 8:18 AM, Jiaxun Yang wrote:
> Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel,
> despites south bridge IRQs needs special care, all other
> IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'.
> 
> As south bridge IRQs are all handled by ISA bus, we can simply
> remove BONITO_IRQ_BASE and direct map IRQs here.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  hw/pci-host/bonito.c | 28 +++++-----------------------
>  1 file changed, 5 insertions(+), 23 deletions(-)
> 
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index a99eced065..43b79448a9 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -546,19 +546,16 @@ static const MemoryRegionOps bonito_spciconf_ops = {
>      .endianness = DEVICE_NATIVE_ENDIAN,
>  };
>  
> -#define BONITO_IRQ_BASE 32
> -
>  static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
>  {
>      BonitoState *s = opaque;
>      qemu_irq *pic = s->pic;
>      PCIBonitoState *bonito_state = s->pci_dev;
> -    int internal_irq = irq_num - BONITO_IRQ_BASE;
>  
> -    if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) {
> +    if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) {
>          qemu_irq_pulse(*pic);
>      } else {   /* level triggered */
> -        if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) {
> +        if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) {
>              qemu_irq_raise(*pic);
>          } else {
>              qemu_irq_lower(*pic);
> @@ -566,25 +563,10 @@ static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
>      }
>  }
>  
> -/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused) */
> -static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
> +/* PCI slots IRQ pins started from 25 */

#define BONITO_IRQ_BASE 25 ? :)

> +static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin)
>  {
> -    int slot;
> -
> -    slot = (pci_dev->devfn >> 3);
> -
> -    switch (slot) {
> -    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> -        return irq_num % 4 + BONITO_IRQ_BASE;
> -    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
> -        return 4 + BONITO_IRQ_BASE;
> -    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
> -        return 5 + BONITO_IRQ_BASE;
> -    case 8 ... 12: /* PCI slot 1 to 4 */
> -        return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
> -    default:  /* Unknown device, don't do any translation */
> -        return irq_num;
> -    }
> +    return 25 + pin;
>  }
>  
>  static void bonito_reset(void *opaque)
> 


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e
  2020-12-19  7:23 ` [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e Jiaxun Yang
  2020-12-19 18:57   ` Philippe Mathieu-Daudé
@ 2020-12-21 21:17   ` Wainer dos Santos Moschetta
  2020-12-21 21:35   ` Willian Rampazzo
  2 siblings, 0 replies; 31+ messages in thread
From: Wainer dos Santos Moschetta @ 2020-12-21 21:17 UTC (permalink / raw)
  To: Jiaxun Yang, qemu-devel; +Cc: chenhuacai, f4bug, crosa

Hi,

On 12/19/20 4:23 AM, Jiaxun Yang wrote:
> The kernel comes from debian archive so it's trusted.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>   tests/acceptance/boot_linux_console.py | 21 +++++++++++++++++++++
>   1 file changed, 21 insertions(+)

Phillipe has already tested it, so I only reviewed the code.

Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>

>
> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> index cc6ec0f8c1..fb41bb7144 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -170,6 +170,27 @@ class BootLinuxConsole(LinuxKernelTest):
>           console_pattern = 'Kernel command line: %s' % kernel_command_line
>           self.wait_for_console_pattern(console_pattern)
>   
> +    def test_mips64el_fuloong2e(self):
> +        """
> +        :avocado: tags=arch:mips64el
> +        :avocado: tags=machine:fuloong2e
> +        :avocado: tags=endian:little
> +        """
> +        deb_url = ('http://archive.debian.org/debian/pool/main/l/linux/'
> +                   'linux-image-3.16.0-6-loongson-2e_3.16.56-1+deb8u1_mipsel.deb')
> +        deb_hash = 'd04d446045deecf7b755ef576551de0c4184dd44'
> +        deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)
> +        kernel_path = self.extract_from_deb(deb_path,
> +                                            '/boot/vmlinux-3.16.0-6-loongson-2e')
> +
> +        self.vm.set_console()
> +        kernel_command_line = self.KERNEL_COMMON_COMMAND_LINE + 'console=ttyS0'
> +        self.vm.add_args('-kernel', kernel_path,
> +                         '-append', kernel_command_line)
> +        self.vm.launch()
> +        console_pattern = 'Kernel command line: %s' % kernel_command_line
> +        self.wait_for_console_pattern(console_pattern)
> +
>       def test_mips_malta_cpio(self):
>           """
>           :avocado: tags=arch:mips



^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e
  2020-12-19  7:23 ` [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e Jiaxun Yang
  2020-12-19 18:57   ` Philippe Mathieu-Daudé
  2020-12-21 21:17   ` Wainer dos Santos Moschetta
@ 2020-12-21 21:35   ` Willian Rampazzo
  2020-12-22  0:24     ` Huacai Chen
  2 siblings, 1 reply; 31+ messages in thread
From: Willian Rampazzo @ 2020-12-21 21:35 UTC (permalink / raw)
  To: Jiaxun Yang
  Cc: Cleber Rosa Junior, Huacai Chen, qemu-devel, Wainer Moschetta,
	Philippe Mathieu-Daudé

On Sat, Dec 19, 2020 at 4:30 AM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
>
> The kernel comes from debian archive so it's trusted.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  tests/acceptance/boot_linux_console.py | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>

Reviewed-by: Willian Rampazzo <willianr@redhat.com>



^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e
  2020-12-21 21:35   ` Willian Rampazzo
@ 2020-12-22  0:24     ` Huacai Chen
  0 siblings, 0 replies; 31+ messages in thread
From: Huacai Chen @ 2020-12-22  0:24 UTC (permalink / raw)
  To: Willian Rampazzo
  Cc: Cleber Rosa Junior, Wainer Moschetta, qemu-devel,
	Philippe Mathieu-Daudé

Reviewed-by: Huacai Chen <chenhuacai@kernel.org>

On Tue, Dec 22, 2020 at 5:35 AM Willian Rampazzo <wrampazz@redhat.com> wrote:
>
> On Sat, Dec 19, 2020 at 4:30 AM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
> >
> > The kernel comes from debian archive so it's trusted.
> >
> > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > ---
> >  tests/acceptance/boot_linux_console.py | 21 +++++++++++++++++++++
> >  1 file changed, 21 insertions(+)
> >
>
> Reviewed-by: Willian Rampazzo <willianr@redhat.com>
>


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 1/8] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
  2020-12-19  7:12 ` [PATCH v2 1/8] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT Jiaxun Yang
@ 2020-12-22  0:26   ` Huacai Chen
  0 siblings, 0 replies; 31+ messages in thread
From: Huacai Chen @ 2020-12-22  0:26 UTC (permalink / raw)
  To: Jiaxun Yang
  Cc: Cleber Rosa, QEMU Developers, Wainer dos Santos Moschetta,
	Philippe Mathieu-Daudé

Reviewed-by: Huacai Chen <chenhuacai@kernel.org>

On Sat, Dec 19, 2020 at 3:13 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
>
> Seems useless....
>
> Fixes: 051c190bce5 ("MIPS: Initial support of fulong mini pc (machine construction)")
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/mips/fuloong2e.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
> index 9b0eb8a314..055b99e378 100644
> --- a/hw/mips/fuloong2e.c
> +++ b/hw/mips/fuloong2e.c
> @@ -48,8 +48,6 @@
>  #include "sysemu/reset.h"
>  #include "qemu/error-report.h"
>
> -#define DEBUG_FULOONG2E_INIT
> -
>  #define ENVP_PADDR              0x2000
>  #define ENVP_VADDR              cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR)
>  #define ENVP_NB_ENTRIES         16
> --
> 2.29.2


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 5/8] hw/mips/fuloong2e: Remove unused env entry
  2020-12-19  7:21 ` [PATCH v2 5/8] hw/mips/fuloong2e: Remove unused env entry Jiaxun Yang
@ 2020-12-22  0:27   ` Huacai Chen
  2020-12-22 14:42   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 31+ messages in thread
From: Huacai Chen @ 2020-12-22  0:27 UTC (permalink / raw)
  To: Jiaxun Yang
  Cc: Cleber Rosa, QEMU Developers, Wainer dos Santos Moschetta,
	Philippe Mathieu-Daudé

Reviewed-by: Huacai Chen <chenhuacai@kernel.org>

On Sat, Dec 19, 2020 at 3:22 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
>
> modetty and busclock is not handled by kernel and the parameter
> here seems unreasonable.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  hw/mips/fuloong2e.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
> index d846ef7b00..c4843dd15e 100644
> --- a/hw/mips/fuloong2e.c
> +++ b/hw/mips/fuloong2e.c
> @@ -159,10 +159,8 @@ static uint64_t load_kernel(CPUMIPSState *env)
>      }
>
>      /* Setup minimum environment variables */
> -    prom_set(prom_buf, index++, "busclock=33000000");
>      prom_set(prom_buf, index++, "cpuclock=100000000");
>      prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
> -    prom_set(prom_buf, index++, "modetty0=38400n8r");
>      prom_set(prom_buf, index++, NULL);
>
>      rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
> --
> 2.29.2


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 6/8] hw/mips/fuloong2e: Correct cpuclock env
  2020-12-19 18:22   ` Philippe Mathieu-Daudé
@ 2020-12-22  0:28     ` Huacai Chen
  0 siblings, 0 replies; 31+ messages in thread
From: Huacai Chen @ 2020-12-22  0:28 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Cleber Rosa, QEMU Developers, Wainer dos Santos Moschetta

Reviewed-by: Huacai Chen <chenhuacai@kernel.org>

On Sun, Dec 20, 2020 at 2:23 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> On 12/19/20 8:21 AM, Jiaxun Yang wrote:
> > It was missed in 3ca7639ff00 ("hw/mips/fuloong2e:
> > Set CPU frequency to 533 MHz"), we need to tell kernel
> > correct clocks.
> >
> > Fixes: 3ca7639ff00 ("hw/mips/fuloong2e: Set CPU frequency to 533 MHz").
> > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > ---
> >  hw/mips/fuloong2e.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/8] hw/mips/fuloong2e: Relpace fault links
  2020-12-19 17:52   ` Philippe Mathieu-Daudé
@ 2020-12-22  0:30     ` Huacai Chen
  0 siblings, 0 replies; 31+ messages in thread
From: Huacai Chen @ 2020-12-22  0:30 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Cleber Rosa, QEMU Developers, Wainer dos Santos Moschetta

Reviewed-by: Huacai Chen <chenhuacai@kernel.org>

On Sun, Dec 20, 2020 at 1:52 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> On 12/19/20 8:12 AM, Jiaxun Yang wrote:
> > Websites are downing, but GitHub may last forever.
> > Loongson even doesn't recogonize 2E as their products nowadays..
> >
> > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > ---
> >  hw/mips/fuloong2e.c | 13 +++----------
> >  1 file changed, 3 insertions(+), 10 deletions(-)
>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping
  2020-12-21 20:45   ` Philippe Mathieu-Daudé
@ 2020-12-22  0:36     ` Jiaxun Yang
  2020-12-22 12:13       ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 31+ messages in thread
From: Jiaxun Yang @ 2020-12-22  0:36 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel; +Cc: chenhuacai, wainersm, crosa

在 2020/12/22 上午4:45, Philippe Mathieu-Daudé 写道:
> On 12/19/20 8:18 AM, Jiaxun Yang wrote:
>> The original mapping had wrong base address.
>> Fix by correct the base adress and merge three alias into
>> a single.
> Why merge? Beside, typo "address".


Hi Philippe,

Thanks for your reviewing!

Because I can't understand why it was in three pieces.
I was just trying to do what kernel as I don't have much knowledge with
Fuloong2E.

The kernel treated PCI region as a whole part[1] at 0x10000000 with size
0x0c000000.

It fixed long lasting radeonfb starting failure.

>
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> ---
>>   hw/pci-host/bonito.c | 17 ++++++-----------
>>   1 file changed, 6 insertions(+), 11 deletions(-)
>>
>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
>> index 43b79448a9..3a31ba42f2 100644
>> --- a/hw/pci-host/bonito.c
>> +++ b/hw/pci-host/bonito.c
>> @@ -608,7 +608,7 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
>>   {
>>       PCIHostState *phb = PCI_HOST_BRIDGE(dev);
>>       BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
>> -    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
>> +    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 1);
>>   
>>       memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
>>       phb->bus = pci_register_root_bus(dev, "pci",
>> @@ -616,16 +616,11 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
>>                                        dev, &bs->pci_mem, get_system_io(),
>>                                        0x28, 32, TYPE_PCI_BUS);
>>   
>> -    for (size_t i = 0; i < 3; i++) {
>> -        char *name = g_strdup_printf("pci.lomem%zu", i);
>> -
>> -        memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
>> -                                 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
>> -        memory_region_add_subregion(get_system_memory(),
>> -                                    BONITO_PCILO_BASE + i * 64 * MiB,
>> -                                    &pcimem_lo_alias[i]);
>> -        g_free(name);
>> -    }
>> +    memory_region_init_alias(pcimem_lo_alias, OBJECT(dev), "pci.lomem",
>> +                             &bs->pci_mem, BONITO_PCILO_BASE,
>> +                             BONITO_PCILO_SIZE);
> Why is your pci_mem mapped at 0?

It is actually started at 0x10000000.

As: #define BONITO_PCILO_BASE       0x10000000


Thanks.

[1]: 
https://elixir.bootlin.com/linux/latest/source/arch/mips/loongson2ef/common/pci.c

- Jiaxun
>
>> +    memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,
>> +                                pcimem_lo_alias);
>>   
>>       create_unimplemented_device("pci.io", BONITO_PCIIO_BASE, 1 * MiB);
>>   }
>>



^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 7/8] hw/mips/fuloong2e: Add highmem support
  2020-12-21 20:34   ` Philippe Mathieu-Daudé
@ 2020-12-22  1:13     ` Huacai Chen
  0 siblings, 0 replies; 31+ messages in thread
From: Huacai Chen @ 2020-12-22  1:13 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Cleber Rosa, QEMU Developers, Wainer dos Santos Moschetta

Reviewed-by: Huacai Chen <chenhuacai@kernel.org>

On Tue, Dec 22, 2020 at 4:35 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> On 12/19/20 8:23 AM, Jiaxun Yang wrote:
> > highmem started from 0x20000000.
>
> "started from" -> "starts at"?
>
> > Now we can have up to 2G RAM.
> >
> > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > ---
> > v2: Handle SPD for dual DIMM correctly.
> > ---
> >  hw/mips/fuloong2e.c | 61 ++++++++++++++++++++++++++++++++++++---------
> >  1 file changed, 49 insertions(+), 12 deletions(-)
> >
> > diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
> > index 2744b211fd..8a4bebe066 100644
> > --- a/hw/mips/fuloong2e.c
> > +++ b/hw/mips/fuloong2e.c
> > @@ -56,6 +56,7 @@
> >  /* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
> >  #define BIOS_SIZE               (512 * KiB)
> >  #define MAX_IDE_BUS             2
> > +#define HIGHMEM_START           0x20000000
> >
> >  /*
> >   * PMON is not part of qemu and released with BSD license, anyone
> > @@ -71,7 +72,8 @@
> >  #define FULOONG2E_RTL8139_SLOT    7
> >
> >  static struct _loaderparams {
> > -    int ram_size;
> > +    int ram_low_size;
> > +    int ram_high_size;
> >      const char *kernel_filename;
> >      const char *kernel_cmdline;
> >      const char *initrd_filename;
> > @@ -128,14 +130,14 @@ static uint64_t load_kernel(MIPSCPU *cpu)
> >          initrd_size = get_image_size(loaderparams.initrd_filename);
> >          if (initrd_size > 0) {
> >              initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
> > -            if (initrd_offset + initrd_size > loaderparams.ram_size) {
> > +            if (initrd_offset + initrd_size > loaderparams.ram_low_size) {
> >                  error_report("memory too small for initial ram disk '%s'",
> >                               loaderparams.initrd_filename);
> >                  exit(1);
> >              }
> >              initrd_size = load_image_targphys(loaderparams.initrd_filename,
> >                                                initrd_offset,
> > -                                              loaderparams.ram_size - initrd_offset);
> > +                                              loaderparams.ram_low_size - initrd_offset);
> >          }
> >          if (initrd_size == (target_ulong) -1) {
> >              error_report("could not load initial ram disk '%s'",
> > @@ -160,7 +162,11 @@ static uint64_t load_kernel(MIPSCPU *cpu)
> >
> >      /* Setup minimum environment variables */
> >      prom_set(prom_buf, index++, "cpuclock=%u", clock_get_hz(cpu->clock));
> > -    prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
> > +    prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_low_size / MiB);
> > +    if (loaderparams.ram_high_size > 0) {
> > +            prom_set(prom_buf, index++, "highmemsize=%"PRIi64,
> > +                    loaderparams.ram_high_size / MiB);
> > +    }
> >      prom_set(prom_buf, index++, NULL);
> >
> >      rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
> > @@ -186,7 +192,7 @@ static void write_bootloader(CPUMIPSState *env, uint8_t *base,
> >      p = (uint32_t *)(base + 0x040);
> >
> >      bl_gen_jump_kernel(&p, ENVP_VADDR - 64, 2, ENVP_VADDR,
> > -                       ENVP_VADDR + 8, loaderparams.ram_size,
> > +                       ENVP_VADDR + 8, loaderparams.ram_low_size,
> >                         kernel_addr);
> >  }
> >
> > @@ -258,8 +264,11 @@ static void mips_fuloong2e_init(MachineState *machine)
> >      const char *kernel_filename = machine->kernel_filename;
> >      const char *kernel_cmdline = machine->kernel_cmdline;
> >      const char *initrd_filename = machine->initrd_filename;
> > +    ram_addr_t ram_low_size, ram_high_size = 0;
> >      char *filename;
> >      MemoryRegion *address_space_mem = get_system_memory();
> > +    MemoryRegion *ram_low_alias = g_new(MemoryRegion, 1);
> > +    MemoryRegion *ram_high_alias;
> >      MemoryRegion *bios = g_new(MemoryRegion, 1);
> >      long bios_size;
> >      uint8_t *spd_data;
> > @@ -282,12 +291,31 @@ static void mips_fuloong2e_init(MachineState *machine)
> >
> >      qemu_register_reset(main_cpu_reset, cpu);
> >
> > -    /* TODO: support more than 256M RAM as highmem */
> > -    if (machine->ram_size != 256 * MiB) {
> > -        error_report("Invalid RAM size, should be 256MB");
> > +    if (machine->ram_size > 2 * GiB) {
> > +        error_report("Too much memory for this machine: %" PRId64 "MB,"
> > +                     " maximum 2048MB", machine->ram_size / MiB);
> >          exit(EXIT_FAILURE);
> >      }
> > -    memory_region_add_subregion(address_space_mem, 0, machine->ram);
> > +
> > +    ram_low_size = MIN(machine->ram_size, 256 * MiB);
> > +
> > +    memory_region_init_alias(ram_low_alias, NULL,
> > +                            "ram_low_alias",
> > +                            machine->ram, 0,
> > +                            ram_low_size);
> > +    memory_region_add_subregion(address_space_mem, 0,
> > +                                ram_low_alias);
> > +
> > +    if (machine->ram_size > 256 * MiB) {
> > +        ram_high_alias = g_new(MemoryRegion, 1);
> > +        ram_high_size = machine->ram_size - ram_low_size;
> > +        memory_region_init_alias(ram_high_alias, NULL,
> > +                                "ram_high_alias",
> > +                                machine->ram, ram_low_size,
> > +                                ram_high_size);
> > +        memory_region_add_subregion(address_space_mem, HIGHMEM_START,
> > +                                    ram_high_alias);
>
> Cool, I've been using the same patch for one year. It works fine with
> a Linux kernel which doesn't change the northbridge mapping. As there
> is no plan for using another bootloader than PMON with this machine,
> that is fine.
>
> > +    }
> >
> >      /* Boot ROM */
> >      memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
> > @@ -300,7 +328,8 @@ static void mips_fuloong2e_init(MachineState *machine)
> >       */
> >
> >      if (kernel_filename) {
> > -        loaderparams.ram_size = machine->ram_size;
> > +        loaderparams.ram_low_size = ram_low_size;
> > +        loaderparams.ram_high_size = ram_high_size;
> >          loaderparams.kernel_filename = kernel_filename;
> >          loaderparams.kernel_cmdline = kernel_cmdline;
> >          loaderparams.initrd_filename = initrd_filename;
> > @@ -345,8 +374,16 @@ static void mips_fuloong2e_init(MachineState *machine)
> >      }
> >
> >      /* Populate SPD eeprom data */
> > -    spd_data = spd_data_generate(DDR, machine->ram_size);
> > -    smbus_eeprom_init_one(smbus, 0x50, spd_data);
> > +    if (machine->ram_size <= 1 * GiB) {
> > +        /* It supports maxium of 1 GiB per DIMM */
>
> Typo "maximum".
>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
> > +        spd_data = spd_data_generate(DDR, machine->ram_size);
> > +        smbus_eeprom_init_one(smbus, 0x50, spd_data);
> > +    } else {
> > +        /* Split to dual DIMM for more than 1 GiB  */
> > +        spd_data = spd_data_generate(DDR, machine->ram_size / 2);
> > +        smbus_eeprom_init_one(smbus, 0x50, spd_data);
> > +        smbus_eeprom_init_one(smbus, 0x51, spd_data);
> > +    }
> >
> >      mc146818_rtc_init(isa_bus, 2000, NULL);
> >
> >


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping
  2020-12-22  0:36     ` Jiaxun Yang
@ 2020-12-22 12:13       ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-22 12:13 UTC (permalink / raw)
  To: Jiaxun Yang, qemu-devel; +Cc: chenhuacai, wainersm, crosa

On 12/22/20 1:36 AM, Jiaxun Yang wrote:
> 在 2020/12/22 上午4:45, Philippe Mathieu-Daudé 写道:
>> On 12/19/20 8:18 AM, Jiaxun Yang wrote:
>>> The original mapping had wrong base address.
>>> Fix by correct the base adress and merge three alias into
>>> a single.
>> Why merge? Beside, typo "address".
> 
> 
> Hi Philippe,
> 
> Thanks for your reviewing!
> 
> Because I can't understand why it was in three pieces.
> I was just trying to do what kernel as I don't have much knowledge with
> Fuloong2E.

You can find the information in the 'BONITO64 - "north bridge"
controller for 64-bit MIPS CPUs" datasheet from Algorithmics Ltd. 2001,
section "4.1. Address maps" and Table 4.1: "CPU/local bus address map".

See also "Design and Implementation of EBoot based on Godson Platform":
http://www.ecice06.com/CN/article/downloadArticleFile.do?attachType=PDF&id=10656

> 
> The kernel treated PCI region as a whole part[1] at 0x10000000 with size
> 0x0c000000.
> 
> It fixed long lasting radeonfb starting failure.
> 
>>
>>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>>> ---
>>>   hw/pci-host/bonito.c | 17 ++++++-----------
>>>   1 file changed, 6 insertions(+), 11 deletions(-)
>>>
>>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
>>> index 43b79448a9..3a31ba42f2 100644
>>> --- a/hw/pci-host/bonito.c
>>> +++ b/hw/pci-host/bonito.c
>>> @@ -608,7 +608,7 @@ static void bonito_pcihost_realize(DeviceState
>>> *dev, Error **errp)
>>>   {
>>>       PCIHostState *phb = PCI_HOST_BRIDGE(dev);
>>>       BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
>>> -    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
>>> +    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 1);
>>>         memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem",
>>> BONITO_PCIHI_SIZE);
>>>       phb->bus = pci_register_root_bus(dev, "pci",
>>> @@ -616,16 +616,11 @@ static void bonito_pcihost_realize(DeviceState
>>> *dev, Error **errp)
>>>                                        dev, &bs->pci_mem,
>>> get_system_io(),
>>>                                        0x28, 32, TYPE_PCI_BUS);
>>>   -    for (size_t i = 0; i < 3; i++) {
>>> -        char *name = g_strdup_printf("pci.lomem%zu", i);
>>> -
>>> -        memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
>>> -                                 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
>>> -        memory_region_add_subregion(get_system_memory(),
>>> -                                    BONITO_PCILO_BASE + i * 64 * MiB,
>>> -                                    &pcimem_lo_alias[i]);
>>> -        g_free(name);
>>> -    }
>>> +    memory_region_init_alias(pcimem_lo_alias, OBJECT(dev), "pci.lomem",
>>> +                             &bs->pci_mem, BONITO_PCILO_BASE,
>>> +                             BONITO_PCILO_SIZE);
>> Why is your pci_mem mapped at 0?
> 
> It is actually started at 0x10000000.
> 
> As: #define BONITO_PCILO_BASE       0x10000000
> 
> 
> Thanks.
> 
> [1]:
> https://elixir.bootlin.com/linux/latest/source/arch/mips/loongson2ef/common/pci.c
> 
> 
> - Jiaxun
>>
>>> +    memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,
>>> +                                pcimem_lo_alias);
>>>         create_unimplemented_device("pci.io", BONITO_PCIIO_BASE, 1 *
>>> MiB);
>>>   }
>>>
> 
> 


^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 5/8] hw/mips/fuloong2e: Remove unused env entry
  2020-12-19  7:21 ` [PATCH v2 5/8] hw/mips/fuloong2e: Remove unused env entry Jiaxun Yang
  2020-12-22  0:27   ` Huacai Chen
@ 2020-12-22 14:42   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-22 14:42 UTC (permalink / raw)
  To: Jiaxun Yang, qemu-devel; +Cc: chenhuacai, wainersm, crosa

On 12/19/20 8:21 AM, Jiaxun Yang wrote:
> modetty and busclock is not handled by kernel and the parameter
> here seems unreasonable.

'busclock' is used by old kernels:
https://elixir.bootlin.com/linux/v3.1/source/arch/mips/loongson/common/env.c#L51

'modetty' is likely here because this code was started using
the YAMON load_kernel() code from malta.c as template.

> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  hw/mips/fuloong2e.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
> index d846ef7b00..c4843dd15e 100644
> --- a/hw/mips/fuloong2e.c
> +++ b/hw/mips/fuloong2e.c
> @@ -159,10 +159,8 @@ static uint64_t load_kernel(CPUMIPSState *env)
>      }
>  
>      /* Setup minimum environment variables */
> -    prom_set(prom_buf, index++, "busclock=33000000");
>      prom_set(prom_buf, index++, "cpuclock=100000000");
>      prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
> -    prom_set(prom_buf, index++, "modetty0=38400n8r");
>      prom_set(prom_buf, index++, NULL);
>  
>      rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
> 


^ permalink raw reply	[flat|nested] 31+ messages in thread
end of thread, other threads:[~2020-12-22 14:43 UTC | newest]

Thread overview: 31+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-19  7:12 [PATCH v2 0/8] hm/mips/fuloong2e fixes Jiaxun Yang
2020-12-19  7:12 ` [PATCH v2 1/8] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT Jiaxun Yang
2020-12-22  0:26   ` Huacai Chen
2020-12-19  7:12 ` [PATCH v2 2/8] hw/mips/fuloong2e: Relpace fault links Jiaxun Yang
2020-12-19 17:52   ` Philippe Mathieu-Daudé
2020-12-22  0:30     ` Huacai Chen
2020-12-19  7:18 ` [PATCH v2 3/8] hw/pci-host/bonito: Fixup IRQ mapping Jiaxun Yang
2020-12-21 21:06   ` Philippe Mathieu-Daudé
2020-12-19  7:18 ` [PATCH v2 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping Jiaxun Yang
2020-12-21 20:45   ` Philippe Mathieu-Daudé
2020-12-22  0:36     ` Jiaxun Yang
2020-12-22 12:13       ` Philippe Mathieu-Daudé
2020-12-19  7:21 ` [PATCH v2 5/8] hw/mips/fuloong2e: Remove unused env entry Jiaxun Yang
2020-12-22  0:27   ` Huacai Chen
2020-12-22 14:42   ` Philippe Mathieu-Daudé
2020-12-19  7:21 ` [PATCH v2 6/8] hw/mips/fuloong2e: Correct cpuclock env Jiaxun Yang
2020-12-19 18:22   ` Philippe Mathieu-Daudé
2020-12-22  0:28     ` Huacai Chen
2020-12-19  7:23 ` [PATCH v2 7/8] hw/mips/fuloong2e: Add highmem support Jiaxun Yang
2020-12-19 19:02   ` Philippe Mathieu-Daudé
2020-12-21 20:34   ` Philippe Mathieu-Daudé
2020-12-22  1:13     ` Huacai Chen
2020-12-19  7:23 ` [PATCH v2 8/8] tests/acceptance: Test boot_linux_console for fuloong2e Jiaxun Yang
2020-12-19 18:57   ` Philippe Mathieu-Daudé
2020-12-21 21:17   ` Wainer dos Santos Moschetta
2020-12-21 21:35   ` Willian Rampazzo
2020-12-22  0:24     ` Huacai Chen
2020-12-19 12:13 ` [PATCH v2 0/8] hm/mips/fuloong2e fixes BALATON Zoltan via
2020-12-19 12:37   ` Jiaxun Yang
2020-12-19 16:03     ` BALATON Zoltan via
2020-12-21  9:52       ` Gerd Hoffmann

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