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[188.155.192.147]) by smtp.gmail.com with ESMTPSA id l8sm11083996wrx.83.2021.04.01.10.54.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 01 Apr 2021 10:54:50 -0700 (PDT) Subject: Re: [PATCH v2 0/6] NVIDIA Tegra memory improvements To: Dmitry Osipenko , Thierry Reding , Jonathan Hunter , Rob Herring Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org References: <20210330230445.26619-1-digetx@gmail.com> From: Krzysztof Kozlowski Message-ID: Date: Thu, 1 Apr 2021 19:54:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210330230445.26619-1-digetx@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On 31/03/2021 01:04, Dmitry Osipenko wrote: > Hi, > > This series replaces the raw voltage regulator with a power domain that > will be managing SoC core voltage. The core power domain patches are still > under review, but it's clear at this point that this is the way we will > implement the DVFS support. > > The remaining Tegra20 memory bindings are converted to schema. I also > made a small improvement to the memory drivers. > > Changelog: > > v2: - Fixed typos in the converted schemas. > - Corrected reg entry of tegra20-mc-gart schema to use fixed number of items. > - Made power-domain to use maxItems instead of $ref phandle in schemas. > > Dmitry Osipenko (6): > dt-bindings: memory: tegra20: emc: Replace core regulator with power > domain > dt-bindings: memory: tegra30: emc: Replace core regulator with power > domain > dt-bindings: memory: tegra124: emc: Replace core regulator with power > domain > dt-bindings: memory: tegra20: mc: Convert to schema > dt-bindings: memory: tegra20: emc: Convert to schema > memory: tegra: Print out info-level once per driver probe Thanks, applied subset - 1-4 and 6. For patch 5/6 I expect v3. Best regards, Krzysztof > > .../nvidia,tegra124-emc.yaml | 7 +- > .../memory-controllers/nvidia,tegra20-emc.txt | 130 -------- > .../nvidia,tegra20-emc.yaml | 294 ++++++++++++++++++ > .../memory-controllers/nvidia,tegra20-mc.txt | 40 --- > .../memory-controllers/nvidia,tegra20-mc.yaml | 79 +++++ > .../nvidia,tegra30-emc.yaml | 7 +- > drivers/memory/tegra/tegra124-emc.c | 12 +- > drivers/memory/tegra/tegra20-emc.c | 20 +- > drivers/memory/tegra/tegra30-emc.c | 18 +- > 9 files changed, 406 insertions(+), 201 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt > create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.yaml > delete mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt > create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.yaml > Best regards, Krzysztof