From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kever Yang Subject: Re: [PATCH v3 50/57] ram: rk3399: Add LPPDDR4-800 timings inc Date: Tue, 16 Jul 2019 21:20:20 +0800 Message-ID: References: <20190716115745.12585-1-jagan@amarulasolutions.com> <20190716115745.12585-51-jagan@amarulasolutions.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20190716115745.12585-51-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Jagan Teki , Simon Glass , Philipp Tomsich , YouMin Chen , u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, gajjar04akash-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org, Manivannan Sadhasivam List-Id: linux-rockchip.vger.kernel.org Ck9uIDIwMTkvNy8xNiDkuIvljYg3OjU3LCBKYWdhbiBUZWtpIHdyb3RlOgo+IExQRERSNCBpbml0 aWFsaXphdGlvbiBzdGFydCB3aXRoIGF0IGJvYXJkIHNlbGVjdGVkIGZyZXF1ZW5jeQo+IGFuZCB0 aGVuIGl0IHN3aXRjaGVzIGludG8gNDAwTUh6IGFuZCA4MDBNSHogc2ltdWx0YW5lb3VzbHkgdG8K PiBtYWtlIHRoZSBwcm9wZXIgc2VxdWVuY2Ugd29yayBvbiBlYWNoIGNoYW5uZWwgd2l0aCBhc3Nv Y2lhdGVkCj4gdHJhaW5pbmcuCj4KPiBTbywgYWRkIExQRERSNC04MDAgdGltaW5ncyBpbmMgZmls ZSBpbiBkcml2ZXIgYXJlYSBzby10aGF0Cj4gdGhlc2UgdGltaW5ncyB3aWxsIHRha2UgZHVyaW5n IExQRERSNCBpbml0aWFsaXphdGlvbiBwaGFzZS4KPgo+IFNpZ25lZC1vZmYtYnk6IEphZ2FuIFRl a2kgPGphZ2FuQGFtYXJ1bGFzb2x1dGlvbnMuY29tPgo+IFNpZ25lZC1vZmYtYnk6IFlvdU1pbiBD aGVuIDxjeW1Acm9jay1jaGlwcy5jb20+CgpSZXZpZXdlZC1ieTogS2V2ZXIgWWFuZyA8S2V2ZXIu eWFuZ0Byb2NrLWNoaXBzLmNvbT4KClRoYW5rcywKIMKgLSBLZXZlcgoKCgpfX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpMaW51eC1yb2NrY2hpcCBtYWlsaW5n IGxpc3QKTGludXgtcm9ja2NoaXBAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5m cmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LXJvY2tjaGlwCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kever Yang Date: Tue, 16 Jul 2019 21:20:20 +0800 Subject: [U-Boot] [PATCH v3 50/57] ram: rk3399: Add LPPDDR4-800 timings inc In-Reply-To: <20190716115745.12585-51-jagan@amarulasolutions.com> References: <20190716115745.12585-1-jagan@amarulasolutions.com> <20190716115745.12585-51-jagan@amarulasolutions.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de On 2019/7/16 下午7:57, Jagan Teki wrote: > LPDDR4 initialization start with at board selected frequency > and then it switches into 400MHz and 800MHz simultaneously to > make the proper sequence work on each channel with associated > training. > > So, add LPDDR4-800 timings inc file in driver area so-that > these timings will take during LPDDR4 initialization phase. > > Signed-off-by: Jagan Teki > Signed-off-by: YouMin Chen Reviewed-by: Kever Yang Thanks,  - Kever