From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753115AbdI1MW3 (ORCPT ); Thu, 28 Sep 2017 08:22:29 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46290 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753052AbdI1MW1 (ORCPT ); Thu, 28 Sep 2017 08:22:27 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 0E9FD302537 Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=ddutile@redhat.com Subject: Re: [PATCH] uio/uio_pci_generic: Add SR-IOV support To: Alexander Duyck , David Woodhouse References: <1506517162.30379.2.camel@infradead.org> <20170927220005.GB23674@bhelgaas-glaptop.roam.corp.google.com> <1506550852.7476.33.camel@infradead.org> Cc: Bjorn Helgaas , Greg Kroah-Hartman , linux-pci , linux-kernel , Alexander Duyck , "Bryant G. Ly" , Bodong Wang , Alex Williamson , "Michael S. Tsirkin" , kvm@vger.kernel.org From: Don Dutile Message-ID: Date: Thu, 28 Sep 2017 08:22:16 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Thu, 28 Sep 2017 12:22:27 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09/27/2017 07:06 PM, Alexander Duyck wrote: > On Wed, Sep 27, 2017 at 3:20 PM, David Woodhouse wrote: >> On Wed, 2017-09-27 at 17:00 -0500, Bjorn Helgaas wrote: >>> >>> >>> IIUC, this question is basically "why doesn't the PCI core enable IOV >>> automatically when it sees an IOV-capable device?" >>> >>> I think one reason is that an admin might want to control the number >>> of VFs we enable (e.g., via 1789382a72a5 ("PCI: SRIOV control and >>> status via sysfs" [1]). But I guess you already know about that, >>> since this patch uses that sysfs path, so maybe I don't understand >>> your question. >> >> >> I mean, why doesn't the PCI core *allow* SR-IOV to be enabled via >> sysfs, unless the driver does this? > > The general idea is that the driver usually has to free up resources > so they can be reassigned to the VF devices. > > For example in the case of the Intel NICs enabling SR-IOV reassigns > the queues to the VFs, and the PF has to be aware that this change is > happening so that it doesn't try to make use of queues that then > belong to the VFs. > > - Alex > After reading Alex's response, I now understand Dave's question better and why the patch won't work in general. In every SRIOV capable device I've run into to date, the PF has to know the VFs are being assigned due to some resource mgmt, if not internal (e.g., switch) configuration reasons. The reasons are often subtle. From the context of the patches (uio), why aren't VFs enabled via user-level sysfs interface? That was provided for user-mgmt apps to have a PCIe-generic/common, device-independent method of VF enablement (read: libvirt for device-assignment of VFs to VMs). This also enables one to manage it at a finer, not-all-or-nothing level, which is good due to bios strengths/weaknesses that various systems have for SRIOV/VF-enablement.