From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68E0CC04EB9 for ; Mon, 3 Dec 2018 09:29:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2C49A20851 for ; Mon, 3 Dec 2018 09:29:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2C49A20851 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726039AbeLCJ3S (ORCPT ); Mon, 3 Dec 2018 04:29:18 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:15630 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725888AbeLCJ3S (ORCPT ); Mon, 3 Dec 2018 04:29:18 -0500 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id B570BE8CAC17B; Mon, 3 Dec 2018 17:29:01 +0800 (CST) Received: from [127.0.0.1] (10.142.63.192) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.408.0; Mon, 3 Dec 2018 17:28:56 +0800 CC: , , , Greg Kroah-Hartman , "Rob Herring" , Mark Rutland , "John Stultz" Subject: Re: [PATCH v1 01/12] dt-bindings: usb: add support for dwc3 controller on HiSilicon SoCs To: Sergei Shtylyov , , , References: <20181203034515.91412-1-chenyu56@huawei.com> <20181203034515.91412-2-chenyu56@huawei.com> <33cda716-d09c-28e7-d4b4-26f246786f5e@huawei.com> <680c5b9f-e2c7-926d-7d10-4ce2cd091282@cogentembedded.com> From: Chen Yu Message-ID: Date: Mon, 3 Dec 2018 17:28:56 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: <680c5b9f-e2c7-926d-7d10-4ce2cd091282@cogentembedded.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [10.142.63.192] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 2018/12/3 16:59, Sergei Shtylyov wrote: > On 03.12.2018 11:51, Chen Yu wrote: > >>>> This patch adds binding descriptions to support the dwc3 controller >>>> on HiSilicon SoCs and boards like the HiKey960. >>>> >>>> Cc: Greg Kroah-Hartman >>>> Cc: Rob Herring >>>> Cc: Mark Rutland >>>> Cc: John Stultz >>>> Signed-off-by: Yu Chen >>>> --- >>>>    .../devicetree/bindings/usb/dwc3-hisi.txt          | 67 ++++++++++++++++++++++ >>>>    1 file changed, 67 insertions(+) >>>>    create mode 100644 Documentation/devicetree/bindings/usb/dwc3-hisi.txt >>>> >>>> diff --git a/Documentation/devicetree/bindings/usb/dwc3-hisi.txt b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt >>>> new file mode 100644 >>>> index 000000000000..d32d2299a0a1 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt >>>> @@ -0,0 +1,67 @@ >>>> +HiSilicon DWC3 USB SoC controller >>>> + >>>> +This file documents the parameters for the dwc3-hisi driver. >>>> + >>>> +Required properties: >>>> +- compatible:    should be "hisilicon,hi3660-dwc3" >>>> +- clocks:    A list of phandle + clock-specifier pairs for the >>>> +        clocks listed in clock-names >>>> +- clock-names:    Specify clock names >>>> +- resets:    list of phandle and reset specifier pairs. >>>> + >>>> +Sub-nodes: >>>> +The dwc3 core should be added as subnode to HiSilicon DWC3 as shown in the >>>> +example below. The DT binding details of dwc3 can be found in: >>>> +Documentation/devicetree/bindings/usb/dwc3.txt >>>> + >>>> +Example: >>>> +    usb3: hisi_dwc3 { >>>> +        compatible = "hisilicon,hi3660-dwc3"; >>>> +        #address-cells = <2>; >>>> +        #size-cells = <2>; >>>> +        ranges; >>>> + >>>> +        clocks = <&crg_ctrl HI3660_CLK_ABB_USB>, >>>> +             <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; >>>> +        clock-names = "clk_usb3phy_ref", "aclk_usb3otg"; >>>> +        assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; >>>> +        assigned-clock-rates = <229000000>; >>>> +        resets = <&crg_rst 0x90 8>, >>>> +             <&crg_rst 0x90 7>, >>>> +             <&crg_rst 0x90 6>, >>>> +             <&crg_rst 0x90 5>; >>>> + >>>> +        dwc3: dwc3@ff100000 { >>> >>>      According to the DT spec, the node names should be generic, not chip specific, i.e. usb@ff100000 in this case. >>> >> >> Do you mean it should be usb@ff100000: dwc3@ff100000 ? > >     dwc3: usb@ff100000 > >    "dwc3:" is a label, not name. I use the node name "dwc3@ff100000" according to Documentation/devicetree/bindings/usb/dwc3.txt and documentations of vendor drivers, i.e. qcom,dwc3.txt, rockchip,dwc3.txt. In these documentations, the dwc3 sub-node name uses "dwc3@xxxxxxxx". I think it is better to be same as the other vendor's dwc3 drivers. > >> Thanks! >> >>> [...] > > MBR, Sergei > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen Yu Subject: Re: [PATCH v1 01/12] dt-bindings: usb: add support for dwc3 controller on HiSilicon SoCs Date: Mon, 3 Dec 2018 17:28:56 +0800 Message-ID: References: <20181203034515.91412-1-chenyu56@huawei.com> <20181203034515.91412-2-chenyu56@huawei.com> <33cda716-d09c-28e7-d4b4-26f246786f5e@huawei.com> <680c5b9f-e2c7-926d-7d10-4ce2cd091282@cogentembedded.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <680c5b9f-e2c7-926d-7d10-4ce2cd091282@cogentembedded.com> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Sergei Shtylyov , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: wangbinghui@hisilicon.com, suzhuangluan@hisilicon.com, kongfei@hisilicon.com, Greg Kroah-Hartman , Rob Herring , Mark Rutland , John Stultz List-Id: devicetree@vger.kernel.org Hi, On 2018/12/3 16:59, Sergei Shtylyov wrote: > On 03.12.2018 11:51, Chen Yu wrote: > >>>> This patch adds binding descriptions to support the dwc3 controller >>>> on HiSilicon SoCs and boards like the HiKey960. >>>> >>>> Cc: Greg Kroah-Hartman >>>> Cc: Rob Herring >>>> Cc: Mark Rutland >>>> Cc: John Stultz >>>> Signed-off-by: Yu Chen >>>> --- >>>>    .../devicetree/bindings/usb/dwc3-hisi.txt          | 67 ++++++++++++++++++++++ >>>>    1 file changed, 67 insertions(+) >>>>    create mode 100644 Documentation/devicetree/bindings/usb/dwc3-hisi.txt >>>> >>>> diff --git a/Documentation/devicetree/bindings/usb/dwc3-hisi.txt b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt >>>> new file mode 100644 >>>> index 000000000000..d32d2299a0a1 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt >>>> @@ -0,0 +1,67 @@ >>>> +HiSilicon DWC3 USB SoC controller >>>> + >>>> +This file documents the parameters for the dwc3-hisi driver. >>>> + >>>> +Required properties: >>>> +- compatible:    should be "hisilicon,hi3660-dwc3" >>>> +- clocks:    A list of phandle + clock-specifier pairs for the >>>> +        clocks listed in clock-names >>>> +- clock-names:    Specify clock names >>>> +- resets:    list of phandle and reset specifier pairs. >>>> + >>>> +Sub-nodes: >>>> +The dwc3 core should be added as subnode to HiSilicon DWC3 as shown in the >>>> +example below. The DT binding details of dwc3 can be found in: >>>> +Documentation/devicetree/bindings/usb/dwc3.txt >>>> + >>>> +Example: >>>> +    usb3: hisi_dwc3 { >>>> +        compatible = "hisilicon,hi3660-dwc3"; >>>> +        #address-cells = <2>; >>>> +        #size-cells = <2>; >>>> +        ranges; >>>> + >>>> +        clocks = <&crg_ctrl HI3660_CLK_ABB_USB>, >>>> +             <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; >>>> +        clock-names = "clk_usb3phy_ref", "aclk_usb3otg"; >>>> +        assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; >>>> +        assigned-clock-rates = <229000000>; >>>> +        resets = <&crg_rst 0x90 8>, >>>> +             <&crg_rst 0x90 7>, >>>> +             <&crg_rst 0x90 6>, >>>> +             <&crg_rst 0x90 5>; >>>> + >>>> +        dwc3: dwc3@ff100000 { >>> >>>      According to the DT spec, the node names should be generic, not chip specific, i.e. usb@ff100000 in this case. >>> >> >> Do you mean it should be usb@ff100000: dwc3@ff100000 ? > >     dwc3: usb@ff100000 > >    "dwc3:" is a label, not name. I use the node name "dwc3@ff100000" according to Documentation/devicetree/bindings/usb/dwc3.txt and documentations of vendor drivers, i.e. qcom,dwc3.txt, rockchip,dwc3.txt. In these documentations, the dwc3 sub-node name uses "dwc3@xxxxxxxx". I think it is better to be same as the other vendor's dwc3 drivers. > >> Thanks! >> >>> [...] > > MBR, Sergei > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v1,01/12] dt-bindings: usb: add support for dwc3 controller on HiSilicon SoCs From: Yu Chen Message-Id: Date: Mon, 3 Dec 2018 17:28:56 +0800 To: Sergei Shtylyov , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: wangbinghui@hisilicon.com, suzhuangluan@hisilicon.com, kongfei@hisilicon.com, Greg Kroah-Hartman , Rob Herring , Mark Rutland , John Stultz List-ID: SGksCgpPbiAyMDE4LzEyLzMgMTY6NTksIFNlcmdlaSBTaHR5bHlvdiB3cm90ZToKPiBPbiAwMy4x Mi4yMDE4IDExOjUxLCBDaGVuIFl1IHdyb3RlOgo+IAo+Pj4+IFRoaXMgcGF0Y2ggYWRkcyBiaW5k aW5nIGRlc2NyaXB0aW9ucyB0byBzdXBwb3J0IHRoZSBkd2MzIGNvbnRyb2xsZXIKPj4+PiBvbiBI aVNpbGljb24gU29DcyBhbmQgYm9hcmRzIGxpa2UgdGhlIEhpS2V5OTYwLgo+Pj4+Cj4+Pj4gQ2M6 IEdyZWcgS3JvYWgtSGFydG1hbiA8Z3JlZ2toQGxpbnV4Zm91bmRhdGlvbi5vcmc+Cj4+Pj4gQ2M6 IFJvYiBIZXJyaW5nIDxyb2JoK2R0QGtlcm5lbC5vcmc+Cj4+Pj4gQ2M6IE1hcmsgUnV0bGFuZCA8 bWFyay5ydXRsYW5kQGFybS5jb20+Cj4+Pj4gQ2M6IEpvaG4gU3R1bHR6IDxqb2huLnN0dWx0ekBs aW5hcm8ub3JnPgo+Pj4+IFNpZ25lZC1vZmYtYnk6IFl1IENoZW4gPGNoZW55dTU2QGh1YXdlaS5j b20+Cj4+Pj4gLS0tCj4+Pj4gwqDCoCAuLi4vZGV2aWNldHJlZS9iaW5kaW5ncy91c2IvZHdjMy1o aXNpLnR4dMKgwqDCoMKgwqDCoMKgwqDCoCB8IDY3ICsrKysrKysrKysrKysrKysrKysrKysKPj4+ PiDCoMKgIDEgZmlsZSBjaGFuZ2VkLCA2NyBpbnNlcnRpb25zKCspCj4+Pj4gwqDCoCBjcmVhdGUg bW9kZSAxMDA2NDQgRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3VzYi9kd2MzLWhp c2kudHh0Cj4+Pj4KPj4+PiBkaWZmIC0tZ2l0IGEvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2Jp bmRpbmdzL3VzYi9kd2MzLWhpc2kudHh0IGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRp bmdzL3VzYi9kd2MzLWhpc2kudHh0Cj4+Pj4gbmV3IGZpbGUgbW9kZSAxMDA2NDQKPj4+PiBpbmRl eCAwMDAwMDAwMDAwMDAuLmQzMmQyMjk5YTBhMQo+Pj4+IC0tLSAvZGV2L251bGwKPj4+PiArKysg Yi9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvdXNiL2R3YzMtaGlzaS50eHQKPj4+ PiBAQCAtMCwwICsxLDY3IEBACj4+Pj4gK0hpU2lsaWNvbiBEV0MzIFVTQiBTb0MgY29udHJvbGxl cgo+Pj4+ICsKPj4+PiArVGhpcyBmaWxlIGRvY3VtZW50cyB0aGUgcGFyYW1ldGVycyBmb3IgdGhl IGR3YzMtaGlzaSBkcml2ZXIuCj4+Pj4gKwo+Pj4+ICtSZXF1aXJlZCBwcm9wZXJ0aWVzOgo+Pj4+ ICstIGNvbXBhdGlibGU6wqDCoMKgIHNob3VsZCBiZSAiaGlzaWxpY29uLGhpMzY2MC1kd2MzIgo+ Pj4+ICstIGNsb2NrczrCoMKgwqAgQSBsaXN0IG9mIHBoYW5kbGUgKyBjbG9jay1zcGVjaWZpZXIg cGFpcnMgZm9yIHRoZQo+Pj4+ICvCoMKgwqDCoMKgwqDCoCBjbG9ja3MgbGlzdGVkIGluIGNsb2Nr LW5hbWVzCj4+Pj4gKy0gY2xvY2stbmFtZXM6wqDCoMKgIFNwZWNpZnkgY2xvY2sgbmFtZXMKPj4+ PiArLSByZXNldHM6wqDCoMKgIGxpc3Qgb2YgcGhhbmRsZSBhbmQgcmVzZXQgc3BlY2lmaWVyIHBh aXJzLgo+Pj4+ICsKPj4+PiArU3ViLW5vZGVzOgo+Pj4+ICtUaGUgZHdjMyBjb3JlIHNob3VsZCBi ZSBhZGRlZCBhcyBzdWJub2RlIHRvIEhpU2lsaWNvbiBEV0MzIGFzIHNob3duIGluIHRoZQo+Pj4+ ICtleGFtcGxlIGJlbG93LiBUaGUgRFQgYmluZGluZyBkZXRhaWxzIG9mIGR3YzMgY2FuIGJlIGZv dW5kIGluOgo+Pj4+ICtEb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvdXNiL2R3YzMu dHh0Cj4+Pj4gKwo+Pj4+ICtFeGFtcGxlOgo+Pj4+ICvCoMKgwqAgdXNiMzogaGlzaV9kd2MzIHsK Pj4+PiArwqDCoMKgwqDCoMKgwqAgY29tcGF0aWJsZSA9ICJoaXNpbGljb24saGkzNjYwLWR3YzMi Owo+Pj4+ICvCoMKgwqDCoMKgwqDCoCAjYWRkcmVzcy1jZWxscyA9IDwyPjsKPj4+PiArwqDCoMKg wqDCoMKgwqAgI3NpemUtY2VsbHMgPSA8Mj47Cj4+Pj4gK8KgwqDCoMKgwqDCoMKgIHJhbmdlczsK Pj4+PiArCj4+Pj4gK8KgwqDCoMKgwqDCoMKgIGNsb2NrcyA9IDwmY3JnX2N0cmwgSEkzNjYwX0NM S19BQkJfVVNCPiwKPj4+PiArwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIDwmY3JnX2N0cmwgSEkz NjYwX0FDTEtfR0FURV9VU0IzT1RHPjsKPj4+PiArwqDCoMKgwqDCoMKgwqAgY2xvY2stbmFtZXMg PSAiY2xrX3VzYjNwaHlfcmVmIiwgImFjbGtfdXNiM290ZyI7Cj4+Pj4gK8KgwqDCoMKgwqDCoMKg IGFzc2lnbmVkLWNsb2NrcyA9IDwmY3JnX2N0cmwgSEkzNjYwX0FDTEtfR0FURV9VU0IzT1RHPjsK Pj4+PiArwqDCoMKgwqDCoMKgwqAgYXNzaWduZWQtY2xvY2stcmF0ZXMgPSA8MjI5MDAwMDAwPjsK Pj4+PiArwqDCoMKgwqDCoMKgwqAgcmVzZXRzID0gPCZjcmdfcnN0IDB4OTAgOD4sCj4+Pj4gK8Kg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoCA8JmNyZ19yc3QgMHg5MCA3PiwKPj4+PiArwqDCoMKgwqDC oMKgwqDCoMKgwqDCoMKgIDwmY3JnX3JzdCAweDkwIDY+LAo+Pj4+ICvCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqAgPCZjcmdfcnN0IDB4OTAgNT47Cj4+Pj4gKwo+Pj4+ICvCoMKgwqDCoMKgwqDCoCBk d2MzOiBkd2MzQGZmMTAwMDAwIHsKPj4+Cj4+PiDCoMKgwqDCoCBBY2NvcmRpbmcgdG8gdGhlIERU IHNwZWMsIHRoZSBub2RlIG5hbWVzIHNob3VsZCBiZSBnZW5lcmljLCBub3QgY2hpcCBzcGVjaWZp YywgaS5lLiB1c2JAZmYxMDAwMDAgaW4gdGhpcyBjYXNlLgo+Pj4KPj4KPj4gRG8geW91IG1lYW4g aXQgc2hvdWxkIGJlIHVzYkBmZjEwMDAwMDogZHdjM0BmZjEwMDAwMCA/Cj4gCj4gwqDCoMKgwqBk d2MzOiB1c2JAZmYxMDAwMDAKPiAKPiDCoMKgICJkd2MzOiIgaXMgYSBsYWJlbCwgbm90IG5hbWUu CgpJIHVzZSB0aGUgbm9kZSBuYW1lICJkd2MzQGZmMTAwMDAwIiBhY2NvcmRpbmcgdG8gRG9jdW1l bnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3VzYi9kd2MzLnR4dAphbmQgZG9jdW1lbnRhdGlv bnMgb2YgdmVuZG9yIGRyaXZlcnMsIGkuZS4gcWNvbSxkd2MzLnR4dCwgcm9ja2NoaXAsZHdjMy50 eHQuCgpJbiB0aGVzZSBkb2N1bWVudGF0aW9ucywgdGhlIGR3YzMgc3ViLW5vZGUgbmFtZSB1c2Vz ICJkd2MzQHh4eHh4eHh4Ii4KCkkgdGhpbmsgaXQgaXMgYmV0dGVyIHRvIGJlIHNhbWUgYXMgdGhl IG90aGVyIHZlbmRvcidzIGR3YzMgZHJpdmVycy4KPiAKPj4gVGhhbmtzIQo+Pgo+Pj4gWy4uLl0K PiAKPiBNQlIsIFNlcmdlaQo+IAo+IC4KPgo=