From: Patrice CHOTARD <patrice.chotard@foss.st.com>
To: Marek Vasut <marex@denx.de>, <u-boot@lists.denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Subject: Re: [PATCH 2/2] ARM: dts: stm32: Synchronize DHCOM DTs with Linux 5.15.12
Date: Mon, 24 Jan 2022 13:17:19 +0100 [thread overview]
Message-ID: <bbe409a0-eb52-d708-487e-5b3db2c3c1d2@foss.st.com> (raw)
In-Reply-To: <20211230224647.328340-2-marex@denx.de>
Hi Marek
On 12/30/21 23:46, Marek Vasut wrote:
> Synchronize DH DHCOM DTs with Linux commit 25960cafa06e ("Linux 5.15.12").
> There is no functional change to the resulting DTs. The eeprom0 alias and
> PHY reset GPIO are now reinstated in SoM u-boot dtsi.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
> arch/arm/dts/stm32mp15xx-dhcom-drc02.dts | 162 +-------
> arch/arm/dts/stm32mp15xx-dhcom-drc02.dtsi | 165 ++++++++
> .../dts/stm32mp15xx-dhcom-pdk2-u-boot.dtsi | 4 +
> arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts | 14 +-
> arch/arm/dts/stm32mp15xx-dhcom-pdk2.dtsi | 325 +++++++++++++++
> .../dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi | 6 +-
> arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts | 88 +---
> arch/arm/dts/stm32mp15xx-dhcom-picoitx.dtsi | 147 +++++++
> ...-dhcom.dtsi => stm32mp15xx-dhcom-som.dtsi} | 387 +++++++++++-------
> arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 43 +-
> 10 files changed, 917 insertions(+), 424 deletions(-)
> create mode 100644 arch/arm/dts/stm32mp15xx-dhcom-drc02.dtsi
> create mode 100644 arch/arm/dts/stm32mp15xx-dhcom-pdk2.dtsi
> create mode 100644 arch/arm/dts/stm32mp15xx-dhcom-picoitx.dtsi
> rename arch/arm/dts/{stm32mp15xx-dhcom.dtsi => stm32mp15xx-dhcom-som.dtsi} (56%)
>
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
> index 4948ccd4014..1ef9ac29cea 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
> @@ -2,166 +2,14 @@
> /*
> * Copyright (C) 2020 Marek Vasut <marex@denx.de>
> */
> +/dts-v1/;
>
> -#include "stm32mp15xx-dhcom.dtsi"
> +#include "stm32mp151.dtsi"
> +#include "stm32mp15xc.dtsi"
> +#include "stm32mp15xx-dhcom-som.dtsi"
> +#include "stm32mp15xx-dhcom-drc02.dtsi"
>
> / {
> model = "DH Electronics STM32MP15xx DHCOM DRC02";
> compatible = "dh,stm32mp15xx-dhcom-drc02", "st,stm32mp1xx";
> -
> - aliases {
> - serial0 = &uart4;
> - serial1 = &usart3;
> - serial2 = &uart8;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -};
> -
> -&adc {
> - status = "disabled";
> -};
> -
> -&dac {
> - status = "disabled";
> -};
> -
> -&gpiob {
> - /*
> - * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
> - * GPIO line, however the STM32 UART driver assumes RX happens
> - * during TX anyway and that it only controls drive enable DE
> - * line. Hence, the RX is always enabled here.
> - */
> - usb-hub {
> - gpio-hog;
> - gpios = <8 0>;
> - output-high;
> - line-name = "rs485-rx-en";
> - };
> -};
> -
> -&gpiod {
> - gpio-line-names = "", "", "", "",
> - "", "", "", "",
> - "", "", "", "Out1",
> - "Out2", "", "", "";
> -};
> -
> -&gpioi {
> - gpio-line-names = "In1", "", "", "",
> - "", "", "", "",
> - "In2", "", "", "",
> - "", "", "", "";
> -
> - /*
> - * NOTE: The USB Hub on the DRC02 needs a reset signal to be
> - * pulled high in order to be detected by the USB Controller.
> - * This signal should be handled by USB power sequencing in
> - * order to reset the Hub when USB bus is powered down, but
> - * so far there is no such functionality.
> - */
> - usb-hub {
> - gpio-hog;
> - gpios = <2 0>;
> - output-high;
> - line-name = "usb-hub-reset";
> - };
> -};
> -
> -&i2c2 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c2_pins_a>;
> - i2c-scl-rising-time-ns = <185>;
> - i2c-scl-falling-time-ns = <20>;
> - status = "okay";
> - /* spare dmas for other usage */
> - /delete-property/dmas;
> - /delete-property/dma-names;
> - status = "okay";
> -
> - eeprom@50 {
> - compatible = "atmel,24c04";
> - reg = <0x50>;
> - pagesize = <16>;
> - };
> -};
> -
> -&i2c5 { /* TP7/TP8 */
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c5_pins_a>;
> - i2c-scl-rising-time-ns = <185>;
> - i2c-scl-falling-time-ns = <20>;
> - status = "okay";
> - /* spare dmas for other usage */
> - /delete-property/dmas;
> - /delete-property/dma-names;
> -};
> -
> -&sdmmc3 {
> - /*
> - * On DRC02, the SoM does not have SDIO WiFi. The pins
> - * are used for on-board microSD slot instead.
> - */
> - pinctrl-names = "default", "opendrain", "sleep";
> - pinctrl-0 = <&sdmmc3_b4_pins_a>;
> - pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
> - pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
> - cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
> - disable-wp;
> - st,neg-edge;
> - bus-width = <4>;
> - vmmc-supply = <&v3v3>;
> - vqmmc-supply = <&v3v3>;
> - mmc-ddr-3_3v;
> - status = "okay";
> -};
> -
> -&spi1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&spi1_pins_a>;
> - cs-gpios = <&gpioz 3 0>;
> - /* Use PIO for the display */
> - /delete-property/dmas;
> - /delete-property/dma-names;
> - status = "disabled"; /* Enable once there is display driver */
> - /*
> - * Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are
> - * also connected to the display board connector.
> - */
> -};
> -
> -&usart3 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&usart3_pins_a>;
> - status = "okay";
> -};
> -
> -/*
> - * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
> - * however the STM32MP1 pinmux cannot map them to UART4 .
> - */
> -
> -&uart8 { /* RS485 */
> - pinctrl-names = "default";
> - pinctrl-0 = <&uart8_pins_a>;
> - rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>;
> - status = "okay";
> -};
> -
> -&usbh_ehci {
> - phys = <&usbphyc_port0>;
> - status = "okay";
> -};
> -
> -&usbphyc {
> - status = "okay";
> -};
> -
> -&usbphyc_port0 {
> - phy-supply = <&vdd_usb>;
> - vdda1v1-supply = <®11>;
> - vdda1v8-supply = <®18>;
> };
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dtsi
> new file mode 100644
> index 00000000000..4b10b013ffd
> --- /dev/null
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dtsi
> @@ -0,0 +1,165 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
> +/*
> + * Copyright (C) 2020 Marek Vasut <marex@denx.de>
> + */
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/pwm/pwm.h>
> +
> +/ {
> + aliases {
> + serial0 = &uart4;
> + serial1 = &usart3;
> + serial2 = &uart8;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
> +
> +&adc {
> + status = "disabled";
> +};
> +
> +&dac {
> + status = "disabled";
> +};
> +
> +&gpiob {
> + /*
> + * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
> + * GPIO line, however the STM32 UART driver assumes RX happens
> + * during TX anyway and that it only controls drive enable DE
> + * line. Hence, the RX is always enabled here.
> + */
> + rs485-rx-en-hog {
> + gpio-hog;
> + gpios = <8 0>;
> + output-low;
> + line-name = "rs485-rx-en";
> + };
> +};
> +
> +&gpiod {
> + gpio-line-names = "", "", "", "",
> + "", "", "DHCOM-B", "",
> + "", "", "", "DRC02-Out1",
> + "DRC02-Out2", "", "", "";
> +};
> +
> +&gpioi {
> + gpio-line-names = "DRC02-In1", "DHCOM-O", "DHCOM-H", "DHCOM-I",
> + "DHCOM-R", "DHCOM-M", "", "",
> + "DRC02-In2", "", "", "",
> + "", "", "", "";
> +
> + /*
> + * NOTE: The USB Hub on the DRC02 needs a reset signal to be
> + * pulled high in order to be detected by the USB Controller.
> + * This signal should be handled by USB power sequencing in
> + * order to reset the Hub when USB bus is powered down, but
> + * so far there is no such functionality.
> + */
> + usb-hub-hog {
> + gpio-hog;
> + gpios = <2 0>;
> + output-high;
> + line-name = "usb-hub-reset";
> + };
> +};
> +
> +&i2c2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins_a>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> + status = "okay";
> +
> + eeprom@50 {
> + compatible = "atmel,24c04";
> + reg = <0x50>;
> + pagesize = <16>;
> + };
> +};
> +
> +&i2c4 {
> + touchscreen@49 {
> + status = "disabled";
> + };
> +};
> +
> +&i2c5 { /* TP7/TP8 */
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c5_pins_a>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&sdmmc3 {
> + /*
> + * On DRC02, the SoM does not have SDIO WiFi. The pins
> + * are used for on-board microSD slot instead.
> + */
> + /delete-property/broken-cd;
> + cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
> + disable-wp;
> +};
> +
> +&spi1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi1_pins_a>;
> + cs-gpios = <&gpioz 3 0>;
> + /* Use PIO for the display */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> + status = "disabled"; /* Enable once there is display driver */
> + /*
> + * Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are
> + * also connected to the display board connector.
> + */
> +};
> +
> +&usart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&usart3_pins_a>;
> + status = "okay";
> +};
> +
> +/*
> + * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
> + * however the STM32MP1 pinmux cannot map them to UART4 .
> + */
> +
> +&uart8 { /* RS485 */
> + linux,rs485-enabled-at-boot-time;
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart8_pins_a>;
> + rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +};
> +
> +&usbh_ehci {
> + phys = <&usbphyc_port0>;
> + status = "okay";
> +};
> +
> +&usbphyc {
> + status = "okay";
> +};
> +
> +&usbphyc_port0 {
> + phy-supply = <&vdd_usb>;
> +};
> +
> +&usbphyc_port1 {
> + phy-supply = <&vdd_usb>;
> +};
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-pdk2-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-pdk2-u-boot.dtsi
> index 12f89b33987..2324926f9df 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-pdk2-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-pdk2-u-boot.dtsi
> @@ -4,3 +4,7 @@
> */
>
> #include "stm32mp15xx-dhcom-u-boot.dtsi"
> +
> +&usbotg_hs {
> + dr_mode = "peripheral";
> +};
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts b/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts
> index 52a77c41231..e2e01e2146c 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts
> @@ -2,18 +2,14 @@
> /*
> * Copyright (C) 2019 Marek Vasut <marex@denx.de>
> */
> +/dts-v1/;
>
> -#include "stm32mp15xx-dhcom.dtsi"
> +#include "stm32mp151.dtsi"
> +#include "stm32mp15xc.dtsi"
> +#include "stm32mp15xx-dhcom-som.dtsi"
> +#include "stm32mp15xx-dhcom-pdk2.dtsi"
>
> / {
> model = "STMicroelectronics STM32MP15xx DHCOM Premium Developer Kit (2)";
> compatible = "dh,stm32mp15xx-dhcom-pdk2", "st,stm32mp15x";
> -
> - aliases {
> - serial0 = &uart4;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> };
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dtsi
> new file mode 100644
> index 00000000000..fbf3826933e
> --- /dev/null
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dtsi
> @@ -0,0 +1,325 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
> +/*
> + * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
> + */
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/pwm/pwm.h>
> +
> +/ {
> + aliases {
> + serial0 = &uart4;
> + serial1 = &usart3;
> + serial2 = &uart8;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + clk_ext_audio_codec: clock-codec {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24000000>;
> + };
> +
> + display_bl: display-bl {
> + compatible = "pwm-backlight";
> + pwms = <&pwm2 3 500000 PWM_POLARITY_INVERTED>;
> + brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
> + default-brightness-level = <8>;
> + enable-gpios = <&gpioi 0 GPIO_ACTIVE_HIGH>;
> + power-supply = <®_panel_bl>;
> + status = "okay";
> + };
> +
> + gpio-keys-polled {
> + compatible = "gpio-keys-polled";
> + poll-interval = <20>;
> +
> + /*
> + * The EXTi IRQ line 3 is shared with ethernet,
> + * so mark this as polled GPIO key.
> + */
> + button-0 {
> + label = "TA1-GPIO-A";
> + linux,code = <KEY_A>;
> + gpios = <&gpiof 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + /*
> + * The EXTi IRQ line 6 is shared with touchscreen,
> + * so mark this as polled GPIO key.
> + */
> + button-1 {
> + label = "TA2-GPIO-B";
> + linux,code = <KEY_B>;
> + gpios = <&gpiod 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + /*
> + * The EXTi IRQ line 0 is shared with PMIC,
> + * so mark this as polled GPIO key.
> + */
> + button-2 {
> + label = "TA3-GPIO-C";
> + linux,code = <KEY_C>;
> + gpios = <&gpiog 0 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + button-3 {
> + label = "TA4-GPIO-D";
> + linux,code = <KEY_D>;
> + gpios = <&gpiod 12 GPIO_ACTIVE_LOW>;
> + wakeup-source;
> + };
> + };
> +
> + led {
> + compatible = "gpio-leds";
> +
> + led-0 {
> + label = "green:led5";
> + gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>;
> + default-state = "off";
> + status = "disabled";
> + };
> +
> + led-1 {
> + label = "green:led6";
> + gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
> + default-state = "off";
> + };
> +
> + led-2 {
> + label = "green:led7";
> + gpios = <&gpioi 2 GPIO_ACTIVE_HIGH>;
> + default-state = "off";
> + };
> +
> + led-3 {
> + label = "green:led8";
> + gpios = <&gpioi 3 GPIO_ACTIVE_HIGH>;
> + default-state = "off";
> + };
> + };
> +
> + panel {
> + compatible = "edt,etm0700g0edh6";
> + backlight = <&display_bl>;
> + power-supply = <®_panel_bl>;
> +
> + port {
> + lcd_panel_in: endpoint {
> + remote-endpoint = <&lcd_display_out>;
> + };
> + };
> + };
> +
> + reg_panel_bl: regulator-panel-bl {
> + compatible = "regulator-fixed";
> + regulator-name = "panel_backlight";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <®_panel_supply>;
> + };
> +
> + reg_panel_supply: regulator-panel-supply {
> + compatible = "regulator-fixed";
> + regulator-name = "panel_supply";
> + regulator-min-microvolt = <24000000>;
> + regulator-max-microvolt = <24000000>;
> + };
> +
> + sound {
> + compatible = "audio-graph-card";
> + routing =
> + "MIC_IN", "Capture",
> + "Capture", "Mic Bias",
> + "Playback", "HP_OUT";
> + dais = <&sai2a_port &sai2b_port>;
> + status = "okay";
> + };
> +};
> +
> +&cec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&cec_pins_a>;
> + status = "okay";
> +};
> +
> +&i2c2 { /* Header X22 */
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins_a>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> + status = "okay";
> +};
> +
> +&i2c5 { /* Header X21 */
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c5_pins_a>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + sgtl5000: codec@a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + #sound-dai-cells = <0>;
> + clocks = <&clk_ext_audio_codec>;
> + VDDA-supply = <&v3v3>;
> + VDDIO-supply = <&vdd>;
> +
> + sgtl5000_port: port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sgtl5000_tx_endpoint: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&sai2a_endpoint>;
> + frame-master = <&sgtl5000_tx_endpoint>;
> + bitclock-master = <&sgtl5000_tx_endpoint>;
> + };
> +
> + sgtl5000_rx_endpoint: endpoint@1 {
> + reg = <1>;
> + remote-endpoint = <&sai2b_endpoint>;
> + frame-master = <&sgtl5000_rx_endpoint>;
> + bitclock-master = <&sgtl5000_rx_endpoint>;
> + };
> + };
> +
> + };
> +
> + touchscreen@38 {
> + compatible = "edt,edt-ft5406";
> + reg = <0x38>;
> + interrupt-parent = <&gpioc>;
> + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
> + };
> +};
> +
> +<dc {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <<dc_pins_b>;
> + pinctrl-1 = <<dc_sleep_pins_b>;
> + status = "okay";
> +
> + port {
> + lcd_display_out: endpoint {
> + remote-endpoint = <&lcd_panel_in>;
> + };
> + };
> +};
> +
> +&sai2 {
> + clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
> + clock-names = "pclk", "x8k", "x11k";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sai2a_pins_b &sai2b_pins_b>;
> + pinctrl-1 = <&sai2a_sleep_pins_b &sai2b_sleep_pins_b>;
> + status = "okay";
> +
> + sai2a: audio-controller@4400b004 {
> + #clock-cells = <0>;
> + dma-names = "tx";
> + clocks = <&rcc SAI2_K>;
> + clock-names = "sai_ck";
> + status = "okay";
> +
> + sai2a_port: port {
> + sai2a_endpoint: endpoint {
> + remote-endpoint = <&sgtl5000_tx_endpoint>;
> + format = "i2s";
> + mclk-fs = <512>;
> + dai-tdm-slot-num = <2>;
> + dai-tdm-slot-width = <16>;
> + };
> + };
> + };
> +
> + sai2b: audio-controller@4400b024 {
> + dma-names = "rx";
> + st,sync = <&sai2a 2>;
> + clocks = <&rcc SAI2_K>, <&sai2a>;
> + clock-names = "sai_ck", "MCLK";
> + status = "okay";
> +
> + sai2b_port: port {
> + sai2b_endpoint: endpoint {
> + remote-endpoint = <&sgtl5000_rx_endpoint>;
> + format = "i2s";
> + mclk-fs = <512>;
> + dai-tdm-slot-num = <2>;
> + dai-tdm-slot-width = <16>;
> + };
> + };
> + };
> +};
> +
> +&timers2 {
> + /* spare dmas for other usage (un-delete to enable pwm capture) */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> + status = "okay";
> + pwm2: pwm {
> + pinctrl-0 = <&pwm2_pins_a>;
> + pinctrl-names = "default";
> + status = "okay";
> + };
> + timer@1 {
> + status = "okay";
> + };
> +};
> +
> +&usart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&usart3_pins_a>;
> + status = "okay";
> +};
> +
> +&uart8 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>;
> + uart-has-rtscts;
> + status = "okay";
> +};
> +
> +&usbh_ehci {
> + phys = <&usbphyc_port0>;
> + status = "okay";
> +};
> +
> +&usbotg_hs {
> + dr_mode = "otg";
> + pinctrl-0 = <&usbotg_hs_pins_a>;
> + pinctrl-names = "default";
> + phy-names = "usb2-phy";
> + phys = <&usbphyc_port1 0>;
> + vbus-supply = <&vbus_otg>;
> + status = "okay";
> +};
> +
> +&usbphyc {
> + status = "okay";
> +};
> +
> +&usbphyc_port0 {
> + phy-supply = <&vdd_usb>;
> +};
> +
> +&usbphyc_port1 {
> + phy-supply = <&vdd_usb>;
> +};
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi
> index 3cac663d987..5bc6698f87f 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-picoitx-u-boot.dtsi
> @@ -11,4 +11,8 @@
> };
> };
>
> -/delete-node/ &ksz8851;
> +/delete-node/ &ks8851;
> +
> +&usbotg_hs {
> + dr_mode = "peripheral";
> +};
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts b/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts
> index 59d13713d88..06770b47873 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts
> @@ -2,92 +2,14 @@
> /*
> * Copyright (C) 2020 Marek Vasut <marex@denx.de>
> */
> +/dts-v1/;
>
> -#include "stm32mp15xx-dhcom.dtsi"
> +#include "stm32mp157.dtsi"
> +#include "stm32mp15xc.dtsi"
> +#include "stm32mp15xx-dhcom-som.dtsi"
> +#include "stm32mp15xx-dhcom-picoitx.dtsi"
>
> / {
> model = "DH Electronics STM32MP15xx DHCOM PicoITX";
> compatible = "dh,stm32mp15xx-dhcom-picoitx", "st,stm32mp1xx";
> -
> - aliases {
> - serial0 = &uart4;
> - serial1 = &usart3;
> - serial2 = &uart8;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -};
> -
> -&adc {
> - status = "disabled";
> -};
> -
> -&dac {
> - status = "disabled";
> -};
> -
> -&gpioa {
> - /*
> - * NOTE: The USB Port on the PicoITX needs a PWR_EN signal to enable
> - * port power. This signal should be handled by USB power sequencing
> - * in order to turn on port power when USB bus is powered up, but so
> - * far there is no such functionality.
> - */
> - usb-port-power {
> - gpio-hog;
> - gpios = <13 0>;
> - output-low;
> - line-name = "usb-port-power";
> - };
> -};
> -
> -&i2c2 { /* On board-to-board connector (optional) */
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c2_pins_a>;
> - i2c-scl-rising-time-ns = <185>;
> - i2c-scl-falling-time-ns = <20>;
> - status = "okay";
> - /* spare dmas for other usage */
> - /delete-property/dmas;
> - /delete-property/dma-names;
> -};
> -
> -&i2c5 { /* On board-to-board connector */
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c5_pins_a>;
> - i2c-scl-rising-time-ns = <185>;
> - i2c-scl-falling-time-ns = <20>;
> - status = "okay";
> - /* spare dmas for other usage */
> - /delete-property/dmas;
> - /delete-property/dma-names;
> -};
> -
> -&usart3 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&usart3_pins_a>;
> - status = "okay";
> -};
> -
> -&uart8 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&uart8_pins_a>;
> - status = "okay";
> -};
> -
> -&usbh_ehci {
> - phys = <&usbphyc_port0>;
> - status = "okay";
> -};
> -
> -&usbphyc {
> - status = "okay";
> -};
> -
> -&usbphyc_port0 {
> - phy-supply = <&vdd_usb>;
> - vdda1v1-supply = <®11>;
> - vdda1v8-supply = <®18>;
> };
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dtsi
> new file mode 100644
> index 00000000000..ba816ef8b9b
> --- /dev/null
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dtsi
> @@ -0,0 +1,147 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
> +/*
> + * Copyright (C) 2020 Marek Vasut <marex@denx.de>
> + */
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/pwm/pwm.h>
> +
> +/ {
> + aliases {
> + serial0 = &uart4;
> + serial1 = &usart3;
> + serial2 = &uart8;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + led {
> + compatible = "gpio-leds";
> +
> + led-0 {
> + label = "yellow:led";
> + gpios = <&gpioi 3 GPIO_ACTIVE_HIGH>;
> + default-state = "off";
> + };
> + };
> +};
> +
> +&adc {
> + status = "disabled";
> +};
> +
> +&dac {
> + status = "disabled";
> +};
> +
> +&fmc {
> + status = "disabled";
> +};
> +
> +&gpioa {
> + /*
> + * NOTE: The USB Port on the PicoITX needs a PWR_EN signal to enable
> + * port power. This signal should be handled by USB power sequencing
> + * in order to turn on port power when USB bus is powered up, but so
> + * far there is no such functionality.
> + */
> + usb-port-power-hog {
> + gpio-hog;
> + gpios = <13 0>;
> + output-low;
> + line-name = "usb-port-power";
> + };
> +};
> +
> +&gpioc {
> + gpio-line-names = "", "", "", "",
> + "", "", "PicoITX-In1", "",
> + "", "", "", "",
> + "", "", "", "";
> +};
> +
> +&gpiod {
> + gpio-line-names = "", "", "", "",
> + "", "", "DHCOM-B", "",
> + "", "", "", "PicoITX-Out1",
> + "PicoITX-Out2", "", "", "";
> +};
> +
> +&gpiog {
> + gpio-line-names = "PicoITX-In2", "", "", "",
> + "", "", "", "",
> + "DHCOM-L", "", "", "",
> + "", "", "", "";
> +};
> +
> +&i2c2 { /* On board-to-board connector (optional) */
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins_a>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&i2c5 { /* On board-to-board connector */
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c5_pins_a>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&ksz8851 {
> + status = "disabled";
> +};
> +
> +&usart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&usart3_pins_a>;
> + status = "okay";
> +};
> +
> +&uart8 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>;
> + status = "okay";
> +};
> +
> +&usbh_ehci {
> + phys = <&usbphyc_port0>;
> + status = "okay";
> +};
> +
> +&usbh_ohci {
> + phys = <&usbphyc_port0>;
> + status = "okay";
> +};
> +
> +&usbotg_hs {
> + dr_mode = "otg";
> + pinctrl-0 = <&usbotg_hs_pins_a>;
> + pinctrl-names = "default";
> + phy-names = "usb2-phy";
> + phys = <&usbphyc_port1 0>;
> + vbus-supply = <&vbus_otg>;
> + status = "okay";
> +};
> +
> +&usbphyc {
> + status = "okay";
> +};
> +
> +&usbphyc_port0 {
> + phy-supply = <&vdd_usb>;
> +};
> +
> +&usbphyc_port1 {
> + phy-supply = <&vdd_usb>;
> +};
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-som.dtsi
> similarity index 56%
> rename from arch/arm/dts/stm32mp15xx-dhcom.dtsi
> rename to arch/arm/dts/stm32mp15xx-dhcom-som.dtsi
> index a1d1b8dec76..8c41f819f77 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom.dtsi
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-som.dtsi
> @@ -1,11 +1,8 @@
> // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> /*
> - * Copyright (C) 2019 Marek Vasut <marex@denx.de>
> + * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
> */
> -/dts-v1/;
>
> -#include "stm32mp157.dtsi"
> -#include "stm32mp15xc.dtsi"
> #include "stm32mp15-pinctrl.dtsi"
> #include "stm32mp15xxaa-pinctrl.dtsi"
> #include <dt-bindings/gpio/gpio.h>
> @@ -13,8 +10,10 @@
>
> / {
> aliases {
> - eeprom0 = &eeprom0;
> ethernet0 = ðernet0;
> + ethernet1 = &ksz8851;
> + rtc0 = &hwrtc;
> + rtc1 = &rtc;
> };
>
> memory@c0000000 {
> @@ -22,6 +21,48 @@
> reg = <0xC0000000 0x40000000>;
> };
>
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + mcuram2: mcuram2@10000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x10000000 0x40000>;
> + no-map;
> + };
> +
> + vdev0vring0: vdev0vring0@10040000 {
> + compatible = "shared-dma-pool";
> + reg = <0x10040000 0x1000>;
> + no-map;
> + };
> +
> + vdev0vring1: vdev0vring1@10041000 {
> + compatible = "shared-dma-pool";
> + reg = <0x10041000 0x1000>;
> + no-map;
> + };
> +
> + vdev0buffer: vdev0buffer@10042000 {
> + compatible = "shared-dma-pool";
> + reg = <0x10042000 0x4000>;
> + no-map;
> + };
> +
> + mcuram: mcuram@30000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x30000000 0x40000>;
> + no-map;
> + };
> +
> + retram: retram@38000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x38000000 0x10000>;
> + no-map;
> + };
> + };
> +
> ethernet_vio: vioregulator {
> compatible = "regulator-fixed";
> regulator-name = "vio";
> @@ -30,20 +71,45 @@
> gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
> regulator-always-on;
> regulator-boot-on;
> + vin-supply = <&vdd>;
> };
> };
>
> -&cec {
> - pinctrl-names = "default";
> - pinctrl-0 = <&cec_pins_a>;
> +&adc {
> + vdd-supply = <&vdd>;
> + vdda-supply = <&vdda>;
> + vref-supply = <&vdda>;
> status = "okay";
> +
> + adc1: adc@0 {
> + st,min-sample-time-nsecs = <5000>;
> + st,adc-channels = <0>;
> + status = "okay";
> + };
> +
> + adc2: adc@100 {
> + st,adc-channels = <1>;
> + st,min-sample-time-nsecs = <5000>;
> + status = "okay";
> + };
> };
>
> -&dcmi {
> +&crc1 {
> status = "okay";
> - pinctrl-names = "default", "sleep";
> - pinctrl-0 = <&dcmi_pins_a>;
> - pinctrl-1 = <&dcmi_sleep_pins_a>;
> +};
> +
> +&dac {
> + pinctrl-names = "default";
> + pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
> + vref-supply = <&vdda>;
> + status = "okay";
> +
> + dac1: dac@1 {
> + status = "okay";
> + };
> + dac2: dac@2 {
> + status = "okay";
> + };
> };
>
> &dts {
> @@ -53,12 +119,12 @@
> ðernet0 {
> status = "okay";
> pinctrl-0 = <ðernet0_rmii_pins_a>;
> - pinctrl-1 = <ðernet0_rmii_pins_sleep_a>;
> + pinctrl-1 = <ðernet0_rmii_sleep_pins_a>;
> pinctrl-names = "default", "sleep";
> phy-mode = "rmii";
> max-speed = <100>;
> phy-handle = <&phy0>;
> - phy-reset-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>;
> + st,eth-ref-clk-sel;
>
> mdio0 {
> #address-cells = <1>;
> @@ -67,16 +133,112 @@
>
> phy0: ethernet-phy@1 {
> reg = <1>;
> + /* LAN8710Ai */
> + compatible = "ethernet-phy-id0007.c0f0",
> + "ethernet-phy-ieee802.3-c22";
> + clocks = <&rcc ETHCK_K>;
> + reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
> + reset-assert-us = <500>;
> + reset-deassert-us = <500>;
> + smsc,disable-energy-detect;
> + interrupt-parent = <&gpioi>;
> + interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
> };
> };
> };
>
> -&i2c2 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c2_pins_a>;
> - i2c-scl-rising-time-ns = <185>;
> - i2c-scl-falling-time-ns = <20>;
> +&fmc {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&fmc_pins_b>;
> + pinctrl-1 = <&fmc_sleep_pins_b>;
> status = "okay";
> +
> + ksz8851: ethernet@1,0 {
> + compatible = "micrel,ks8851-mll";
> + reg = <1 0x0 0x2>, <1 0x2 0x20000>;
> + interrupt-parent = <&gpioc>;
> + interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
> + bank-width = <2>;
> +
> + /* Timing values are in nS */
> + st,fmc2-ebi-cs-mux-enable;
> + st,fmc2-ebi-cs-transaction-type = <4>;
> + st,fmc2-ebi-cs-buswidth = <16>;
> + st,fmc2-ebi-cs-address-setup-ns = <5>;
> + st,fmc2-ebi-cs-address-hold-ns = <5>;
> + st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
> + st,fmc2-ebi-cs-data-setup-ns = <45>;
> + st,fmc2-ebi-cs-data-hold-ns = <1>;
> + st,fmc2-ebi-cs-write-address-setup-ns = <5>;
> + st,fmc2-ebi-cs-write-address-hold-ns = <5>;
> + st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>;
> + st,fmc2-ebi-cs-write-data-setup-ns = <45>;
> + st,fmc2-ebi-cs-write-data-hold-ns = <1>;
> + };
> +};
> +
> +&gpioa {
> + gpio-line-names = "", "", "", "",
> + "", "", "DHCOM-K", "",
> + "", "", "", "",
> + "", "", "", "";
> +};
> +
> +&gpiob {
> + gpio-line-names = "", "", "", "",
> + "", "", "", "",
> + "DHCOM-Q", "", "", "",
> + "", "", "", "";
> +};
> +
> +&gpioc {
> + gpio-line-names = "", "", "", "",
> + "", "", "DHCOM-E", "",
> + "", "", "", "",
> + "", "", "", "";
> + status = "okay";
> +};
> +
> +&gpiod {
> + gpio-line-names = "", "", "", "",
> + "", "", "DHCOM-B", "",
> + "", "", "", "DHCOM-F",
> + "DHCOM-D", "", "", "";
> +};
> +
> +&gpioe {
> + gpio-line-names = "", "", "", "",
> + "", "", "DHCOM-P", "",
> + "", "", "", "",
> + "", "", "", "";
> +};
> +
> +&gpiof {
> + gpio-line-names = "", "", "", "DHCOM-A",
> + "", "", "", "",
> + "", "", "", "",
> + "", "", "", "";
> +};
> +
> +&gpiog {
> + gpio-line-names = "DHCOM-C", "", "", "",
> + "", "", "", "",
> + "DHCOM-L", "", "", "",
> + "", "", "", "";
> +};
> +
> +&gpioh {
> + gpio-line-names = "", "", "", "",
> + "", "", "", "DHCOM-N",
> + "DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U",
> + "DHCOM-T", "", "DHCOM-S", "";
> +};
> +
> +&gpioi {
> + gpio-line-names = "DHCOM-G", "DHCOM-O", "DHCOM-H", "DHCOM-I",
> + "DHCOM-R", "DHCOM-M", "", "",
> + "", "", "", "",
> + "", "", "", "";
> };
>
> &i2c4 {
> @@ -89,6 +251,11 @@
> /delete-property/dmas;
> /delete-property/dma-names;
>
> + hwrtc: rtc@32 {
> + compatible = "microcrystal,rv8803";
> + reg = <0x32>;
> + };
> +
> pmic: stpmic@33 {
> compatible = "st,stpmic1";
> reg = <0x33>;
> @@ -146,6 +313,7 @@
>
> vdda: ldo1 {
> regulator-name = "vdda";
> + regulator-always-on;
> regulator-min-microvolt = <2900000>;
> regulator-max-microvolt = <2900000>;
> interrupts = <IT_CURLIM_LDO1 0>;
> @@ -168,8 +336,6 @@
>
> vdd_usb: ldo4 {
> regulator-name = "vdd_usb";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> interrupts = <IT_CURLIM_LDO4 0>;
> };
>
> @@ -191,24 +357,23 @@
> vref_ddr: vref_ddr {
> regulator-name = "vref_ddr";
> regulator-always-on;
> - regulator-over-current-protection;
> };
>
> - bst_out: boost {
> + bst_out: boost {
> regulator-name = "bst_out";
> interrupts = <IT_OCP_BOOST 0>;
> - };
> + };
>
> vbus_otg: pwr_sw1 {
> regulator-name = "vbus_otg";
> interrupts = <IT_OCP_OTG 0>;
> - };
> + };
>
> - vbus_sw: pwr_sw2 {
> + vbus_sw: pwr_sw2 {
> regulator-name = "vbus_sw";
> interrupts = <IT_OCP_SWOUT 0>;
> - regulator-active-discharge;
> - };
> + regulator-active-discharge = <1>;
> + };
> };
>
> onkey {
> @@ -225,21 +390,20 @@
> };
> };
>
> - eeprom0: eeprom@50 {
> + touchscreen@49 {
> + compatible = "ti,tsc2004";
> + reg = <0x49>;
> + vio-supply = <&v3v3>;
> + interrupts-extended = <&gpioh 15 IRQ_TYPE_EDGE_FALLING>;
> + };
> +
> + eeprom@50 {
> compatible = "atmel,24c02";
> reg = <0x50>;
> pagesize = <16>;
> };
> };
>
> -&i2c5 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c5_pins_a>;
> - i2c-scl-rising-time-ns = <185>;
> - i2c-scl-falling-time-ns = <20>;
> - status = "okay";
> -};
> -
> &ipcc {
> status = "okay";
> };
> @@ -250,8 +414,12 @@
> };
>
> &m4_rproc {
> + memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
> + <&vdev0vring1>, <&vdev0buffer>;
> mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
> mbox-names = "vq0", "vq1", "shutdown";
> + interrupt-parent = <&exti>;
> + interrupts = <68 1>;
> status = "okay";
> };
>
> @@ -260,42 +428,6 @@
> vdd_3v3_usbfs-supply = <&vdd_usb>;
> };
>
> -&pinctrl {
> - ethernet0_rmii_pins_a: rmii-0 {
> - pins1 {
> - pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
> - <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
> - <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
> - <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
> - <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
> - <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
> - bias-disable;
> - drive-push-pull;
> - slew-rate = <2>;
> - };
> - pins2 {
> - pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
> - <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
> - <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
> - bias-disable;
> - };
> - };
> -
> - ethernet0_rmii_pins_sleep_a: rmii-sleep-0 {
> - pins1 {
> - pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
> - <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
> - <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
> - <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
> - <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
> - <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
> - <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
> - <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
> - <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
> - };
> - };
> -};
> -
> &qspi {
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
> @@ -305,7 +437,7 @@
> #size-cells = <0>;
> status = "okay";
>
> - flash0: mx66l51235l@0 {
> + flash0: flash@0 {
> compatible = "jedec,spi-nor";
> reg = <0>;
> spi-rx-bus-width = <4>;
> @@ -324,14 +456,19 @@
> };
>
> &sdmmc1 {
> - pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-names = "default", "opendrain", "sleep", "init";
> pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
> pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
> pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
> + pinctrl-3 = <&sdmmc1_b4_init_pins_a &sdmmc1_dir_init_pins_a>;
> cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> disable-wp;
> st,sig-dir;
> st,neg-edge;
> + st,use-ckin;
> + st,cmd-gpios = <&gpiod 2 0>;
> + st,ck-gpios = <&gpioc 12 0>;
> + st,ckin-gpios = <&gpioe 4 0>;
> bus-width = <4>;
> vmmc-supply = <&vdd_sd>;
> status = "okay";
> @@ -352,75 +489,33 @@
> };
>
> &sdmmc2 {
> - pinctrl-names = "default";
> + pinctrl-names = "default", "opendrain", "sleep";
> pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
> + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
> + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
> non-removable;
> no-sd;
> no-sdio;
> - st,sig-dir;
> st,neg-edge;
> bus-width = <8>;
> vmmc-supply = <&v3v3>;
> + vqmmc-supply = <&v3v3>;
> + mmc-ddr-3_3v;
> status = "okay";
> };
>
> -&spi1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&spi1_pins_a>;
> - status = "disabled";
> -};
> -
> -&timers2 {
> - /* spare dmas for other usage (un-delete to enable pwm capture) */
> - /delete-property/dmas;
> - /delete-property/dma-names;
> - status = "disabled";
> - pwm {
> - pinctrl-0 = <&pwm2_pins_a>;
> - pinctrl-names = "default";
> - status = "okay";
> - };
> - timer@1 {
> - status = "okay";
> - };
> -};
> -
> -&timers6 {
> +&sdmmc3 {
> + pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-0 = <&sdmmc3_b4_pins_a>;
> + pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
> + pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
> + broken-cd;
> + st,neg-edge;
> + bus-width = <4>;
> + vmmc-supply = <&v3v3>;
> + vqmmc-supply = <&v3v3>;
> + mmc-ddr-3_3v;
> status = "okay";
> - /* spare dmas for other usage */
> - /delete-property/dmas;
> - /delete-property/dma-names;
> - timer@5 {
> - status = "okay";
> - };
> -};
> -
> -&timers8 {
> - /delete-property/dmas;
> - /delete-property/dma-names;
> - status = "disabled";
> - pwm {
> - pinctrl-0 = <&pwm8_pins_a>;
> - pinctrl-names = "default";
> - status = "okay";
> - };
> - timer@7 {
> - status = "okay";
> - };
> -};
> -
> -&timers12 {
> - /delete-property/dmas;
> - /delete-property/dma-names;
> - status = "disabled";
> - pwm {
> - pinctrl-0 = <&pwm12_pins_a>;
> - pinctrl-names = "default";
> - status = "okay";
> - };
> - timer@11 {
> - status = "okay";
> - };
> };
>
> &uart4 {
> @@ -428,29 +523,3 @@
> pinctrl-0 = <&uart4_pins_a>;
> status = "okay";
> };
> -
> -&usbh_ehci {
> - phys = <&usbphyc_port0>;
> - phy-names = "usb";
> - status = "okay";
> -};
> -
> -&usbotg_hs {
> - dr_mode = "peripheral";
> - phys = <&usbphyc_port1 0>;
> - phy-names = "usb2-phy";
> - vbus-supply = <&vbus_otg>;
> - status = "okay";
> -};
> -
> -&usbphyc {
> - status = "okay";
> -};
> -
> -&usbphyc_port0 {
> - phy-supply = <&vdd_usb>;
> -};
> -
> -&usbphyc_port1 {
> - phy-supply = <&vdd_usb>;
> -};
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> index 5b2b09bcfb9..f09f4290f62 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> @@ -9,6 +9,8 @@
> #include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi"
> #include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi"
>
> +/delete-node/ &ksz8851;
> +
> / {
> aliases {
> i2c1 = &i2c2;
> @@ -18,7 +20,8 @@
> mmc1 = &sdmmc2;
> spi0 = &qspi;
> usb0 = &usbotg_hs;
> - ethernet1 = &ksz8851;
> + eeprom0 = &eeprom0;
> + ethernet1 = &ks8851;
> };
>
> config {
> @@ -30,28 +33,34 @@
> dh,ddr3-coding-gpios = <&gpioz 6 0>, <&gpioz 7 0>;
> };
>
> - led {
> - red {
> - label = "error";
> - gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
> - default-state = "off";
> - status = "okay";
> - };
> -
> - blue {
> - default-state = "on";
> - };
> - };
> -
> /* This is actually on FMC2, but we do not have bus driver for that */
> - ksz8851: ks8851mll@64000000 {
> + ks8851: ks8851mll@64000000 {
> compatible = "micrel,ks8851-mll";
> reg = <0x64000000 0x20000>;
> };
> };
>
> +ðernet0 {
> + phy-reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
> + /delete-property/ st,eth-ref-clk-sel;
> +};
> +
> +ðernet0_rmii_pins_a {
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
> + <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
> + <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
> + <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
> + <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
> + <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
> + };
> +};
> +
> &i2c4 {
> u-boot,dm-pre-reloc;
> +
> + eeprom0: eeprom@50 {
> + };
> };
>
> &i2c4_pins_a {
> @@ -61,6 +70,10 @@
> };
> };
>
> +&phy0 {
> + /delete-property/ reset-gpios;
> +};
> +
> &pinctrl {
> /* These should bound to FMC2 bus driver, but we do not have one */
> pinctrl-0 = <&fmc_pins_b &mco2_pins_a>;
Applied to u-boot-stm/master
Thanks
Patrice
next prev parent reply other threads:[~2022-01-24 12:17 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-30 22:46 [PATCH 1/2] ARM: dts: stm32: Synchronize DHCOR DTs with Linux 5.15.12 Marek Vasut
2021-12-30 22:46 ` [PATCH 2/2] ARM: dts: stm32: Synchronize DHCOM " Marek Vasut
2022-01-11 9:09 ` Patrick DELAUNAY
2022-01-24 12:15 ` Patrice CHOTARD
2022-01-24 12:17 ` Patrice CHOTARD [this message]
2022-01-11 9:08 ` [PATCH 1/2] ARM: dts: stm32: Synchronize DHCOR " Patrick DELAUNAY
2022-01-24 12:15 ` Patrice CHOTARD
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