* [PATCH] drm/i915: Setting pch_id for Gen7.5+ in virtual environment
@ 2017-03-29 9:02 Xiong Zhang
2017-03-29 9:15 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-03-29 11:22 ` [PATCH] " Ville Syrjälä
0 siblings, 2 replies; 7+ messages in thread
From: Xiong Zhang @ 2017-03-29 9:02 UTC (permalink / raw)
To: intel-gfx
In a virtual passthrough environment, the ISA bridge isn't able to
be passed through. So pch_id couldn't be gotten from ISA bridge, but
pch_id is used to identify LPT_H and LPT_LP, this patch set pch_id
according to IGD type.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99938
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8b807a9..32a9bff 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -135,9 +135,17 @@ static enum intel_pch intel_virt_detect_pch(struct drm_i915_private *dev_priv)
DRM_DEBUG_KMS("Assuming CouarPoint PCH\n");
} else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
ret = PCH_LPT;
+ if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
+ dev_priv->pch_id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
+ else
+ dev_priv->pch_id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
DRM_DEBUG_KMS("Assuming LynxPoint PCH\n");
} else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
ret = PCH_SPT;
+ if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv))
+ dev_priv->pch_id = INTEL_PCH_SPT_LP_DEVICE_ID_TYPE;
+ else
+ dev_priv->pch_id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
DRM_DEBUG_KMS("Assuming SunrisePoint PCH\n");
}
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Setting pch_id for Gen7.5+ in virtual environment
2017-03-29 9:02 [PATCH] drm/i915: Setting pch_id for Gen7.5+ in virtual environment Xiong Zhang
@ 2017-03-29 9:15 ` Patchwork
2017-03-29 11:22 ` [PATCH] " Ville Syrjälä
1 sibling, 0 replies; 7+ messages in thread
From: Patchwork @ 2017-03-29 9:15 UTC (permalink / raw)
To: Zhang, Xiong Y; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Setting pch_id for Gen7.5+ in virtual environment
URL : https://patchwork.freedesktop.org/series/22064/
State : success
== Summary ==
Series 22064v1 drm/i915: Setting pch_id for Gen7.5+ in virtual environment
https://patchwork.freedesktop.org/api/1.0/series/22064/revisions/1/mbox/
Test drv_module_reload:
Subgroup basic-reload:
dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#99938
Subgroup basic-reload-final:
dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#99938
Subgroup basic-reload-inject:
dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#99938
Test gem_exec_suspend:
Subgroup basic-s3:
dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#99938
Subgroup basic-s4-devices:
dmesg-warn -> PASS (fi-bxt-t5700) fdo#100125
dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#99938
Test kms_force_connector_basic:
Subgroup force-connector-state:
skip -> PASS (fi-ivb-3520m)
Subgroup force-edid:
skip -> PASS (fi-ivb-3520m)
Subgroup force-load-detect:
skip -> PASS (fi-ivb-3520m)
Subgroup prune-stale-modes:
skip -> PASS (fi-ivb-3520m)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-a:
dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#99938
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#99938
Subgroup suspend-read-crc-pipe-c:
dmesg-warn -> PASS (fi-kbl-7560u)
dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#99938
fdo#99938 https://bugs.freedesktop.org/show_bug.cgi?id=99938
fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 470s
fi-bdw-gvtdvm total:278 pass:264 dwarn:0 dfail:0 fail:0 skip:14 time: 456s
fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 586s
fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 544s
fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time: 574s
fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 505s
fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 506s
fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 438s
fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 440s
fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 439s
fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 504s
fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 497s
fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 484s
fi-kbl-7560u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 599s
fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 479s
fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 604s
fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 499s
fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 526s
fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time: 467s
fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 551s
fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 time: 420s
486e7f49dc0d278c62a809532e4b645ddf9a3c25 drm-tip: 2017y-03m-29d-08h-01m-04s UTC integration manifest
77bf078 drm/i915: Setting pch_id for Gen7.5+ in virtual environment
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4333/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Setting pch_id for Gen7.5+ in virtual environment
2017-03-29 9:02 [PATCH] drm/i915: Setting pch_id for Gen7.5+ in virtual environment Xiong Zhang
2017-03-29 9:15 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-03-29 11:22 ` Ville Syrjälä
2017-03-30 5:39 ` Zhang, Xiong Y
1 sibling, 1 reply; 7+ messages in thread
From: Ville Syrjälä @ 2017-03-29 11:22 UTC (permalink / raw)
To: Xiong Zhang; +Cc: intel-gfx
On Wed, Mar 29, 2017 at 05:02:47PM +0800, Xiong Zhang wrote:
> In a virtual passthrough environment, the ISA bridge isn't able to
> be passed through. So pch_id couldn't be gotten from ISA bridge, but
> pch_id is used to identify LPT_H and LPT_LP, this patch set pch_id
> according to IGD type.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99938
>
> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 8b807a9..32a9bff 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -135,9 +135,17 @@ static enum intel_pch intel_virt_detect_pch(struct drm_i915_private *dev_priv)
> DRM_DEBUG_KMS("Assuming CouarPoint PCH\n");
> } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> ret = PCH_LPT;
> + if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
> + dev_priv->pch_id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
> + else
> + dev_priv->pch_id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
> DRM_DEBUG_KMS("Assuming LynxPoint PCH\n");
> } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
> ret = PCH_SPT;
> + if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv))
> + dev_priv->pch_id = INTEL_PCH_SPT_LP_DEVICE_ID_TYPE;
> + else
> + dev_priv->pch_id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
I'm not 100% sure the ULT/ULX <=> LP thing always holds. I *think* it
should but I've never been able to convince myself totally.
As far as KBL goes, maybe we want PCH_KBP for it? Although I don't actually
know why we even make the distinction between the two since they seem
identical for us, and we don't distinguish LPT vs. WPT either. Rodrigo?
> DRM_DEBUG_KMS("Assuming SunrisePoint PCH\n");
> }
>
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Setting pch_id for Gen7.5+ in virtual environment
2017-03-29 11:22 ` [PATCH] " Ville Syrjälä
@ 2017-03-30 5:39 ` Zhang, Xiong Y
2017-03-30 6:33 ` Jani Nikula
2017-03-31 9:37 ` Martin Peres
0 siblings, 2 replies; 7+ messages in thread
From: Zhang, Xiong Y @ 2017-03-30 5:39 UTC (permalink / raw)
To: ville.syrjala; +Cc: intel-gfx
> On Wed, Mar 29, 2017 at 05:02:47PM +0800, Xiong Zhang wrote:
> > In a virtual passthrough environment, the ISA bridge isn't able to
> > be passed through. So pch_id couldn't be gotten from ISA bridge, but
> > pch_id is used to identify LPT_H and LPT_LP, this patch set pch_id
> > according to IGD type.
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99938
> >
> > Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c
> b/drivers/gpu/drm/i915/i915_drv.c
> > index 8b807a9..32a9bff 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -135,9 +135,17 @@ static enum intel_pch intel_virt_detect_pch(struct
> drm_i915_private *dev_priv)
> > DRM_DEBUG_KMS("Assuming CouarPoint PCH\n");
> > } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> > ret = PCH_LPT;
> > + if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
> > + dev_priv->pch_id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
> > + else
> > + dev_priv->pch_id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
> > DRM_DEBUG_KMS("Assuming LynxPoint PCH\n");
> > } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
> > ret = PCH_SPT;
> > + if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv))
> > + dev_priv->pch_id = INTEL_PCH_SPT_LP_DEVICE_ID_TYPE;
> > + else
> > + dev_priv->pch_id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
>
> I'm not 100% sure the ULT/ULX <=> LP thing always holds. I *think* it
> should but I've never been able to convince myself totally.
[Zhang, Xiong Y] For BDW ULT/ULX, it should be LP. A picture from https://gfxspecs.intel.com/Predator/Home/Index/4216 could confirm this.
For HSW ULT/ULX, I couldn't find a material to confirm this.
Anyway I copy this condition from the WARN_ON() in intel_detect_pch()
For SKL/KBL ULT/ULX, I couldn't find a material to confirm this neither.
> As far as KBL goes, maybe we want PCH_KBP for it? Although I don't actually
> know why we even make the distinction between the two since they seem
> identical for us, and we don't distinguish LPT vs. WPT either. Rodrigo?
[Zhang, Xiong Y] For PCH_KBP, I couldn't find out which KBL type will co-work with it.
As the real ISA Bridge doesn't exist in a emulated guest machine, we couldn't get the real and accurate pch_id in guest. In such passthrough virtual environment, the only real HW is IGD which is passed through to guest, we could only assume the pch_id from this IGD.
Fortunately pch_id is only used to identify LPT_LP and LPT_H currently.
Without this patch, pch_id is totally wrong. And on LPT_LP platform without this patch, the local HDMI/DP display couldn't lightup when guest boot up. But this patch could only remedy part of pch_id. Currently I have two plans to improve this patch:
1) only remain pch_id assuming for HSW and BDW, as this is really we need to fix the bug.
Delete pch_id assuming for SKL and KBL, as currently i915 driver don't use it.
2) Claim this patch's limitation in commit message.
Any suggestion ?
> > DRM_DEBUG_KMS("Assuming SunrisePoint PCH\n");
> > }
> >
> > --
> > 1.9.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Setting pch_id for Gen7.5+ in virtual environment
2017-03-30 5:39 ` Zhang, Xiong Y
@ 2017-03-30 6:33 ` Jani Nikula
2017-03-31 9:37 ` Martin Peres
1 sibling, 0 replies; 7+ messages in thread
From: Jani Nikula @ 2017-03-30 6:33 UTC (permalink / raw)
To: Zhang, Xiong Y, ville.syrjala; +Cc: intel-gfx
On Thu, 30 Mar 2017, "Zhang, Xiong Y" <xiong.y.zhang@intel.com> wrote:
>> On Wed, Mar 29, 2017 at 05:02:47PM +0800, Xiong Zhang wrote:
>> I'm not 100% sure the ULT/ULX <=> LP thing always holds. I *think* it
>> should but I've never been able to convince myself totally.
> [Zhang, Xiong Y] For BDW ULT/ULX, it should be LP. A picture from https://gfxspecs.intel.com/Predator/Home/Index/4216 could confirm this.
While that picture confirms ULT/ULX uses LP PCH, it also confirms
there's a non-ULT/ULX BDW with LP PCH, and on that the patch chooses the
wrong PCH type.
> For HSW ULT/ULX, I couldn't find a material to confirm this.
> Anyway I copy this condition from the WARN_ON() in intel_detect_pch()
The conditions in intel_detect_pch() are quite different, as it has
actually detected the PCH, and the warnings are just about unexpected
(and potentially unsupported) pairs of physical hardware.
BR,
Jani.
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Setting pch_id for Gen7.5+ in virtual environment
2017-03-30 5:39 ` Zhang, Xiong Y
2017-03-30 6:33 ` Jani Nikula
@ 2017-03-31 9:37 ` Martin Peres
2017-04-12 14:00 ` Martin Peres
1 sibling, 1 reply; 7+ messages in thread
From: Martin Peres @ 2017-03-31 9:37 UTC (permalink / raw)
To: Zhang, Xiong Y, ville.syrjala; +Cc: intel-gfx
On 30/03/17 08:39, Zhang, Xiong Y wrote:
>> On Wed, Mar 29, 2017 at 05:02:47PM +0800, Xiong Zhang wrote:
>>> In a virtual passthrough environment, the ISA bridge isn't able to
>>> be passed through. So pch_id couldn't be gotten from ISA bridge, but
>>> pch_id is used to identify LPT_H and LPT_LP, this patch set pch_id
>>> according to IGD type.
>>>
>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99938
>>>
>>> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/i915_drv.c | 8 ++++++++
>>> 1 file changed, 8 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_drv.c
>> b/drivers/gpu/drm/i915/i915_drv.c
>>> index 8b807a9..32a9bff 100644
>>> --- a/drivers/gpu/drm/i915/i915_drv.c
>>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>>> @@ -135,9 +135,17 @@ static enum intel_pch intel_virt_detect_pch(struct
>> drm_i915_private *dev_priv)
>>> DRM_DEBUG_KMS("Assuming CouarPoint PCH\n");
>>> } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
>>> ret = PCH_LPT;
>>> + if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
>>> + dev_priv->pch_id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
>>> + else
>>> + dev_priv->pch_id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
>>> DRM_DEBUG_KMS("Assuming LynxPoint PCH\n");
>>> } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
>>> ret = PCH_SPT;
>>> + if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv))
>>> + dev_priv->pch_id = INTEL_PCH_SPT_LP_DEVICE_ID_TYPE;
>>> + else
>>> + dev_priv->pch_id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
>>
>> I'm not 100% sure the ULT/ULX <=> LP thing always holds. I *think* it
>> should but I've never been able to convince myself totally.
> [Zhang, Xiong Y] For BDW ULT/ULX, it should be LP. A picture from https://gfxspecs.intel.com/Predator/Home/Index/4216 could confirm this.
> For HSW ULT/ULX, I couldn't find a material to confirm this.
> Anyway I copy this condition from the WARN_ON() in intel_detect_pch()
>
> For SKL/KBL ULT/ULX, I couldn't find a material to confirm this neither.
>
>> As far as KBL goes, maybe we want PCH_KBP for it? Although I don't actually
>> know why we even make the distinction between the two since they seem
>> identical for us, and we don't distinguish LPT vs. WPT either. Rodrigo?
> [Zhang, Xiong Y] For PCH_KBP, I couldn't find out which KBL type will co-work with it.
> As the real ISA Bridge doesn't exist in a emulated guest machine, we couldn't get the real and accurate pch_id in guest. In such passthrough virtual environment, the only real HW is IGD which is passed through to guest, we could only assume the pch_id from this IGD.
> Fortunately pch_id is only used to identify LPT_LP and LPT_H currently.
> Without this patch, pch_id is totally wrong. And on LPT_LP platform without this patch, the local HDMI/DP display couldn't lightup when guest boot up. But this patch could only remedy part of pch_id. Currently I have two plans to improve this patch:
> 1) only remain pch_id assuming for HSW and BDW, as this is really we need to fix the bug.
> Delete pch_id assuming for SKL and KBL, as currently i915 driver don't use it.
> 2) Claim this patch's limitation in commit message.
> Any suggestion ?
Guys, any updates on this?
This blocks the testing of the following tests on fi-bdw-gvtdvm:
igt@drv_module_reload@basic-reload
igt@drv_module_reload@basic-reload-final
igt@drv_module_reload@basic-reload-inject
igt@gem_exec_suspend@basic-s3
igt@gem_exec_suspend@basic-s4-devices
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c
Thanks,
Martin
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Setting pch_id for Gen7.5+ in virtual environment
2017-03-31 9:37 ` Martin Peres
@ 2017-04-12 14:00 ` Martin Peres
0 siblings, 0 replies; 7+ messages in thread
From: Martin Peres @ 2017-04-12 14:00 UTC (permalink / raw)
To: Zhang, Xiong Y, ville.syrjala; +Cc: intel-gfx
On 31/03/17 12:37, Martin Peres wrote:
>
>
> On 30/03/17 08:39, Zhang, Xiong Y wrote:
>>> On Wed, Mar 29, 2017 at 05:02:47PM +0800, Xiong Zhang wrote:
>>>> In a virtual passthrough environment, the ISA bridge isn't able to
>>>> be passed through. So pch_id couldn't be gotten from ISA bridge, but
>>>> pch_id is used to identify LPT_H and LPT_LP, this patch set pch_id
>>>> according to IGD type.
>>>>
>>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99938
>>>>
>>>> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/i915_drv.c | 8 ++++++++
>>>> 1 file changed, 8 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.c
>>> b/drivers/gpu/drm/i915/i915_drv.c
>>>> index 8b807a9..32a9bff 100644
>>>> --- a/drivers/gpu/drm/i915/i915_drv.c
>>>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>>>> @@ -135,9 +135,17 @@ static enum intel_pch intel_virt_detect_pch(struct
>>> drm_i915_private *dev_priv)
>>>> DRM_DEBUG_KMS("Assuming CouarPoint PCH\n");
>>>> } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
>>>> ret = PCH_LPT;
>>>> + if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
>>>> + dev_priv->pch_id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
>>>> + else
>>>> + dev_priv->pch_id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
>>>> DRM_DEBUG_KMS("Assuming LynxPoint PCH\n");
>>>> } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
>>>> ret = PCH_SPT;
>>>> + if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv))
>>>> + dev_priv->pch_id = INTEL_PCH_SPT_LP_DEVICE_ID_TYPE;
>>>> + else
>>>> + dev_priv->pch_id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
>>>
>>> I'm not 100% sure the ULT/ULX <=> LP thing always holds. I *think* it
>>> should but I've never been able to convince myself totally.
>> [Zhang, Xiong Y] For BDW ULT/ULX, it should be LP. A picture from
>> https://gfxspecs.intel.com/Predator/Home/Index/4216 could confirm this.
>> For HSW ULT/ULX, I couldn't find a material to confirm this.
>> Anyway I copy this condition from the WARN_ON() in intel_detect_pch()
>>
>> For SKL/KBL ULT/ULX, I couldn't find a material to confirm this neither.
>>
>>> As far as KBL goes, maybe we want PCH_KBP for it? Although I don't
>>> actually
>>> know why we even make the distinction between the two since they seem
>>> identical for us, and we don't distinguish LPT vs. WPT either. Rodrigo?
>> [Zhang, Xiong Y] For PCH_KBP, I couldn't find out which KBL type will
>> co-work with it.
>> As the real ISA Bridge doesn't exist in a emulated guest machine, we
>> couldn't get the real and accurate pch_id in guest. In such
>> passthrough virtual environment, the only real HW is IGD which is
>> passed through to guest, we could only assume the pch_id from this IGD.
>> Fortunately pch_id is only used to identify LPT_LP and LPT_H currently.
>> Without this patch, pch_id is totally wrong. And on LPT_LP platform
>> without this patch, the local HDMI/DP display couldn't lightup when
>> guest boot up. But this patch could only remedy part of pch_id.
>> Currently I have two plans to improve this patch:
>> 1) only remain pch_id assuming for HSW and BDW, as this is really we
>> need to fix the bug.
>> Delete pch_id assuming for SKL and KBL, as currently i915 driver
>> don't use it.
>> 2) Claim this patch's limitation in commit message.
>> Any suggestion ?
>
> Guys, any updates on this?
>
> This blocks the testing of the following tests on fi-bdw-gvtdvm:
> igt@drv_module_reload@basic-reload
> igt@drv_module_reload@basic-reload-final
> igt@drv_module_reload@basic-reload-inject
> igt@gem_exec_suspend@basic-s3
> igt@gem_exec_suspend@basic-s4-devices
> igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a
> igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b
> igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c
Ping, testing in virtual environment is seriously hindered by this bug.
Please take this seriously.
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-04-12 14:00 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-03-29 9:02 [PATCH] drm/i915: Setting pch_id for Gen7.5+ in virtual environment Xiong Zhang
2017-03-29 9:15 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-03-29 11:22 ` [PATCH] " Ville Syrjälä
2017-03-30 5:39 ` Zhang, Xiong Y
2017-03-30 6:33 ` Jani Nikula
2017-03-31 9:37 ` Martin Peres
2017-04-12 14:00 ` Martin Peres
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