From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.6 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD4E3C433E0 for ; Fri, 5 Feb 2021 23:37:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5B5616501B for ; Fri, 5 Feb 2021 23:37:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230180AbhBEXhi (ORCPT ); Fri, 5 Feb 2021 18:37:38 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:22646 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S232546AbhBEOUS (ORCPT ); Fri, 5 Feb 2021 09:20:18 -0500 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 115Er346020196; Fri, 5 Feb 2021 15:59:21 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=subject : to : cc : references : from : message-id : date : mime-version : in-reply-to : content-type : content-transfer-encoding; s=selector1; bh=rUxu5cd8zs1S0hDva5uNHDkNRW8BgOj2qVMzSr7soKY=; b=2htJvUGKQ2iCpg24MMwE3qBXxTPpRSznfsmlKUcDhwtc6GqUcz0KNLwccDMOpuXfvBns THzSqxznc2MGfg/oBu8n6n3UegksFryuYDHOHnBT4Ek3QUi2ysCToB4VTc8d0veKCK90 nNvuW+62MG3r8sMzEtv1L12/HfDLLc9H+HbH5o4TR/yn36ayhnCVSiARWlYbPuunGE+5 DvngZg1TEp3URQBznGYg2DlLKmyZJj39BHmkJMQiZ+b1B2ZRedbuR7MJUrEarKJzMy16 QwwQvgQ+Y3ch4/17KWZDH0GVgQqBBvefcldaV+DY3gP+sA+DnP9DIieh8voFWb2EHqZU Wg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 36d0nsg9yg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 05 Feb 2021 15:59:21 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2AD6610002A; Fri, 5 Feb 2021 15:59:21 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1C31A2402BC; Fri, 5 Feb 2021 15:59:21 +0100 (CET) Received: from lmecxl1060.lme.st.com (10.75.127.46) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 5 Feb 2021 15:59:20 +0100 Subject: Re: [PATCH 3/5] i2c: stm32f7: add support for DNF i2c-digital-filter binding To: Alain Volmat , , CC: , , , , , , , , References: <1612515104-838-1-git-send-email-alain.volmat@foss.st.com> <1612515104-838-4-git-send-email-alain.volmat@foss.st.com> From: Pierre Yves MORDRET Message-ID: Date: Fri, 5 Feb 2021 15:59:19 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <1612515104-838-4-git-send-email-alain.volmat@foss.st.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG1NODE1.st.com (10.75.127.1) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.737 definitions=2021-02-05_09:2021-02-05,2021-02-05 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello all Looks good to me Signed-off-by: Pierre-Yves MORDRET Regards On 2/5/21 9:51 AM, Alain Volmat wrote: > Add the support for the i2c-digital-filter binding, allowing to enable > the digital filter via the device-tree and indicate its value in the DT. > > Signed-off-by: Alain Volmat > --- > drivers/i2c/busses/i2c-stm32f7.c | 27 ++++++++++++++++----------- > 1 file changed, 16 insertions(+), 11 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c > index 0c539fea2754..f77cd6512a86 100644 > --- a/drivers/i2c/busses/i2c-stm32f7.c > +++ b/drivers/i2c/busses/i2c-stm32f7.c > @@ -222,7 +222,6 @@ struct stm32f7_i2c_spec { > * @clock_src: I2C clock source frequency (Hz) > * @rise_time: Rise time (ns) > * @fall_time: Fall time (ns) > - * @dnf: Digital filter coefficient (0-16) > * @fmp_clr_offset: Fast Mode Plus clear register offset from set register > */ > struct stm32f7_i2c_setup { > @@ -230,7 +229,6 @@ struct stm32f7_i2c_setup { > u32 clock_src; > u32 rise_time; > u32 fall_time; > - u8 dnf; > u32 fmp_clr_offset; > }; > > @@ -310,6 +308,8 @@ struct stm32f7_i2c_msg { > * @smbus_mode: states that the controller is configured in SMBus mode > * @host_notify_client: SMBus host-notify client > * @analog_filter: boolean to indicate enabling of the analog filter > + * @dnf_dt: value of digital filter requested via dt > + * @dnf: value of digital filter to apply > */ > struct stm32f7_i2c_dev { > struct i2c_adapter adap; > @@ -339,6 +339,8 @@ struct stm32f7_i2c_dev { > bool smbus_mode; > struct i2c_client *host_notify_client; > bool analog_filter; > + u32 dnf_dt; > + u32 dnf; > }; > > /* > @@ -384,13 +386,11 @@ static struct stm32f7_i2c_spec stm32f7_i2c_specs[] = { > static const struct stm32f7_i2c_setup stm32f7_setup = { > .rise_time = STM32F7_I2C_RISE_TIME_DEFAULT, > .fall_time = STM32F7_I2C_FALL_TIME_DEFAULT, > - .dnf = STM32F7_I2C_DNF_DEFAULT, > }; > > static const struct stm32f7_i2c_setup stm32mp15_setup = { > .rise_time = STM32F7_I2C_RISE_TIME_DEFAULT, > .fall_time = STM32F7_I2C_FALL_TIME_DEFAULT, > - .dnf = STM32F7_I2C_DNF_DEFAULT, > .fmp_clr_offset = 0x40, > }; > > @@ -459,10 +459,11 @@ static int stm32f7_i2c_compute_timing(struct stm32f7_i2c_dev *i2c_dev, > return -EINVAL; > } > > - if (setup->dnf > STM32F7_I2C_DNF_MAX) { > + i2c_dev->dnf = DIV_ROUND_CLOSEST(i2c_dev->dnf_dt, i2cclk); > + if (i2c_dev->dnf > STM32F7_I2C_DNF_MAX) { > dev_err(i2c_dev->dev, > "DNF out of bound %d/%d\n", > - setup->dnf, STM32F7_I2C_DNF_MAX); > + i2c_dev->dnf * i2cclk, STM32F7_I2C_DNF_MAX * i2cclk); > return -EINVAL; > } > > @@ -473,13 +474,13 @@ static int stm32f7_i2c_compute_timing(struct stm32f7_i2c_dev *i2c_dev, > af_delay_max = > (i2c_dev->analog_filter ? > STM32F7_I2C_ANALOG_FILTER_DELAY_MAX : 0); > - dnf_delay = setup->dnf * i2cclk; > + dnf_delay = i2c_dev->dnf * i2cclk; > > sdadel_min = specs->hddat_min + setup->fall_time - > - af_delay_min - (setup->dnf + 3) * i2cclk; > + af_delay_min - (i2c_dev->dnf + 3) * i2cclk; > > sdadel_max = specs->vddat_max - setup->rise_time - > - af_delay_max - (setup->dnf + 4) * i2cclk; > + af_delay_max - (i2c_dev->dnf + 4) * i2cclk; > > scldel_min = setup->rise_time + specs->sudat_min; > > @@ -645,6 +646,7 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev, > setup->speed_freq = t->bus_freq_hz; > i2c_dev->setup.rise_time = t->scl_rise_ns; > i2c_dev->setup.fall_time = t->scl_fall_ns; > + i2c_dev->dnf_dt = t->digital_filter_width_ns; > setup->clock_src = clk_get_rate(i2c_dev->clk); > > if (!setup->clock_src) { > @@ -652,6 +654,9 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev, > return -EINVAL; > } > > + if (!of_property_read_bool(i2c_dev->dev->of_node, "i2c-digital-filter")) > + i2c_dev->dnf_dt = STM32F7_I2C_DNF_DEFAULT; > + > do { > ret = stm32f7_i2c_compute_timing(i2c_dev, setup, > &i2c_dev->timing); > @@ -681,7 +686,7 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev, > dev_dbg(i2c_dev->dev, "I2C Rise(%i) and Fall(%i) Time\n", > setup->rise_time, setup->fall_time); > dev_dbg(i2c_dev->dev, "I2C Analog Filter(%s), DNF(%i)\n", > - (i2c_dev->analog_filter ? "On" : "Off"), setup->dnf); > + (i2c_dev->analog_filter ? "On" : "Off"), i2c_dev->dnf); > > i2c_dev->bus_rate = setup->speed_freq; > > @@ -732,7 +737,7 @@ static void stm32f7_i2c_hw_config(struct stm32f7_i2c_dev *i2c_dev) > stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, > STM32F7_I2C_CR1_DNF_MASK); > stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, > - STM32F7_I2C_CR1_DNF(i2c_dev->setup.dnf)); > + STM32F7_I2C_CR1_DNF(i2c_dev->dnf)); > > stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, > STM32F7_I2C_CR1_PE); > -- -- ~ Py MORDRET -- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2D1CC433DB for ; Fri, 5 Feb 2021 15:00:37 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7FEB6650DD for ; Fri, 5 Feb 2021 15:00:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7FEB6650DD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=foss.st.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Rxc6h96yRWuVMCdtuCfYewfJTMy+dZgwrskc0a0alDU=; b=qrwC1cXEIVbxvos8ZIzKdC7ld 8BhQmBi/wMLeit83M32dukIDXXcdywCvWzBgbRGmqt4RsoJLUZjgICSjWy0JDxc4XHxBUsCLrZLR9 isrfLd8XMhSK3wYF6+3BSytTIYnAdIJZTDvbQrvwREmxh69gOpB0sY7muxJ1XooH7qIEexnX3UsOU ICkW4DGdh5mNcyETL4IQzsVJQAxITyZWr8ZB767a3wcKwmcLyv9L+jcf0Nnf26rACacqlOjJiGuuw mNpsLoz6OYGNkt2YmoBURdk1gDg1+sN5GFoUcupssuONJHU5lB6V3deVfkjvnZrgHSL0/oK9jt1QB eEwQbJO4Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l82a1-0004Z5-I3; Fri, 05 Feb 2021 14:59:29 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l82Zz-0004YI-7u for linux-arm-kernel@lists.infradead.org; Fri, 05 Feb 2021 14:59:28 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 115Er346020196; Fri, 5 Feb 2021 15:59:21 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=subject : to : cc : references : from : message-id : date : mime-version : in-reply-to : content-type : content-transfer-encoding; s=selector1; bh=rUxu5cd8zs1S0hDva5uNHDkNRW8BgOj2qVMzSr7soKY=; b=2htJvUGKQ2iCpg24MMwE3qBXxTPpRSznfsmlKUcDhwtc6GqUcz0KNLwccDMOpuXfvBns THzSqxznc2MGfg/oBu8n6n3UegksFryuYDHOHnBT4Ek3QUi2ysCToB4VTc8d0veKCK90 nNvuW+62MG3r8sMzEtv1L12/HfDLLc9H+HbH5o4TR/yn36ayhnCVSiARWlYbPuunGE+5 DvngZg1TEp3URQBznGYg2DlLKmyZJj39BHmkJMQiZ+b1B2ZRedbuR7MJUrEarKJzMy16 QwwQvgQ+Y3ch4/17KWZDH0GVgQqBBvefcldaV+DY3gP+sA+DnP9DIieh8voFWb2EHqZU Wg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 36d0nsg9yg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 05 Feb 2021 15:59:21 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2AD6610002A; Fri, 5 Feb 2021 15:59:21 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1C31A2402BC; Fri, 5 Feb 2021 15:59:21 +0100 (CET) Received: from lmecxl1060.lme.st.com (10.75.127.46) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 5 Feb 2021 15:59:20 +0100 Subject: Re: [PATCH 3/5] i2c: stm32f7: add support for DNF i2c-digital-filter binding To: Alain Volmat , , References: <1612515104-838-1-git-send-email-alain.volmat@foss.st.com> <1612515104-838-4-git-send-email-alain.volmat@foss.st.com> From: Pierre Yves MORDRET Message-ID: Date: Fri, 5 Feb 2021 15:59:19 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <1612515104-838-4-git-send-email-alain.volmat@foss.st.com> Content-Language: en-US X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG1NODE1.st.com (10.75.127.1) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.737 definitions=2021-02-05_09:2021-02-05, 2021-02-05 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210205_095927_505905_CE23F034 X-CRM114-Status: GOOD ( 26.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, alexandre.torgue@foss.st.com, linux-kernel@vger.kernel.org, fabrice.gasnier@foss.st.com, linux-i2c@vger.kernel.org, mcoquelin.stm32@gmail.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello all Looks good to me Signed-off-by: Pierre-Yves MORDRET Regards On 2/5/21 9:51 AM, Alain Volmat wrote: > Add the support for the i2c-digital-filter binding, allowing to enable > the digital filter via the device-tree and indicate its value in the DT. > > Signed-off-by: Alain Volmat > --- > drivers/i2c/busses/i2c-stm32f7.c | 27 ++++++++++++++++----------- > 1 file changed, 16 insertions(+), 11 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c > index 0c539fea2754..f77cd6512a86 100644 > --- a/drivers/i2c/busses/i2c-stm32f7.c > +++ b/drivers/i2c/busses/i2c-stm32f7.c > @@ -222,7 +222,6 @@ struct stm32f7_i2c_spec { > * @clock_src: I2C clock source frequency (Hz) > * @rise_time: Rise time (ns) > * @fall_time: Fall time (ns) > - * @dnf: Digital filter coefficient (0-16) > * @fmp_clr_offset: Fast Mode Plus clear register offset from set register > */ > struct stm32f7_i2c_setup { > @@ -230,7 +229,6 @@ struct stm32f7_i2c_setup { > u32 clock_src; > u32 rise_time; > u32 fall_time; > - u8 dnf; > u32 fmp_clr_offset; > }; > > @@ -310,6 +308,8 @@ struct stm32f7_i2c_msg { > * @smbus_mode: states that the controller is configured in SMBus mode > * @host_notify_client: SMBus host-notify client > * @analog_filter: boolean to indicate enabling of the analog filter > + * @dnf_dt: value of digital filter requested via dt > + * @dnf: value of digital filter to apply > */ > struct stm32f7_i2c_dev { > struct i2c_adapter adap; > @@ -339,6 +339,8 @@ struct stm32f7_i2c_dev { > bool smbus_mode; > struct i2c_client *host_notify_client; > bool analog_filter; > + u32 dnf_dt; > + u32 dnf; > }; > > /* > @@ -384,13 +386,11 @@ static struct stm32f7_i2c_spec stm32f7_i2c_specs[] = { > static const struct stm32f7_i2c_setup stm32f7_setup = { > .rise_time = STM32F7_I2C_RISE_TIME_DEFAULT, > .fall_time = STM32F7_I2C_FALL_TIME_DEFAULT, > - .dnf = STM32F7_I2C_DNF_DEFAULT, > }; > > static const struct stm32f7_i2c_setup stm32mp15_setup = { > .rise_time = STM32F7_I2C_RISE_TIME_DEFAULT, > .fall_time = STM32F7_I2C_FALL_TIME_DEFAULT, > - .dnf = STM32F7_I2C_DNF_DEFAULT, > .fmp_clr_offset = 0x40, > }; > > @@ -459,10 +459,11 @@ static int stm32f7_i2c_compute_timing(struct stm32f7_i2c_dev *i2c_dev, > return -EINVAL; > } > > - if (setup->dnf > STM32F7_I2C_DNF_MAX) { > + i2c_dev->dnf = DIV_ROUND_CLOSEST(i2c_dev->dnf_dt, i2cclk); > + if (i2c_dev->dnf > STM32F7_I2C_DNF_MAX) { > dev_err(i2c_dev->dev, > "DNF out of bound %d/%d\n", > - setup->dnf, STM32F7_I2C_DNF_MAX); > + i2c_dev->dnf * i2cclk, STM32F7_I2C_DNF_MAX * i2cclk); > return -EINVAL; > } > > @@ -473,13 +474,13 @@ static int stm32f7_i2c_compute_timing(struct stm32f7_i2c_dev *i2c_dev, > af_delay_max = > (i2c_dev->analog_filter ? > STM32F7_I2C_ANALOG_FILTER_DELAY_MAX : 0); > - dnf_delay = setup->dnf * i2cclk; > + dnf_delay = i2c_dev->dnf * i2cclk; > > sdadel_min = specs->hddat_min + setup->fall_time - > - af_delay_min - (setup->dnf + 3) * i2cclk; > + af_delay_min - (i2c_dev->dnf + 3) * i2cclk; > > sdadel_max = specs->vddat_max - setup->rise_time - > - af_delay_max - (setup->dnf + 4) * i2cclk; > + af_delay_max - (i2c_dev->dnf + 4) * i2cclk; > > scldel_min = setup->rise_time + specs->sudat_min; > > @@ -645,6 +646,7 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev, > setup->speed_freq = t->bus_freq_hz; > i2c_dev->setup.rise_time = t->scl_rise_ns; > i2c_dev->setup.fall_time = t->scl_fall_ns; > + i2c_dev->dnf_dt = t->digital_filter_width_ns; > setup->clock_src = clk_get_rate(i2c_dev->clk); > > if (!setup->clock_src) { > @@ -652,6 +654,9 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev, > return -EINVAL; > } > > + if (!of_property_read_bool(i2c_dev->dev->of_node, "i2c-digital-filter")) > + i2c_dev->dnf_dt = STM32F7_I2C_DNF_DEFAULT; > + > do { > ret = stm32f7_i2c_compute_timing(i2c_dev, setup, > &i2c_dev->timing); > @@ -681,7 +686,7 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev, > dev_dbg(i2c_dev->dev, "I2C Rise(%i) and Fall(%i) Time\n", > setup->rise_time, setup->fall_time); > dev_dbg(i2c_dev->dev, "I2C Analog Filter(%s), DNF(%i)\n", > - (i2c_dev->analog_filter ? "On" : "Off"), setup->dnf); > + (i2c_dev->analog_filter ? "On" : "Off"), i2c_dev->dnf); > > i2c_dev->bus_rate = setup->speed_freq; > > @@ -732,7 +737,7 @@ static void stm32f7_i2c_hw_config(struct stm32f7_i2c_dev *i2c_dev) > stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, > STM32F7_I2C_CR1_DNF_MASK); > stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, > - STM32F7_I2C_CR1_DNF(i2c_dev->setup.dnf)); > + STM32F7_I2C_CR1_DNF(i2c_dev->dnf)); > > stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, > STM32F7_I2C_CR1_PE); > -- -- ~ Py MORDRET -- _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel