From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 366DDC10F12 for ; Wed, 17 Apr 2019 07:19:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D7F2A2176F for ; Wed, 17 Apr 2019 07:19:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731060AbfDQHTv (ORCPT ); Wed, 17 Apr 2019 03:19:51 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:6201 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725848AbfDQHTu (ORCPT ); Wed, 17 Apr 2019 03:19:50 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 13B2E21AF682BDAF86CA; Wed, 17 Apr 2019 15:19:15 +0800 (CST) Received: from [127.0.0.1] (10.142.63.192) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.408.0; Wed, 17 Apr 2019 15:19:09 +0800 CC: , , , , , , , , , , , , , , Andy Shevchenko , "David S. Miller" , Greg Kroah-Hartman , Mauro Carvalho Chehab , Andrew Morton , "Arnd Bergmann" , Shawn Guo , Pengcheng Li , Jianguo Sun , Masahiro Yamada , Jiancheng Xue , Binghui Wang Subject: Re: [PATCH v5 07/13] phy: Add usb phy support for hi3660 Soc of Hisilicon To: Kishon Vijay Abraham I , , , References: <20190329041409.70138-1-chenyu56@huawei.com> <20190329041409.70138-8-chenyu56@huawei.com> <2be3f2cf-ce16-d4b4-0d07-dda2a25c76d8@ti.com> From: Chen Yu Message-ID: Date: Wed, 17 Apr 2019 15:19:06 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: <2be3f2cf-ce16-d4b4-0d07-dda2a25c76d8@ti.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.142.63.192] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Kishon, On 2019/4/17 14:42, Kishon Vijay Abraham I wrote: > Hi, > > On 29/03/19 9:44 AM, Yu Chen wrote: >> This driver handles usb phy power on and shutdown for hi3660 Soc of >> Hisilicon. >> >> Cc: Andy Shevchenko >> Cc: Kishon Vijay Abraham I >> Cc: "David S. Miller" >> Cc: Greg Kroah-Hartman >> Cc: Mauro Carvalho Chehab >> Cc: Andrew Morton >> Cc: Arnd Bergmann >> Cc: Shawn Guo >> Cc: Pengcheng Li >> Cc: Jianguo Sun >> Cc: Masahiro Yamada >> Cc: Jiancheng Xue >> Cc: John Stultz >> Cc: Binghui Wang >> Reviewed-by: Andy Shevchenko >> Signed-off-by: Yu Chen >> --- >> v1: >> * Remove unused code and add comment for time delay as suggested by >> Kishon Vijay Abraham I. >> v2: >> * Fix license declaration. >> * Remove redundant parens. >> * Remove unused member variables in struct hi3660_priv. >> v4: >> * Add comments for HI3660_USB_DEFAULT_PHY_PARAM. >> * Add margin for usleep_range. >> * Get regmap of otg_bc from parent's of_node. >> --- >> --- >> MAINTAINERS | 8 ++ >> drivers/phy/hisilicon/Kconfig | 10 ++ >> drivers/phy/hisilicon/Makefile | 1 + >> drivers/phy/hisilicon/phy-hi3660-usb3.c | 233 ++++++++++++++++++++++++++++++++ >> 4 files changed, 252 insertions(+) >> create mode 100644 drivers/phy/hisilicon/phy-hi3660-usb3.c >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index 3e5a5d263f29..c0057dd82dbd 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -16084,6 +16084,14 @@ L: linux-usb@vger.kernel.org >> S: Maintained >> F: drivers/usb/roles/intel-xhci-usb-role-switch.c >> >> +USB IP DRIVER FOR HISILICON KIRIN >> +M: Yu Chen >> +M: Binghui Wang >> +L: linux-usb@vger.kernel.org >> +S: Maintained >> +F: Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt > > I don't seem to have received the dt-binding patch. Can you please resend with > updated tags? > > Thanks > Kishon > I were not add you to the cc list of the dt-binding patch before. This is the patch that you can find on patchwork: https://patchwork.kernel.org/patch/10876391/ Thanks Yu Chen >> +F: drivers/phy/hisilicon/phy-hi3660-usb3.c >> + >> USB ISP116X DRIVER >> M: Olav Kongas >> L: linux-usb@vger.kernel.org >> diff --git a/drivers/phy/hisilicon/Kconfig b/drivers/phy/hisilicon/Kconfig >> index b40ee54a1a50..3c142f08987c 100644 >> --- a/drivers/phy/hisilicon/Kconfig >> +++ b/drivers/phy/hisilicon/Kconfig >> @@ -12,6 +12,16 @@ config PHY_HI6220_USB >> >> To compile this driver as a module, choose M here. >> >> +config PHY_HI3660_USB >> + tristate "hi3660 USB PHY support" >> + depends on (ARCH_HISI && ARM64) || COMPILE_TEST >> + select GENERIC_PHY >> + select MFD_SYSCON >> + help >> + Enable this to support the HISILICON HI3660 USB PHY. >> + >> + To compile this driver as a module, choose M here. >> + >> config PHY_HISTB_COMBPHY >> tristate "HiSilicon STB SoCs COMBPHY support" >> depends on (ARCH_HISI && ARM64) || COMPILE_TEST >> diff --git a/drivers/phy/hisilicon/Makefile b/drivers/phy/hisilicon/Makefile >> index f662a4fe18d8..75ba64e2faf8 100644 >> --- a/drivers/phy/hisilicon/Makefile >> +++ b/drivers/phy/hisilicon/Makefile >> @@ -1,4 +1,5 @@ >> obj-$(CONFIG_PHY_HI6220_USB) += phy-hi6220-usb.o >> +obj-$(CONFIG_PHY_HI3660_USB) += phy-hi3660-usb3.o >> obj-$(CONFIG_PHY_HISTB_COMBPHY) += phy-histb-combphy.o >> obj-$(CONFIG_PHY_HISI_INNO_USB2) += phy-hisi-inno-usb2.o >> obj-$(CONFIG_PHY_HIX5HD2_SATA) += phy-hix5hd2-sata.o >> diff --git a/drivers/phy/hisilicon/phy-hi3660-usb3.c b/drivers/phy/hisilicon/phy-hi3660-usb3.c >> new file mode 100644 >> index 000000000000..cc0af2c044d0 >> --- /dev/null >> +++ b/drivers/phy/hisilicon/phy-hi3660-usb3.c >> @@ -0,0 +1,233 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Phy provider for USB 3.0 controller on HiSilicon 3660 platform >> + * >> + * Copyright (C) 2017-2018 Hilisicon Electronics Co., Ltd. >> + * http://www.huawei.com >> + * >> + * Authors: Yu Chen >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#define PERI_CRG_CLK_EN4 0x40 >> +#define PERI_CRG_CLK_DIS4 0x44 >> +#define GT_CLK_USB3OTG_REF BIT(0) >> +#define GT_ACLK_USB3OTG BIT(1) >> + >> +#define PERI_CRG_RSTEN4 0x90 >> +#define PERI_CRG_RSTDIS4 0x94 >> +#define IP_RST_USB3OTGPHY_POR BIT(3) >> +#define IP_RST_USB3OTG BIT(5) >> + >> +#define PERI_CRG_ISODIS 0x148 >> +#define USB_REFCLK_ISO_EN BIT(25) >> + >> +#define PCTRL_PERI_CTRL3 0x10 >> +#define PCTRL_PERI_CTRL3_MSK_START 16 >> +#define USB_TCXO_EN BIT(1) >> + >> +#define PCTRL_PERI_CTRL24 0x64 >> +#define SC_CLK_USB3PHY_3MUX1_SEL BIT(25) >> + >> +#define USBOTG3_CTRL0 0x00 >> +#define SC_USB3PHY_ABB_GT_EN BIT(15) >> + >> +#define USBOTG3_CTRL2 0x08 >> +#define USBOTG3CTRL2_POWERDOWN_HSP BIT(0) >> +#define USBOTG3CTRL2_POWERDOWN_SSP BIT(1) >> + >> +#define USBOTG3_CTRL3 0x0C >> +#define USBOTG3_CTRL3_VBUSVLDEXT BIT(6) >> +#define USBOTG3_CTRL3_VBUSVLDEXTSEL BIT(5) >> + >> +#define USBOTG3_CTRL4 0x10 >> + >> +#define USBOTG3_CTRL7 0x1c >> +#define REF_SSP_EN BIT(16) >> + >> +/* This value config the default txtune parameter of the usb 2.0 phy */ >> +#define HI3660_USB_DEFAULT_PHY_PARAM 0x1c466e3 >> + >> +struct hi3660_priv { >> + struct device *dev; >> + struct regmap *peri_crg; >> + struct regmap *pctrl; >> + struct regmap *otg_bc; >> + u32 eye_diagram_param; >> +}; >> + >> +static int hi3660_phy_init(struct phy *phy) >> +{ >> + struct hi3660_priv *priv = phy_get_drvdata(phy); >> + u32 val, mask; >> + int ret; >> + >> + /* usb refclk iso disable */ >> + ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS, USB_REFCLK_ISO_EN); >> + if (ret) >> + goto out; >> + >> + /* enable usb_tcxo_en */ >> + val = USB_TCXO_EN | (USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START); >> + ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val); >> + if (ret) >> + goto out; >> + >> + /* assert phy */ >> + val = IP_RST_USB3OTGPHY_POR | IP_RST_USB3OTG; >> + ret = regmap_write(priv->peri_crg, PERI_CRG_RSTEN4, val); >> + if (ret) >> + goto out; >> + >> + /* enable phy ref clk */ >> + val = SC_USB3PHY_ABB_GT_EN; >> + mask = val; >> + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL0, mask, val); >> + if (ret) >> + goto out; >> + >> + val = REF_SSP_EN; >> + mask = val; >> + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL7, mask, val); >> + if (ret) >> + goto out; >> + >> + /* exit from IDDQ mode */ >> + mask = USBOTG3CTRL2_POWERDOWN_HSP | USBOTG3CTRL2_POWERDOWN_SSP; >> + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL2, mask, 0); >> + if (ret) >> + goto out; >> + >> + /* delay for exit from IDDQ mode */ >> + usleep_range(100, 120); >> + >> + /* deassert phy */ >> + val = IP_RST_USB3OTGPHY_POR | IP_RST_USB3OTG; >> + ret = regmap_write(priv->peri_crg, PERI_CRG_RSTDIS4, val); >> + if (ret) >> + goto out; >> + >> + /* delay for phy deasserted */ >> + usleep_range(10000, 15000); >> + >> + /* fake vbus valid signal */ >> + val = USBOTG3_CTRL3_VBUSVLDEXT | USBOTG3_CTRL3_VBUSVLDEXTSEL; >> + mask = val; >> + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL3, mask, val); >> + if (ret) >> + goto out; >> + >> + /* delay for vbus valid */ >> + usleep_range(100, 120); >> + >> + ret = regmap_write(priv->otg_bc, USBOTG3_CTRL4, >> + priv->eye_diagram_param); >> + if (ret) >> + goto out; >> + >> + return 0; >> +out: >> + dev_err(priv->dev, "failed to init phy ret: %d\n", ret); >> + return ret; >> +} >> + >> +static int hi3660_phy_exit(struct phy *phy) >> +{ >> + struct hi3660_priv *priv = phy_get_drvdata(phy); >> + u32 val; >> + int ret; >> + >> + /* assert phy */ >> + val = IP_RST_USB3OTGPHY_POR; >> + ret = regmap_write(priv->peri_crg, PERI_CRG_RSTEN4, val); >> + if (ret) >> + goto out; >> + >> + /* disable usb_tcxo_en */ >> + val = USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START; >> + ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val); >> + if (ret) >> + goto out; >> + >> + return 0; >> +out: >> + dev_err(priv->dev, "failed to exit phy ret: %d\n", ret); >> + return ret; >> +} >> + >> +static struct phy_ops hi3660_phy_ops = { >> + .init = hi3660_phy_init, >> + .exit = hi3660_phy_exit, >> + .owner = THIS_MODULE, >> +}; >> + >> +static int hi3660_phy_probe(struct platform_device *pdev) >> +{ >> + struct phy_provider *phy_provider; >> + struct device *dev = &pdev->dev; >> + struct phy *phy; >> + struct hi3660_priv *priv; >> + >> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); >> + if (!priv) >> + return -ENOMEM; >> + >> + priv->dev = dev; >> + priv->peri_crg = syscon_regmap_lookup_by_phandle(dev->of_node, >> + "hisilicon,pericrg-syscon"); >> + if (IS_ERR(priv->peri_crg)) { >> + dev_err(dev, "no hisilicon,pericrg-syscon\n"); >> + return PTR_ERR(priv->peri_crg); >> + } >> + >> + priv->pctrl = syscon_regmap_lookup_by_phandle(dev->of_node, >> + "hisilicon,pctrl-syscon"); >> + if (IS_ERR(priv->pctrl)) { >> + dev_err(dev, "no hisilicon,pctrl-syscon\n"); >> + return PTR_ERR(priv->pctrl); >> + } >> + >> + /* node of hi3660 phy is a sub-node of usb3_otg_bc */ >> + priv->otg_bc = syscon_node_to_regmap(dev->parent->of_node); >> + if (IS_ERR(priv->otg_bc)) { >> + dev_err(dev, "no hisilicon,usb3-otg-bc-syscon\n"); >> + return PTR_ERR(priv->otg_bc); >> + } >> + >> + if (of_property_read_u32(dev->of_node, "hisilicon,eye-diagram-param", >> + &(priv->eye_diagram_param))) >> + priv->eye_diagram_param = HI3660_USB_DEFAULT_PHY_PARAM; >> + >> + phy = devm_phy_create(dev, NULL, &hi3660_phy_ops); >> + if (IS_ERR(phy)) >> + return PTR_ERR(phy); >> + >> + phy_set_drvdata(phy, priv); >> + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); >> + return PTR_ERR_OR_ZERO(phy_provider); >> +} >> + >> +static const struct of_device_id hi3660_phy_of_match[] = { >> + {.compatible = "hisilicon,hi3660-usb-phy",}, >> + { } >> +}; >> +MODULE_DEVICE_TABLE(of, hi3660_phy_of_match); >> + >> +static struct platform_driver hi3660_phy_driver = { >> + .probe = hi3660_phy_probe, >> + .driver = { >> + .name = "hi3660-usb-phy", >> + .of_match_table = hi3660_phy_of_match, >> + } >> +}; >> +module_platform_driver(hi3660_phy_driver); >> + >> +MODULE_AUTHOR("Yu Chen "); >> +MODULE_LICENSE("GPL v2"); >> +MODULE_DESCRIPTION("Hilisicon Hi3660 USB3 PHY Driver"); >> > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen Yu Subject: Re: [PATCH v5 07/13] phy: Add usb phy support for hi3660 Soc of Hisilicon Date: Wed, 17 Apr 2019 15:19:06 +0800 Message-ID: References: <20190329041409.70138-1-chenyu56@huawei.com> <20190329041409.70138-8-chenyu56@huawei.com> <2be3f2cf-ce16-d4b4-0d07-dda2a25c76d8@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <2be3f2cf-ce16-d4b4-0d07-dda2a25c76d8@ti.com> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Kishon Vijay Abraham I , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: liuyu712@hisilicon.com, john.stultz@linaro.org, suzhuangluan@hisilicon.com, kongfei@hisilicon.com, wanghu17@hisilicon.com, butao@hisilicon.com, chenyao11@huawei.com, fangshengzhou@hisilicon.com, lipengcheng8@huawei.com, songxiaowei@hisilicon.com, xuyiping@hisilicon.com, xuyoujun4@huawei.com, yudongbin@hisilicon.com, zangleigang@hisilicon.com, Andy Shevchenko , "David S. Miller" , Greg Kroah-Hartman , Mauro Carvalho Chehab , Andrew Morton , Arnd Bergmann , Shawn Guo , Pengcheng Li , Jianguo Sun , Masahiro Yamada List-Id: devicetree@vger.kernel.org Hi Kishon, On 2019/4/17 14:42, Kishon Vijay Abraham I wrote: > Hi, > > On 29/03/19 9:44 AM, Yu Chen wrote: >> This driver handles usb phy power on and shutdown for hi3660 Soc of >> Hisilicon. >> >> Cc: Andy Shevchenko >> Cc: Kishon Vijay Abraham I >> Cc: "David S. Miller" >> Cc: Greg Kroah-Hartman >> Cc: Mauro Carvalho Chehab >> Cc: Andrew Morton >> Cc: Arnd Bergmann >> Cc: Shawn Guo >> Cc: Pengcheng Li >> Cc: Jianguo Sun >> Cc: Masahiro Yamada >> Cc: Jiancheng Xue >> Cc: John Stultz >> Cc: Binghui Wang >> Reviewed-by: Andy Shevchenko >> Signed-off-by: Yu Chen >> --- >> v1: >> * Remove unused code and add comment for time delay as suggested by >> Kishon Vijay Abraham I. >> v2: >> * Fix license declaration. >> * Remove redundant parens. >> * Remove unused member variables in struct hi3660_priv. >> v4: >> * Add comments for HI3660_USB_DEFAULT_PHY_PARAM. >> * Add margin for usleep_range. >> * Get regmap of otg_bc from parent's of_node. >> --- >> --- >> MAINTAINERS | 8 ++ >> drivers/phy/hisilicon/Kconfig | 10 ++ >> drivers/phy/hisilicon/Makefile | 1 + >> drivers/phy/hisilicon/phy-hi3660-usb3.c | 233 ++++++++++++++++++++++++++++++++ >> 4 files changed, 252 insertions(+) >> create mode 100644 drivers/phy/hisilicon/phy-hi3660-usb3.c >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index 3e5a5d263f29..c0057dd82dbd 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -16084,6 +16084,14 @@ L: linux-usb@vger.kernel.org >> S: Maintained >> F: drivers/usb/roles/intel-xhci-usb-role-switch.c >> >> +USB IP DRIVER FOR HISILICON KIRIN >> +M: Yu Chen >> +M: Binghui Wang >> +L: linux-usb@vger.kernel.org >> +S: Maintained >> +F: Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt > > I don't seem to have received the dt-binding patch. Can you please resend with > updated tags? > > Thanks > Kishon > I were not add you to the cc list of the dt-binding patch before. This is the patch that you can find on patchwork: https://patchwork.kernel.org/patch/10876391/ Thanks Yu Chen >> +F: drivers/phy/hisilicon/phy-hi3660-usb3.c >> + >> USB ISP116X DRIVER >> M: Olav Kongas >> L: linux-usb@vger.kernel.org >> diff --git a/drivers/phy/hisilicon/Kconfig b/drivers/phy/hisilicon/Kconfig >> index b40ee54a1a50..3c142f08987c 100644 >> --- a/drivers/phy/hisilicon/Kconfig >> +++ b/drivers/phy/hisilicon/Kconfig >> @@ -12,6 +12,16 @@ config PHY_HI6220_USB >> >> To compile this driver as a module, choose M here. >> >> +config PHY_HI3660_USB >> + tristate "hi3660 USB PHY support" >> + depends on (ARCH_HISI && ARM64) || COMPILE_TEST >> + select GENERIC_PHY >> + select MFD_SYSCON >> + help >> + Enable this to support the HISILICON HI3660 USB PHY. >> + >> + To compile this driver as a module, choose M here. >> + >> config PHY_HISTB_COMBPHY >> tristate "HiSilicon STB SoCs COMBPHY support" >> depends on (ARCH_HISI && ARM64) || COMPILE_TEST >> diff --git a/drivers/phy/hisilicon/Makefile b/drivers/phy/hisilicon/Makefile >> index f662a4fe18d8..75ba64e2faf8 100644 >> --- a/drivers/phy/hisilicon/Makefile >> +++ b/drivers/phy/hisilicon/Makefile >> @@ -1,4 +1,5 @@ >> obj-$(CONFIG_PHY_HI6220_USB) += phy-hi6220-usb.o >> +obj-$(CONFIG_PHY_HI3660_USB) += phy-hi3660-usb3.o >> obj-$(CONFIG_PHY_HISTB_COMBPHY) += phy-histb-combphy.o >> obj-$(CONFIG_PHY_HISI_INNO_USB2) += phy-hisi-inno-usb2.o >> obj-$(CONFIG_PHY_HIX5HD2_SATA) += phy-hix5hd2-sata.o >> diff --git a/drivers/phy/hisilicon/phy-hi3660-usb3.c b/drivers/phy/hisilicon/phy-hi3660-usb3.c >> new file mode 100644 >> index 000000000000..cc0af2c044d0 >> --- /dev/null >> +++ b/drivers/phy/hisilicon/phy-hi3660-usb3.c >> @@ -0,0 +1,233 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Phy provider for USB 3.0 controller on HiSilicon 3660 platform >> + * >> + * Copyright (C) 2017-2018 Hilisicon Electronics Co., Ltd. >> + * http://www.huawei.com >> + * >> + * Authors: Yu Chen >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#define PERI_CRG_CLK_EN4 0x40 >> +#define PERI_CRG_CLK_DIS4 0x44 >> +#define GT_CLK_USB3OTG_REF BIT(0) >> +#define GT_ACLK_USB3OTG BIT(1) >> + >> +#define PERI_CRG_RSTEN4 0x90 >> +#define PERI_CRG_RSTDIS4 0x94 >> +#define IP_RST_USB3OTGPHY_POR BIT(3) >> +#define IP_RST_USB3OTG BIT(5) >> + >> +#define PERI_CRG_ISODIS 0x148 >> +#define USB_REFCLK_ISO_EN BIT(25) >> + >> +#define PCTRL_PERI_CTRL3 0x10 >> +#define PCTRL_PERI_CTRL3_MSK_START 16 >> +#define USB_TCXO_EN BIT(1) >> + >> +#define PCTRL_PERI_CTRL24 0x64 >> +#define SC_CLK_USB3PHY_3MUX1_SEL BIT(25) >> + >> +#define USBOTG3_CTRL0 0x00 >> +#define SC_USB3PHY_ABB_GT_EN BIT(15) >> + >> +#define USBOTG3_CTRL2 0x08 >> +#define USBOTG3CTRL2_POWERDOWN_HSP BIT(0) >> +#define USBOTG3CTRL2_POWERDOWN_SSP BIT(1) >> + >> +#define USBOTG3_CTRL3 0x0C >> +#define USBOTG3_CTRL3_VBUSVLDEXT BIT(6) >> +#define USBOTG3_CTRL3_VBUSVLDEXTSEL BIT(5) >> + >> +#define USBOTG3_CTRL4 0x10 >> + >> +#define USBOTG3_CTRL7 0x1c >> +#define REF_SSP_EN BIT(16) >> + >> +/* This value config the default txtune parameter of the usb 2.0 phy */ >> +#define HI3660_USB_DEFAULT_PHY_PARAM 0x1c466e3 >> + >> +struct hi3660_priv { >> + struct device *dev; >> + struct regmap *peri_crg; >> + struct regmap *pctrl; >> + struct regmap *otg_bc; >> + u32 eye_diagram_param; >> +}; >> + >> +static int hi3660_phy_init(struct phy *phy) >> +{ >> + struct hi3660_priv *priv = phy_get_drvdata(phy); >> + u32 val, mask; >> + int ret; >> + >> + /* usb refclk iso disable */ >> + ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS, USB_REFCLK_ISO_EN); >> + if (ret) >> + goto out; >> + >> + /* enable usb_tcxo_en */ >> + val = USB_TCXO_EN | (USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START); >> + ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val); >> + if (ret) >> + goto out; >> + >> + /* assert phy */ >> + val = IP_RST_USB3OTGPHY_POR | IP_RST_USB3OTG; >> + ret = regmap_write(priv->peri_crg, PERI_CRG_RSTEN4, val); >> + if (ret) >> + goto out; >> + >> + /* enable phy ref clk */ >> + val = SC_USB3PHY_ABB_GT_EN; >> + mask = val; >> + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL0, mask, val); >> + if (ret) >> + goto out; >> + >> + val = REF_SSP_EN; >> + mask = val; >> + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL7, mask, val); >> + if (ret) >> + goto out; >> + >> + /* exit from IDDQ mode */ >> + mask = USBOTG3CTRL2_POWERDOWN_HSP | USBOTG3CTRL2_POWERDOWN_SSP; >> + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL2, mask, 0); >> + if (ret) >> + goto out; >> + >> + /* delay for exit from IDDQ mode */ >> + usleep_range(100, 120); >> + >> + /* deassert phy */ >> + val = IP_RST_USB3OTGPHY_POR | IP_RST_USB3OTG; >> + ret = regmap_write(priv->peri_crg, PERI_CRG_RSTDIS4, val); >> + if (ret) >> + goto out; >> + >> + /* delay for phy deasserted */ >> + usleep_range(10000, 15000); >> + >> + /* fake vbus valid signal */ >> + val = USBOTG3_CTRL3_VBUSVLDEXT | USBOTG3_CTRL3_VBUSVLDEXTSEL; >> + mask = val; >> + ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL3, mask, val); >> + if (ret) >> + goto out; >> + >> + /* delay for vbus valid */ >> + usleep_range(100, 120); >> + >> + ret = regmap_write(priv->otg_bc, USBOTG3_CTRL4, >> + priv->eye_diagram_param); >> + if (ret) >> + goto out; >> + >> + return 0; >> +out: >> + dev_err(priv->dev, "failed to init phy ret: %d\n", ret); >> + return ret; >> +} >> + >> +static int hi3660_phy_exit(struct phy *phy) >> +{ >> + struct hi3660_priv *priv = phy_get_drvdata(phy); >> + u32 val; >> + int ret; >> + >> + /* assert phy */ >> + val = IP_RST_USB3OTGPHY_POR; >> + ret = regmap_write(priv->peri_crg, PERI_CRG_RSTEN4, val); >> + if (ret) >> + goto out; >> + >> + /* disable usb_tcxo_en */ >> + val = USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START; >> + ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val); >> + if (ret) >> + goto out; >> + >> + return 0; >> +out: >> + dev_err(priv->dev, "failed to exit phy ret: %d\n", ret); >> + return ret; >> +} >> + >> +static struct phy_ops hi3660_phy_ops = { >> + .init = hi3660_phy_init, >> + .exit = hi3660_phy_exit, >> + .owner = THIS_MODULE, >> +}; >> + >> +static int hi3660_phy_probe(struct platform_device *pdev) >> +{ >> + struct phy_provider *phy_provider; >> + struct device *dev = &pdev->dev; >> + struct phy *phy; >> + struct hi3660_priv *priv; >> + >> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); >> + if (!priv) >> + return -ENOMEM; >> + >> + priv->dev = dev; >> + priv->peri_crg = syscon_regmap_lookup_by_phandle(dev->of_node, >> + "hisilicon,pericrg-syscon"); >> + if (IS_ERR(priv->peri_crg)) { >> + dev_err(dev, "no hisilicon,pericrg-syscon\n"); >> + return PTR_ERR(priv->peri_crg); >> + } >> + >> + priv->pctrl = syscon_regmap_lookup_by_phandle(dev->of_node, >> + "hisilicon,pctrl-syscon"); >> + if (IS_ERR(priv->pctrl)) { >> + dev_err(dev, "no hisilicon,pctrl-syscon\n"); >> + return PTR_ERR(priv->pctrl); >> + } >> + >> + /* node of hi3660 phy is a sub-node of usb3_otg_bc */ >> + priv->otg_bc = syscon_node_to_regmap(dev->parent->of_node); >> + if (IS_ERR(priv->otg_bc)) { >> + dev_err(dev, "no hisilicon,usb3-otg-bc-syscon\n"); >> + return PTR_ERR(priv->otg_bc); >> + } >> + >> + if (of_property_read_u32(dev->of_node, "hisilicon,eye-diagram-param", >> + &(priv->eye_diagram_param))) >> + priv->eye_diagram_param = HI3660_USB_DEFAULT_PHY_PARAM; >> + >> + phy = devm_phy_create(dev, NULL, &hi3660_phy_ops); >> + if (IS_ERR(phy)) >> + return PTR_ERR(phy); >> + >> + phy_set_drvdata(phy, priv); >> + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); >> + return PTR_ERR_OR_ZERO(phy_provider); >> +} >> + >> +static const struct of_device_id hi3660_phy_of_match[] = { >> + {.compatible = "hisilicon,hi3660-usb-phy",}, >> + { } >> +}; >> +MODULE_DEVICE_TABLE(of, hi3660_phy_of_match); >> + >> +static struct platform_driver hi3660_phy_driver = { >> + .probe = hi3660_phy_probe, >> + .driver = { >> + .name = "hi3660-usb-phy", >> + .of_match_table = hi3660_phy_of_match, >> + } >> +}; >> +module_platform_driver(hi3660_phy_driver); >> + >> +MODULE_AUTHOR("Yu Chen "); >> +MODULE_LICENSE("GPL v2"); >> +MODULE_DESCRIPTION("Hilisicon Hi3660 USB3 PHY Driver"); >> > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v5,07/13] phy: Add usb phy support for hi3660 Soc of Hisilicon From: Yu Chen Message-Id: Date: Wed, 17 Apr 2019 15:19:06 +0800 To: Kishon Vijay Abraham I , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: liuyu712@hisilicon.com, john.stultz@linaro.org, suzhuangluan@hisilicon.com, kongfei@hisilicon.com, wanghu17@hisilicon.com, butao@hisilicon.com, chenyao11@huawei.com, fangshengzhou@hisilicon.com, lipengcheng8@huawei.com, songxiaowei@hisilicon.com, xuyiping@hisilicon.com, xuyoujun4@huawei.com, yudongbin@hisilicon.com, zangleigang@hisilicon.com, Andy Shevchenko , "David S. Miller" , Greg Kroah-Hartman , Mauro Carvalho Chehab , Andrew Morton , Arnd Bergmann , Shawn Guo , Pengcheng Li , Jianguo Sun , Masahiro Yamada , Jiancheng Xue , Binghui Wang List-ID: SGkgS2lzaG9uLAoKT24gMjAxOS80LzE3IDE0OjQyLCBLaXNob24gVmlqYXkgQWJyYWhhbSBJIHdy b3RlOgo+IEhpLAo+IAo+IE9uIDI5LzAzLzE5IDk6NDQgQU0sIFl1IENoZW4gd3JvdGU6Cj4+IFRo aXMgZHJpdmVyIGhhbmRsZXMgdXNiIHBoeSBwb3dlciBvbiBhbmQgc2h1dGRvd24gZm9yIGhpMzY2 MCBTb2Mgb2YKPj4gSGlzaWxpY29uLgo+Pgo+PiBDYzogQW5keSBTaGV2Y2hlbmtvIDxhbmR5LnNo ZXZjaGVua29AZ21haWwuY29tPgo+PiBDYzogS2lzaG9uIFZpamF5IEFicmFoYW0gSSA8a2lzaG9u QHRpLmNvbT4KPj4gQ2M6ICJEYXZpZCBTLiBNaWxsZXIiIDxkYXZlbUBkYXZlbWxvZnQubmV0Pgo+ PiBDYzogR3JlZyBLcm9haC1IYXJ0bWFuIDxncmVna2hAbGludXhmb3VuZGF0aW9uLm9yZz4KPj4g Q2M6IE1hdXJvIENhcnZhbGhvIENoZWhhYiA8bWNoZWhhYitzYW1zdW5nQGtlcm5lbC5vcmc+Cj4+ IENjOiBBbmRyZXcgTW9ydG9uIDxha3BtQGxpbnV4LWZvdW5kYXRpb24ub3JnPgo+PiBDYzogQXJu ZCBCZXJnbWFubiA8YXJuZEBhcm5kYi5kZT4KPj4gQ2M6IFNoYXduIEd1byA8c2hhd25ndW9Aa2Vy bmVsLm9yZz4KPj4gQ2M6IFBlbmdjaGVuZyBMaSA8bHBjLmxpQGhpc2lsaWNvbi5jb20+Cj4+IENj OiBKaWFuZ3VvIFN1biA8c3Vuamlhbmd1bzFAaHVhd2VpLmNvbT4KPj4gQ2M6IE1hc2FoaXJvIFlh bWFkYSA8eWFtYWRhLm1hc2FoaXJvQHNvY2lvbmV4dC5jb20+Cj4+IENjOiBKaWFuY2hlbmcgWHVl IDx4dWVqaWFuY2hlbmdAaGlzaWxpY29uLmNvbT4KPj4gQ2M6IEpvaG4gU3R1bHR6IDxqb2huLnN0 dWx0ekBsaW5hcm8ub3JnPgo+PiBDYzogQmluZ2h1aSBXYW5nIDx3YW5nYmluZ2h1aUBoaXNpbGlj b24uY29tPgo+PiBSZXZpZXdlZC1ieTogQW5keSBTaGV2Y2hlbmtvIDxhbmR5LnNoZXZjaGVua29A Z21haWwuY29tPgo+PiBTaWduZWQtb2ZmLWJ5OiBZdSBDaGVuIDxjaGVueXU1NkBodWF3ZWkuY29t Pgo+PiAtLS0KPj4gdjE6Cj4+ICogUmVtb3ZlIHVudXNlZCBjb2RlIGFuZCBhZGQgY29tbWVudCBm b3IgdGltZSBkZWxheSBhcyBzdWdnZXN0ZWQgYnkKPj4gS2lzaG9uIFZpamF5IEFicmFoYW0gSS4K Pj4gdjI6Cj4+ICogRml4IGxpY2Vuc2UgZGVjbGFyYXRpb24uCj4+ICogUmVtb3ZlIHJlZHVuZGFu dCBwYXJlbnMuCj4+ICogUmVtb3ZlIHVudXNlZCBtZW1iZXIgdmFyaWFibGVzIGluIHN0cnVjdCBo aTM2NjBfcHJpdi4KPj4gdjQ6Cj4+ICogQWRkIGNvbW1lbnRzIGZvciBISTM2NjBfVVNCX0RFRkFV TFRfUEhZX1BBUkFNLgo+PiAqIEFkZCBtYXJnaW4gZm9yIHVzbGVlcF9yYW5nZS4KPj4gKiBHZXQg cmVnbWFwIG9mIG90Z19iYyBmcm9tIHBhcmVudCdzIG9mX25vZGUuCj4+IC0tLQo+PiAtLS0KPj4g IE1BSU5UQUlORVJTICAgICAgICAgICAgICAgICAgICAgICAgICAgICB8ICAgOCArKwo+PiAgZHJp dmVycy9waHkvaGlzaWxpY29uL0tjb25maWcgICAgICAgICAgIHwgIDEwICsrCj4+ICBkcml2ZXJz L3BoeS9oaXNpbGljb24vTWFrZWZpbGUgICAgICAgICAgfCAgIDEgKwo+PiAgZHJpdmVycy9waHkv aGlzaWxpY29uL3BoeS1oaTM2NjAtdXNiMy5jIHwgMjMzICsrKysrKysrKysrKysrKysrKysrKysr KysrKysrKysrCj4+ICA0IGZpbGVzIGNoYW5nZWQsIDI1MiBpbnNlcnRpb25zKCspCj4+ICBjcmVh dGUgbW9kZSAxMDA2NDQgZHJpdmVycy9waHkvaGlzaWxpY29uL3BoeS1oaTM2NjAtdXNiMy5jCj4+ Cj4+IGRpZmYgLS1naXQgYS9NQUlOVEFJTkVSUyBiL01BSU5UQUlORVJTCj4+IGluZGV4IDNlNWE1 ZDI2M2YyOS4uYzAwNTdkZDgyZGJkIDEwMDY0NAo+PiAtLS0gYS9NQUlOVEFJTkVSUwo+PiArKysg Yi9NQUlOVEFJTkVSUwo+PiBAQCAtMTYwODQsNiArMTYwODQsMTQgQEAgTDoJbGludXgtdXNiQHZn ZXIua2VybmVsLm9yZwo+PiAgUzoJTWFpbnRhaW5lZAo+PiAgRjoJZHJpdmVycy91c2Ivcm9sZXMv aW50ZWwteGhjaS11c2Itcm9sZS1zd2l0Y2guYwo+PiAgCj4+ICtVU0IgSVAgRFJJVkVSIEZPUiBI SVNJTElDT04gS0lSSU4KPj4gK006CVl1IENoZW4gPGNoZW55dTU2QGh1YXdlaS5jb20+Cj4+ICtN OglCaW5naHVpIFdhbmcgPHdhbmdiaW5naHVpQGhpc2lsaWNvbi5jb20+Cj4+ICtMOglsaW51eC11 c2JAdmdlci5rZXJuZWwub3JnCj4+ICtTOglNYWludGFpbmVkCj4+ICtGOglEb2N1bWVudGF0aW9u L2RldmljZXRyZWUvYmluZGluZ3MvcGh5L3BoeS1oaTM2NjAtdXNiMy50eHQKPiAKPiBJIGRvbid0 IHNlZW0gdG8gaGF2ZSByZWNlaXZlZCB0aGUgZHQtYmluZGluZyBwYXRjaC4gQ2FuIHlvdSBwbGVh c2UgcmVzZW5kIHdpdGgKPiB1cGRhdGVkIHRhZ3M/Cj4gCj4gVGhhbmtzCj4gS2lzaG9uCj4gCkkg d2VyZSBub3QgYWRkIHlvdSB0byB0aGUgY2MgbGlzdCBvZiB0aGUgZHQtYmluZGluZyBwYXRjaCBi ZWZvcmUuClRoaXMgaXMgdGhlIHBhdGNoIHRoYXQgeW91IGNhbiBmaW5kIG9uIHBhdGNod29yazoK aHR0cHM6Ly9wYXRjaHdvcmsua2VybmVsLm9yZy9wYXRjaC8xMDg3NjM5MS8KClRoYW5rcwpZdSBD aGVuCgo+PiArRjoJZHJpdmVycy9waHkvaGlzaWxpY29uL3BoeS1oaTM2NjAtdXNiMy5jCj4+ICsK Pj4gIFVTQiBJU1AxMTZYIERSSVZFUgo+PiAgTToJT2xhdiBLb25nYXMgPG9rQGFydGVjZGVzaWdu LmVlPgo+PiAgTDoJbGludXgtdXNiQHZnZXIua2VybmVsLm9yZwo+PiBkaWZmIC0tZ2l0IGEvZHJp dmVycy9waHkvaGlzaWxpY29uL0tjb25maWcgYi9kcml2ZXJzL3BoeS9oaXNpbGljb24vS2NvbmZp Zwo+PiBpbmRleCBiNDBlZTU0YTFhNTAuLjNjMTQyZjA4OTg3YyAxMDA2NDQKPj4gLS0tIGEvZHJp dmVycy9waHkvaGlzaWxpY29uL0tjb25maWcKPj4gKysrIGIvZHJpdmVycy9waHkvaGlzaWxpY29u L0tjb25maWcKPj4gQEAgLTEyLDYgKzEyLDE2IEBAIGNvbmZpZyBQSFlfSEk2MjIwX1VTQgo+PiAg Cj4+ICAJICBUbyBjb21waWxlIHRoaXMgZHJpdmVyIGFzIGEgbW9kdWxlLCBjaG9vc2UgTSBoZXJl Lgo+PiAgCj4+ICtjb25maWcgUEhZX0hJMzY2MF9VU0IKPj4gKwl0cmlzdGF0ZSAiaGkzNjYwIFVT QiBQSFkgc3VwcG9ydCIKPj4gKwlkZXBlbmRzIG9uIChBUkNIX0hJU0kgJiYgQVJNNjQpIHx8IENP TVBJTEVfVEVTVAo+PiArCXNlbGVjdCBHRU5FUklDX1BIWQo+PiArCXNlbGVjdCBNRkRfU1lTQ09O Cj4+ICsJaGVscAo+PiArCSAgRW5hYmxlIHRoaXMgdG8gc3VwcG9ydCB0aGUgSElTSUxJQ09OIEhJ MzY2MCBVU0IgUEhZLgo+PiArCj4+ICsJICBUbyBjb21waWxlIHRoaXMgZHJpdmVyIGFzIGEgbW9k dWxlLCBjaG9vc2UgTSBoZXJlLgo+PiArCj4+ICBjb25maWcgUEhZX0hJU1RCX0NPTUJQSFkKPj4g IAl0cmlzdGF0ZSAiSGlTaWxpY29uIFNUQiBTb0NzIENPTUJQSFkgc3VwcG9ydCIKPj4gIAlkZXBl bmRzIG9uIChBUkNIX0hJU0kgJiYgQVJNNjQpIHx8IENPTVBJTEVfVEVTVAo+PiBkaWZmIC0tZ2l0 IGEvZHJpdmVycy9waHkvaGlzaWxpY29uL01ha2VmaWxlIGIvZHJpdmVycy9waHkvaGlzaWxpY29u L01ha2VmaWxlCj4+IGluZGV4IGY2NjJhNGZlMThkOC4uNzViYTY0ZTJmYWY4IDEwMDY0NAo+PiAt LS0gYS9kcml2ZXJzL3BoeS9oaXNpbGljb24vTWFrZWZpbGUKPj4gKysrIGIvZHJpdmVycy9waHkv aGlzaWxpY29uL01ha2VmaWxlCj4+IEBAIC0xLDQgKzEsNSBAQAo+PiAgb2JqLSQoQ09ORklHX1BI WV9ISTYyMjBfVVNCKQkJKz0gcGh5LWhpNjIyMC11c2Iubwo+PiArb2JqLSQoQ09ORklHX1BIWV9I STM2NjBfVVNCKQkJKz0gcGh5LWhpMzY2MC11c2IzLm8KPj4gIG9iai0kKENPTkZJR19QSFlfSElT VEJfQ09NQlBIWSkJCSs9IHBoeS1oaXN0Yi1jb21icGh5Lm8KPj4gIG9iai0kKENPTkZJR19QSFlf SElTSV9JTk5PX1VTQjIpCSs9IHBoeS1oaXNpLWlubm8tdXNiMi5vCj4+ICBvYmotJChDT05GSUdf UEhZX0hJWDVIRDJfU0FUQSkJCSs9IHBoeS1oaXg1aGQyLXNhdGEubwo+PiBkaWZmIC0tZ2l0IGEv ZHJpdmVycy9waHkvaGlzaWxpY29uL3BoeS1oaTM2NjAtdXNiMy5jIGIvZHJpdmVycy9waHkvaGlz aWxpY29uL3BoeS1oaTM2NjAtdXNiMy5jCj4+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0Cj4+IGluZGV4 IDAwMDAwMDAwMDAwMC4uY2MwYWYyYzA0NGQwCj4+IC0tLSAvZGV2L251bGwKPj4gKysrIGIvZHJp dmVycy9waHkvaGlzaWxpY29uL3BoeS1oaTM2NjAtdXNiMy5jCj4+IEBAIC0wLDAgKzEsMjMzIEBA Cj4+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogR1BMLTIuMAo+PiArLyoKPj4gKyAqIFBo eSBwcm92aWRlciBmb3IgVVNCIDMuMCBjb250cm9sbGVyIG9uIEhpU2lsaWNvbiAzNjYwIHBsYXRm b3JtCj4+ICsgKgo+PiArICogQ29weXJpZ2h0IChDKSAyMDE3LTIwMTggSGlsaXNpY29uIEVsZWN0 cm9uaWNzIENvLiwgTHRkLgo+PiArICoJCWh0dHA6Ly93d3cuaHVhd2VpLmNvbQo+PiArICoKPj4g KyAqIEF1dGhvcnM6IFl1IENoZW4gPGNoZW55dTU2QGh1YXdlaS5jb20+Cj4+ICsgKi8KPj4gKwo+ PiArI2luY2x1ZGUgPGxpbnV4L2tlcm5lbC5oPgo+PiArI2luY2x1ZGUgPGxpbnV4L21mZC9zeXNj b24uaD4KPj4gKyNpbmNsdWRlIDxsaW51eC9tb2R1bGUuaD4KPj4gKyNpbmNsdWRlIDxsaW51eC9w aHkvcGh5Lmg+Cj4+ICsjaW5jbHVkZSA8bGludXgvcGxhdGZvcm1fZGV2aWNlLmg+Cj4+ICsjaW5j bHVkZSA8bGludXgvcmVnbWFwLmg+Cj4+ICsKPj4gKyNkZWZpbmUgUEVSSV9DUkdfQ0xLX0VONAkJ CTB4NDAKPj4gKyNkZWZpbmUgUEVSSV9DUkdfQ0xLX0RJUzQJCQkweDQ0Cj4+ICsjZGVmaW5lIEdU X0NMS19VU0IzT1RHX1JFRgkJCUJJVCgwKQo+PiArI2RlZmluZSBHVF9BQ0xLX1VTQjNPVEcJCQkJ QklUKDEpCj4+ICsKPj4gKyNkZWZpbmUgUEVSSV9DUkdfUlNURU40CQkJCTB4OTAKPj4gKyNkZWZp bmUgUEVSSV9DUkdfUlNURElTNAkJCTB4OTQKPj4gKyNkZWZpbmUgSVBfUlNUX1VTQjNPVEdQSFlf UE9SCQkJQklUKDMpCj4+ICsjZGVmaW5lIElQX1JTVF9VU0IzT1RHCQkJCUJJVCg1KQo+PiArCj4+ ICsjZGVmaW5lIFBFUklfQ1JHX0lTT0RJUwkJCQkweDE0OAo+PiArI2RlZmluZSBVU0JfUkVGQ0xL X0lTT19FTgkJCUJJVCgyNSkKPj4gKwo+PiArI2RlZmluZSBQQ1RSTF9QRVJJX0NUUkwzCQkJMHgx MAo+PiArI2RlZmluZSBQQ1RSTF9QRVJJX0NUUkwzX01TS19TVEFSVAkJMTYKPj4gKyNkZWZpbmUg VVNCX1RDWE9fRU4JCQkJQklUKDEpCj4+ICsKPj4gKyNkZWZpbmUgUENUUkxfUEVSSV9DVFJMMjQJ CQkweDY0Cj4+ICsjZGVmaW5lIFNDX0NMS19VU0IzUEhZXzNNVVgxX1NFTAkJQklUKDI1KQo+PiAr Cj4+ICsjZGVmaW5lIFVTQk9URzNfQ1RSTDAJCQkJMHgwMAo+PiArI2RlZmluZSBTQ19VU0IzUEhZ X0FCQl9HVF9FTgkJCUJJVCgxNSkKPj4gKwo+PiArI2RlZmluZSBVU0JPVEczX0NUUkwyCQkJCTB4 MDgKPj4gKyNkZWZpbmUgVVNCT1RHM0NUUkwyX1BPV0VSRE9XTl9IU1AJCUJJVCgwKQo+PiArI2Rl ZmluZSBVU0JPVEczQ1RSTDJfUE9XRVJET1dOX1NTUAkJQklUKDEpCj4+ICsKPj4gKyNkZWZpbmUg VVNCT1RHM19DVFJMMwkJCQkweDBDCj4+ICsjZGVmaW5lIFVTQk9URzNfQ1RSTDNfVkJVU1ZMREVY VAkJQklUKDYpCj4+ICsjZGVmaW5lIFVTQk9URzNfQ1RSTDNfVkJVU1ZMREVYVFNFTAkJQklUKDUp Cj4+ICsKPj4gKyNkZWZpbmUgVVNCT1RHM19DVFJMNAkJCQkweDEwCj4+ICsKPj4gKyNkZWZpbmUg VVNCT1RHM19DVFJMNwkJCQkweDFjCj4+ICsjZGVmaW5lIFJFRl9TU1BfRU4JCQkJQklUKDE2KQo+ PiArCj4+ICsvKiBUaGlzIHZhbHVlIGNvbmZpZyB0aGUgZGVmYXVsdCB0eHR1bmUgcGFyYW1ldGVy IG9mIHRoZSB1c2IgMi4wIHBoeSAqLwo+PiArI2RlZmluZSBISTM2NjBfVVNCX0RFRkFVTFRfUEhZ X1BBUkFNCQkweDFjNDY2ZTMKPj4gKwo+PiArc3RydWN0IGhpMzY2MF9wcml2IHsKPj4gKwlzdHJ1 Y3QgZGV2aWNlICpkZXY7Cj4+ICsJc3RydWN0IHJlZ21hcCAqcGVyaV9jcmc7Cj4+ICsJc3RydWN0 IHJlZ21hcCAqcGN0cmw7Cj4+ICsJc3RydWN0IHJlZ21hcCAqb3RnX2JjOwo+PiArCXUzMiBleWVf ZGlhZ3JhbV9wYXJhbTsKPj4gK307Cj4+ICsKPj4gK3N0YXRpYyBpbnQgaGkzNjYwX3BoeV9pbml0 KHN0cnVjdCBwaHkgKnBoeSkKPj4gK3sKPj4gKwlzdHJ1Y3QgaGkzNjYwX3ByaXYgKnByaXYgPSBw aHlfZ2V0X2RydmRhdGEocGh5KTsKPj4gKwl1MzIgdmFsLCBtYXNrOwo+PiArCWludCByZXQ7Cj4+ ICsKPj4gKwkvKiB1c2IgcmVmY2xrIGlzbyBkaXNhYmxlICovCj4+ICsJcmV0ID0gcmVnbWFwX3dy aXRlKHByaXYtPnBlcmlfY3JnLCBQRVJJX0NSR19JU09ESVMsIFVTQl9SRUZDTEtfSVNPX0VOKTsK Pj4gKwlpZiAocmV0KQo+PiArCQlnb3RvIG91dDsKPj4gKwo+PiArCS8qIGVuYWJsZSB1c2JfdGN4 b19lbiAqLwo+PiArCXZhbCA9IFVTQl9UQ1hPX0VOIHwgKFVTQl9UQ1hPX0VOIDw8IFBDVFJMX1BF UklfQ1RSTDNfTVNLX1NUQVJUKTsKPj4gKwlyZXQgPSByZWdtYXBfd3JpdGUocHJpdi0+cGN0cmws IFBDVFJMX1BFUklfQ1RSTDMsIHZhbCk7Cj4+ICsJaWYgKHJldCkKPj4gKwkJZ290byBvdXQ7Cj4+ ICsKPj4gKwkvKiBhc3NlcnQgcGh5ICovCj4+ICsJdmFsID0gSVBfUlNUX1VTQjNPVEdQSFlfUE9S IHwgSVBfUlNUX1VTQjNPVEc7Cj4+ICsJcmV0ID0gcmVnbWFwX3dyaXRlKHByaXYtPnBlcmlfY3Jn LCBQRVJJX0NSR19SU1RFTjQsIHZhbCk7Cj4+ICsJaWYgKHJldCkKPj4gKwkJZ290byBvdXQ7Cj4+ ICsKPj4gKwkvKiBlbmFibGUgcGh5IHJlZiBjbGsgKi8KPj4gKwl2YWwgPSBTQ19VU0IzUEhZX0FC Ql9HVF9FTjsKPj4gKwltYXNrID0gdmFsOwo+PiArCXJldCA9IHJlZ21hcF91cGRhdGVfYml0cyhw cml2LT5vdGdfYmMsIFVTQk9URzNfQ1RSTDAsIG1hc2ssIHZhbCk7Cj4+ICsJaWYgKHJldCkKPj4g KwkJZ290byBvdXQ7Cj4+ICsKPj4gKwl2YWwgPSBSRUZfU1NQX0VOOwo+PiArCW1hc2sgPSB2YWw7 Cj4+ICsJcmV0ID0gcmVnbWFwX3VwZGF0ZV9iaXRzKHByaXYtPm90Z19iYywgVVNCT1RHM19DVFJM NywgbWFzaywgdmFsKTsKPj4gKwlpZiAocmV0KQo+PiArCQlnb3RvIG91dDsKPj4gKwo+PiArCS8q IGV4aXQgZnJvbSBJRERRIG1vZGUgKi8KPj4gKwltYXNrID0gVVNCT1RHM0NUUkwyX1BPV0VSRE9X Tl9IU1AgfCBVU0JPVEczQ1RSTDJfUE9XRVJET1dOX1NTUDsKPj4gKwlyZXQgPSByZWdtYXBfdXBk YXRlX2JpdHMocHJpdi0+b3RnX2JjLCBVU0JPVEczX0NUUkwyLCBtYXNrLCAwKTsKPj4gKwlpZiAo cmV0KQo+PiArCQlnb3RvIG91dDsKPj4gKwo+PiArCS8qIGRlbGF5IGZvciBleGl0IGZyb20gSURE USBtb2RlICovCj4+ICsJdXNsZWVwX3JhbmdlKDEwMCwgMTIwKTsKPj4gKwo+PiArCS8qIGRlYXNz ZXJ0IHBoeSAqLwo+PiArCXZhbCA9IElQX1JTVF9VU0IzT1RHUEhZX1BPUiB8IElQX1JTVF9VU0Iz T1RHOwo+PiArCXJldCA9IHJlZ21hcF93cml0ZShwcml2LT5wZXJpX2NyZywgUEVSSV9DUkdfUlNU RElTNCwgdmFsKTsKPj4gKwlpZiAocmV0KQo+PiArCQlnb3RvIG91dDsKPj4gKwo+PiArCS8qIGRl bGF5IGZvciBwaHkgZGVhc3NlcnRlZCAqLwo+PiArCXVzbGVlcF9yYW5nZSgxMDAwMCwgMTUwMDAp Owo+PiArCj4+ICsJLyogZmFrZSB2YnVzIHZhbGlkIHNpZ25hbCAqLwo+PiArCXZhbCA9IFVTQk9U RzNfQ1RSTDNfVkJVU1ZMREVYVCB8IFVTQk9URzNfQ1RSTDNfVkJVU1ZMREVYVFNFTDsKPj4gKwlt YXNrID0gdmFsOwo+PiArCXJldCA9IHJlZ21hcF91cGRhdGVfYml0cyhwcml2LT5vdGdfYmMsIFVT Qk9URzNfQ1RSTDMsIG1hc2ssIHZhbCk7Cj4+ICsJaWYgKHJldCkKPj4gKwkJZ290byBvdXQ7Cj4+ ICsKPj4gKwkvKiBkZWxheSBmb3IgdmJ1cyB2YWxpZCAqLwo+PiArCXVzbGVlcF9yYW5nZSgxMDAs IDEyMCk7Cj4+ICsKPj4gKwlyZXQgPSByZWdtYXBfd3JpdGUocHJpdi0+b3RnX2JjLCBVU0JPVEcz X0NUUkw0LAo+PiArCQkJcHJpdi0+ZXllX2RpYWdyYW1fcGFyYW0pOwo+PiArCWlmIChyZXQpCj4+ ICsJCWdvdG8gb3V0Owo+PiArCj4+ICsJcmV0dXJuIDA7Cj4+ICtvdXQ6Cj4+ICsJZGV2X2Vycihw cml2LT5kZXYsICJmYWlsZWQgdG8gaW5pdCBwaHkgcmV0OiAlZFxuIiwgcmV0KTsKPj4gKwlyZXR1 cm4gcmV0Owo+PiArfQo+PiArCj4+ICtzdGF0aWMgaW50IGhpMzY2MF9waHlfZXhpdChzdHJ1Y3Qg cGh5ICpwaHkpCj4+ICt7Cj4+ICsJc3RydWN0IGhpMzY2MF9wcml2ICpwcml2ID0gcGh5X2dldF9k cnZkYXRhKHBoeSk7Cj4+ICsJdTMyIHZhbDsKPj4gKwlpbnQgcmV0Owo+PiArCj4+ICsJLyogYXNz ZXJ0IHBoeSAqLwo+PiArCXZhbCA9IElQX1JTVF9VU0IzT1RHUEhZX1BPUjsKPj4gKwlyZXQgPSBy ZWdtYXBfd3JpdGUocHJpdi0+cGVyaV9jcmcsIFBFUklfQ1JHX1JTVEVONCwgdmFsKTsKPj4gKwlp ZiAocmV0KQo+PiArCQlnb3RvIG91dDsKPj4gKwo+PiArCS8qIGRpc2FibGUgdXNiX3RjeG9fZW4g Ki8KPj4gKwl2YWwgPSBVU0JfVENYT19FTiA8PCBQQ1RSTF9QRVJJX0NUUkwzX01TS19TVEFSVDsK Pj4gKwlyZXQgPSByZWdtYXBfd3JpdGUocHJpdi0+cGN0cmwsIFBDVFJMX1BFUklfQ1RSTDMsIHZh bCk7Cj4+ICsJaWYgKHJldCkKPj4gKwkJZ290byBvdXQ7Cj4+ICsKPj4gKwlyZXR1cm4gMDsKPj4g K291dDoKPj4gKwlkZXZfZXJyKHByaXYtPmRldiwgImZhaWxlZCB0byBleGl0IHBoeSByZXQ6ICVk XG4iLCByZXQpOwo+PiArCXJldHVybiByZXQ7Cj4+ICt9Cj4+ICsKPj4gK3N0YXRpYyBzdHJ1Y3Qg cGh5X29wcyBoaTM2NjBfcGh5X29wcyA9IHsKPj4gKwkuaW5pdAkJPSBoaTM2NjBfcGh5X2luaXQs Cj4+ICsJLmV4aXQJCT0gaGkzNjYwX3BoeV9leGl0LAo+PiArCS5vd25lcgkJPSBUSElTX01PRFVM RSwKPj4gK307Cj4+ICsKPj4gK3N0YXRpYyBpbnQgaGkzNjYwX3BoeV9wcm9iZShzdHJ1Y3QgcGxh dGZvcm1fZGV2aWNlICpwZGV2KQo+PiArewo+PiArCXN0cnVjdCBwaHlfcHJvdmlkZXIgKnBoeV9w cm92aWRlcjsKPj4gKwlzdHJ1Y3QgZGV2aWNlICpkZXYgPSAmcGRldi0+ZGV2Owo+PiArCXN0cnVj dCBwaHkgKnBoeTsKPj4gKwlzdHJ1Y3QgaGkzNjYwX3ByaXYgKnByaXY7Cj4+ICsKPj4gKwlwcml2 ID0gZGV2bV9remFsbG9jKGRldiwgc2l6ZW9mKCpwcml2KSwgR0ZQX0tFUk5FTCk7Cj4+ICsJaWYg KCFwcml2KQo+PiArCQlyZXR1cm4gLUVOT01FTTsKPj4gKwo+PiArCXByaXYtPmRldiA9IGRldjsK Pj4gKwlwcml2LT5wZXJpX2NyZyA9IHN5c2Nvbl9yZWdtYXBfbG9va3VwX2J5X3BoYW5kbGUoZGV2 LT5vZl9ub2RlLAo+PiArCQkJCQkiaGlzaWxpY29uLHBlcmljcmctc3lzY29uIik7Cj4+ICsJaWYg KElTX0VSUihwcml2LT5wZXJpX2NyZykpIHsKPj4gKwkJZGV2X2VycihkZXYsICJubyBoaXNpbGlj b24scGVyaWNyZy1zeXNjb25cbiIpOwo+PiArCQlyZXR1cm4gUFRSX0VSUihwcml2LT5wZXJpX2Ny Zyk7Cj4+ICsJfQo+PiArCj4+ICsJcHJpdi0+cGN0cmwgPSBzeXNjb25fcmVnbWFwX2xvb2t1cF9i eV9waGFuZGxlKGRldi0+b2Zfbm9kZSwKPj4gKwkJCQkJImhpc2lsaWNvbixwY3RybC1zeXNjb24i KTsKPj4gKwlpZiAoSVNfRVJSKHByaXYtPnBjdHJsKSkgewo+PiArCQlkZXZfZXJyKGRldiwgIm5v IGhpc2lsaWNvbixwY3RybC1zeXNjb25cbiIpOwo+PiArCQlyZXR1cm4gUFRSX0VSUihwcml2LT5w Y3RybCk7Cj4+ICsJfQo+PiArCj4+ICsJLyogbm9kZSBvZiBoaTM2NjAgcGh5IGlzIGEgc3ViLW5v ZGUgb2YgdXNiM19vdGdfYmMgKi8KPj4gKwlwcml2LT5vdGdfYmMgPSBzeXNjb25fbm9kZV90b19y ZWdtYXAoZGV2LT5wYXJlbnQtPm9mX25vZGUpOwo+PiArCWlmIChJU19FUlIocHJpdi0+b3RnX2Jj KSkgewo+PiArCQlkZXZfZXJyKGRldiwgIm5vIGhpc2lsaWNvbix1c2IzLW90Zy1iYy1zeXNjb25c biIpOwo+PiArCQlyZXR1cm4gUFRSX0VSUihwcml2LT5vdGdfYmMpOwo+PiArCX0KPj4gKwo+PiAr CWlmIChvZl9wcm9wZXJ0eV9yZWFkX3UzMihkZXYtPm9mX25vZGUsICJoaXNpbGljb24sZXllLWRp YWdyYW0tcGFyYW0iLAo+PiArCQkmKHByaXYtPmV5ZV9kaWFncmFtX3BhcmFtKSkpCj4+ICsJCXBy aXYtPmV5ZV9kaWFncmFtX3BhcmFtID0gSEkzNjYwX1VTQl9ERUZBVUxUX1BIWV9QQVJBTTsKPj4g Kwo+PiArCXBoeSA9IGRldm1fcGh5X2NyZWF0ZShkZXYsIE5VTEwsICZoaTM2NjBfcGh5X29wcyk7 Cj4+ICsJaWYgKElTX0VSUihwaHkpKQo+PiArCQlyZXR1cm4gUFRSX0VSUihwaHkpOwo+PiArCj4+ ICsJcGh5X3NldF9kcnZkYXRhKHBoeSwgcHJpdik7Cj4+ICsJcGh5X3Byb3ZpZGVyID0gZGV2bV9v Zl9waHlfcHJvdmlkZXJfcmVnaXN0ZXIoZGV2LCBvZl9waHlfc2ltcGxlX3hsYXRlKTsKPj4gKwly ZXR1cm4gUFRSX0VSUl9PUl9aRVJPKHBoeV9wcm92aWRlcik7Cj4+ICt9Cj4+ICsKPj4gK3N0YXRp YyBjb25zdCBzdHJ1Y3Qgb2ZfZGV2aWNlX2lkIGhpMzY2MF9waHlfb2ZfbWF0Y2hbXSA9IHsKPj4g Kwl7LmNvbXBhdGlibGUgPSAiaGlzaWxpY29uLGhpMzY2MC11c2ItcGh5Iix9LAo+PiArCXsgfQo+ PiArfTsKPj4gK01PRFVMRV9ERVZJQ0VfVEFCTEUob2YsIGhpMzY2MF9waHlfb2ZfbWF0Y2gpOwo+ PiArCj4+ICtzdGF0aWMgc3RydWN0IHBsYXRmb3JtX2RyaXZlciBoaTM2NjBfcGh5X2RyaXZlciA9 IHsKPj4gKwkucHJvYmUJPSBoaTM2NjBfcGh5X3Byb2JlLAo+PiArCS5kcml2ZXIgPSB7Cj4+ICsJ CS5uYW1lCT0gImhpMzY2MC11c2ItcGh5IiwKPj4gKwkJLm9mX21hdGNoX3RhYmxlCT0gaGkzNjYw X3BoeV9vZl9tYXRjaCwKPj4gKwl9Cj4+ICt9Owo+PiArbW9kdWxlX3BsYXRmb3JtX2RyaXZlciho aTM2NjBfcGh5X2RyaXZlcik7Cj4+ICsKPj4gK01PRFVMRV9BVVRIT1IoIll1IENoZW4gPGNoZW55 dTU2QGh1YXdlaS5jb20+Iik7Cj4+ICtNT0RVTEVfTElDRU5TRSgiR1BMIHYyIik7Cj4+ICtNT0RV TEVfREVTQ1JJUFRJT04oIkhpbGlzaWNvbiBIaTM2NjAgVVNCMyBQSFkgRHJpdmVyIik7Cj4+Cj4g Cj4gLgo+Cg==