On 11/21/2017 03:13 AM, ZHU Yi (ST-FIR/ENG1-Zhu) wrote:
> Hello Pankaj,
> 
>> From: Pankaj Bansal [mailto:pankaj.bansal@nxp.com]
>> Sent: Monday, November 20, 2017 7:11 PM
>> [...]
>> Thank you Zhu Yi for this explanation. This helped me in understanding the quirks.
>> Is there any flexcan core which generates passive state interrupt ?

> I'm afraid so far no known flexcan core supports it.

Should we update the table and add a "IRQ Err Passive" no for all cores?

>  * Below is some version info we got:
>  *    SOC   Version   IP-Version  Glitch- [TR]WRN_INT IRQ Err Memory err RTR re-
>  *                                Filter? connected?  Passive detection  ception in MB
>  *   MX25  FlexCAN2  03.00.00.00     no        no         ?       no        no
>  *   MX28  FlexCAN2  03.00.04.00    yes       yes        no       no        no
>  *   MX35  FlexCAN2  03.00.00.00     no        no         ?       no        no
>  *   MX53  FlexCAN2  03.00.00.00    yes        no        no       no        no
>  *   MX6s  FlexCAN3  10.00.12.00    yes       yes        no       no       yes
>  *   VF610 FlexCAN3  ?               no       yes         ?      yes       yes?

And does it make sense to add "FLEXCAN_QUIRK_BROKEN_PERR_STATE" to the
vf610, too?

> static const struct flexcan_devtype_data fsl_vf610_devtype_data = {
> 	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |
> 		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_USE_OFF_TIMESTAMP,
> };

Marc

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