Could some AMD developer please comment, on how to fix this? T=
ables(?)
containing =E2=80=9C0 kHz=E2=80=9D are apparently shipped by vendors, so wh=
at to do?

```
static bool verify_clock_values(struct dm_pp_clock_levels_with_voltage *clk=
s)
{
        int i;

        if (clks->num_levels =3D=3D 0)
                return false;

        for (i =3D 0; i < clks->num_levels; i++)
                /* Ensure that the result is sane */
                if (clks->data[i].clocks_in_khz =3D=3D 0)
                        return false;

        return true;
}
```

Should commit 00893681a0ff4 (drm/amd/display: Reject PPLib clock values if =
they
are invalid) [1] be reverted? Andrew, Tony, Harry?

> drm/amd/display: Reject PPLib clock values if th=
ey are invalid
>
> We should be sticking with the default clock val=
ues if the values
> obtained from PPLib are bogus.
>
> Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
> Reviewed-by: Tony Cheng <=
Tony.Cheng@amd.com>
> Acked-by: Harry Wentland <harry.wentland@amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

PS: AMDGPU=E2=80=99s commit messages are too terse, and should be more elab=
orate.

[1]:
https://git.kerne=
l.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=3D00893681a0ff=
41cacecabc3dafe0987593a3d5c5