From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 109366] NULL pointer at pcie_capability_read_dword with Radeon SI vfio passthrough Date: Tue, 15 Jan 2019 17:16:12 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2004096723==" Return-path: Received: from culpepper.freedesktop.org (culpepper.freedesktop.org [IPv6:2610:10:20:722:a800:ff:fe98:4b55]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A7906EDC6 for ; Tue, 15 Jan 2019 17:16:12 +0000 (UTC) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============2004096723== Content-Type: multipart/alternative; boundary="15475725720.6F279fC6.2574" Content-Transfer-Encoding: 7bit --15475725720.6F279fC6.2574 Date: Tue, 15 Jan 2019 17:16:12 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://bugs.freedesktop.org/ Auto-Submitted: auto-generated https://bugs.freedesktop.org/show_bug.cgi?id=3D109366 --- Comment #2 from Alex Deucher --- Created attachment 143133 --> https://bugs.freedesktop.org/attachment.cgi?id=3D143133&action=3Dedit possible fix Does this patch fix it? dGPUs are always add in cards, so they always plug into an upstream port on bare metal. The driver needs to query the upstream port to determine what pcie gen speeds and lanes are available on the platf= orm so that the driver can properly adjust them at runtime to save power. --=20 You are receiving this mail because: You are the assignee for the bug.= --15475725720.6F279fC6.2574 Date: Tue, 15 Jan 2019 17:16:12 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://bugs.freedesktop.org/ Auto-Submitted: auto-generated

Commen= t # 2 on bug 10936= 6 from Alex Deucher 
Created attachment 143133 =
[details] [review]
possible fix

Does this patch fix it?  dGPUs are always add in cards, so they always plug
into an upstream port on bare metal.  The driver needs to query the upstream
port to determine what pcie gen speeds and lanes are available on the platf=
orm
so that the driver can properly adjust them at runtime to save power.

You are receiving this mail because:
  • You are the assignee for the bug.
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