| Bug ID | 110208 |
|---|---|
| Summary | New GPU sysfs Power State Interface for custom pp_od_clk_volt= age |
| Product | DRI |
| Version | unspecified |
| Hardware | Other |
| OS | All |
| Status | NEW |
| Severity | normal |
| Priority | medium |
| Component | DRM/AMDgpu |
| Assignee | dri-devel@lists.freedesktop.org |
| Reporter | richard.llom@gmail.com |
In order to use a custom pp_od_clk_voltage one has to set power_dpm_force_performance_level to manual. However this way it is not possible to use custom pp_od_clk_voltage and for= ce - for instance - high or peak performance levels. The forcing of different performance levels doesn't (and shouldn't) relate = to custom clocks/voltages. Putting this setting in the same interface is a poor choice and (unnecessarily) restricts the possibilities. Please add a new sysfs interface for *solely* choosing between default and custom pp_od_clk_voltage.
Link to documentation: https://dri.freedesktop.org/docs/drm/gpu/amdgpu.htm= l#power-dpm-force-performance-level Quote: pp_od_clk_voltage The amdgpu driver provides a sysfs API for adjusting the clocks and voltage= s in each power level within a power state. The pp_od_clk_voltage is used for th= is. < For Vega10 and previous ASICs > Reading the file will display: a list of engine clock levels and voltages labeled OD_SCLK a list of memory clock levels and voltages labeled OD_MCLK a list of valid ranges for sclk, mclk, and voltage labeled OD_RANGE To manually adjust these settings, first select manual using power_dpm_force_performance_level. ...
| What | Removed | Added |
|---|---|---|
| Status | NEW | RESOLVED |
| Resolution | --- | MOVED |
-- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this = link to our GitLab instance: https://gitlab.freedesktop.org/drm/amd/issues/731.